JPH05224772A - Electronic computer - Google Patents

Abstract

PURPOSE:To control the frequency of a processor clock by judging various operational environment elements affecting the operating speed of a microprocessor. CONSTITUTION:As an operational environment element detection circuit, a temperature detection circuit 1 outputs an output voltage signal 7 corresponding to the temperature while operating a microprocessor 6, and an A/D conversion circuit 12 quantizes the level of this signal and outputs temperature data 17. A ROM 13 inputs the temperature data 17 to an address terminal and outputs frequency control data 18 to control a variable frequency oscillation circuit 16 for generating the clock at a frequency programmed in advance corresponding to the temperature data 17. A D/A conversion circuit 14 outputs a frequency control signal 19 corresponding to the frequency control data 18, and a voltage- controlled oscillator 15 outputs the clock at a frequency corresponding to the frequency control signal 19 as a processor clock signal 20. The microprocessor 6 is operated by using this signal as a clock input.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic computer, and more particularly to an electronic computer for controlling the operation speed of a microprocessor in accordance with operating environment factors of the microprocessor.

[0002]

2. Description of the Related Art Conventionally, as this type of device, there has been one as shown in FIG. This figure shows Japanese Patent Laid-Open No. 3-62611.
In the figure, 1 is a thermistor temperature detection circuit, 2 is a comparator, 3 is a clock A generation circuit, 4 is a clock B generation circuit, 5 is a clock switching circuit, 6 is a microprocessor, 7 is an output voltage signal corresponding to the detected temperature, 8 is a clock selection signal, 9 is a clock A signal generated by the clock A generation circuit, 10 is a clock B signal generated by the clock B generation circuit, and 11 is a clock switching circuit 5. This is the selected clock signal to be output.

Next, the operation will be described. The temperature detection circuit 1 outputs a voltage proportional to the ambient temperature to the comparator 2 as an output voltage signal 7. This comparator 2 compares the temperature detection signal 7 with a reference voltage signal generated inside the comparator, and if the output voltage signal 7 is higher than the reference voltage, it becomes a logic "1", and vice versa. If the voltage is lower than the reference voltage, the clock selection signal 8 that is logical "0" is output.

The clock A generation circuit 3 and the clock B generation circuit 4 respectively include a clock A signal 9 and a clock B signal 1.
Outputs 0. The clock A signal 9 is the clock B
It is a clock signal having a frequency lower than that of the signal 10. The clock switching circuit 5 selects the clock B signal 10 having a high frequency when the clock selection signal 8 is logic "0", that is, when the ambient temperature is lower than a certain reference, and when the clock selection signal 8 is logic "1", that is, When the ambient temperature is higher than a certain reference, the clock A signal 9 having a low frequency is selected and output to the microprocessor 6 as the selected clock signal 11.

[0005]

By the way, since the operation clock control method of the conventional example is as described above,
It is necessary to configure the clock switching circuit 5 itself so as not to output glitch noise at the time of clock switching. For example, as shown in FIG. It states that it is necessary to deal with a circuit that is not easy such as a logic circuit that becomes. This also indicates that it is not easy to switch clock frequencies at critical points.

Further, in the circuit shown in FIG. 19, both clocks are temporarily in the non-selected state at the moment when the clock switching occurs, and when the clock switching operation occurs frequently, the actual clock frequency may decrease. There is a problem that there is a property.

Further, in order to prevent the selection operation from becoming unstable at the critical point where clock switching occurs, it is necessary to provide this portion with a hysteresis characteristic. For example, as shown in FIG. 2b-2
Comparator 2 having a hysteresis characteristic composed of e
Indicates that it is necessary to deal with it.

Further, as prior arts of this type, for example, JP-A-62-102609 and JP-A-64-48119.
Japanese Patent Laid-Open No. 2-76056 and Japanese Patent Laid-Open No. 2-5133 disclose techniques for detecting an operating environment element and controlling the operating speed of a clock or a functional circuit. The control configurations were different.

The present invention has been made to solve the above-mentioned problems, and the clock frequency for determining the operating speed of the microprocessor can be varied over a wide range and continuously according to the operating environment elements of the microprocessor. The purpose is to obtain an electronic calculator that can.

[0010]

An electronic computer according to claim 1 of the present invention includes an operating environment element detecting circuit for detecting an operating environment element of a microprocessor and converting it into an electric signal.
The variable frequency oscillation circuit is provided with a ROM preprogrammed with data for controlling the oscillation frequency based on the level of the operation environment element output from the operation environment element detection circuit, and a variable frequency oscillation circuit controlled by the data in the ROM. It is characterized in that the output of the circuit is used as an operation clock.

Further, in the electronic computer according to the present invention, the operating environment element detecting circuit detects the package temperature of the microprocessor as an operating environment element.

Further, in the electronic computer according to the present invention, as the operating environment element detecting circuit, a temperature measuring element is formed on the same circuit constituent film as the microprocessor, and the output of the temperature measuring element is used as the operating environment element. It is characterized in that it is used as a detection output.

Further, in the electronic computer according to the present invention, as the operating environment element detecting circuit, a temperature measuring element is arranged in the same package as the microprocessor,
The output of the temperature measuring element is used as the detection output of the operating environment element.

Further, in the electronic computer according to the present invention, the operating environment element detecting circuit detects the power supply voltage of the microprocessor as an operating environment element.

Further, in the electronic computer according to the present invention, the operating environment element detecting circuit detects a setting made by the microprocessor itself as an operating environment element by a program programmed in advance.

Further, in the electronic computer according to the first aspect, the operating environment element detecting circuit detects various status elements which are not caused by the direct operation of the microprocessor as operating environment elements.

Further, in the electronic computer according to the present invention, the operating environment element detecting circuit includes various status elements which are not caused by the package temperature of the microprocessor, the power supply voltage, the setting of the microprocessor itself and the direct operation of the microprocessor. , Any one or more elements are detected as operating environment elements.

Further, in the electronic computer according to any one of claims 1 to 8, a voltage controlled oscillator is applied to the variable frequency oscillating circuit, the output data of the ROM is D / A converted, and then the voltage controlled oscillator is used at the output. Is controlled.

Further, in the electronic computer according to any one of claims 1 to 8, the variable frequency oscillation circuit is provided with a PL.
The L oscillating circuit is applied to control the PLL oscillating circuit by using the output data of the ROM as a frequency division ratio of the PLL oscillating circuit.

[0020]

According to the first aspect of the present invention, the operating environment element detecting circuit detects the level of the operating environment element that affects the execution speed of the microprocessor, and uses the operating environment element data as an address input to oscillate the variable frequency oscillator circuit. The oscillation frequency of the variable frequency oscillation circuit is controlled based on the output result of the ROM that outputs the data for controlling the frequency, and the output of this variable frequency oscillation circuit is used as the operation clock of the microprocessor to determine the operating speed of the microprocessor. Take control.

According to the second aspect, the package temperature of the microprocessor is detected by the operating environment element detection circuit, and the operating speed of the microprocessor is controlled according to the detection.

In the third aspect, the temperature measuring element formed as the operating environment element detecting circuit on the same circuit constituent film as the microprocessor increases the temperature detection accuracy of the microprocessor and suppresses an increase in physical volume. ..

Further, according to the fourth aspect, the temperature measuring element is arranged in the same package as the microprocessor, so that the temperature measurement can be performed without changing the circuit structure film of the existing microprocessor as compared with the third aspect. It can be handled only by adding elements and changing packages.

According to the present invention, the operating environment element detecting circuit detects the power supply voltage applied to the microprocessor, and controls the operating speed of the microprocessor according to the detection.

Further, in the present invention, the operating environment element detecting circuit detects the setting of the microprocessor itself and controls the operating speed of the microprocessor according to the detection.

According to the present invention, the operating environment element detecting circuit detects various status elements which are not caused by the direct operation of the microprocessor, and controls the operating speed of the microprocessor according to the detection.

Further, according to the present invention, the operating environment element detecting circuit is used to set one or more of various status elements which are not caused by the package temperature of the microprocessor, the power supply voltage, the setting of the microprocessor itself and the direct operation of the microprocessor. Element is detected and the operating speed of the microprocessor is controlled according to the detection.

According to the ninth aspect of the invention, by applying the voltage controlled oscillator to the variable frequency oscillation circuit of the first to eighth aspects, the operating speed of the microprocessor is controlled so that the output step of D / A conversion is the minimum step. To do.

In the tenth aspect of the invention, the PLL oscillation circuit is applied to the variable frequency oscillator of the first to eighth aspects, whereby the operating speed of the microprocessor is controlled with extremely high accuracy.

[0030]

【Example】

Example 1. FIG. 1 is a circuit block diagram showing an embodiment of the present invention, and shows an example in which claim 2 and claim 7 are added to claim 1. In FIG. 1, FIG.
The same reference numerals denote the same or corresponding parts. 1 is an operating environment element detection circuit consisting of a temperature detection circuit, 12 is an A / D conversion circuit, 13 is a ROM, 14 is a D / A conversion circuit, 15 is a voltage controlled oscillator, 16 is a D / A conversion circuit 14 and voltage control Variable frequency oscillation circuit which is the whole of the oscillator 15, 17 temperature data, 18 frequency control data of the voltage controlled oscillator 15, 1
Reference numeral 9 is a frequency control signal of the voltage controlled oscillator 15, and 20 is a processor clock signal.

The ROM 13 stores in advance frequency control data of the voltage controlled oscillator 15 that can obtain a desired oscillation frequency by inputting a temperature value as an address as an operating environment element of the microprocessor 6.
Further, the temperature detection circuit 1 as the operating environment element detection circuit is installed at a position where the temperature of the microprocessor 6 during operation can be detected or is attached to the microprocessor 6.

The next operation will be described. In FIG. 1, a temperature detection circuit 1 as an operation environment element detection circuit outputs an output voltage signal 7 corresponding to the temperature during operation of the microprocessor 6. The A / D conversion circuit 12 performs level quantization based on the output voltage signal 7 and outputs temperature data 17. The ROM 13 inputs the temperature data 17 to its own address terminal and outputs the frequency control data 18 of the voltage controlled oscillator 15 for controlling the variable frequency oscillating circuit 16 for generating a clock having a frequency corresponding to the temperature data 17 programmed in advance. Is output.

The D / A conversion circuit 14 uses the frequency control data 1
8 is input, and the corresponding frequency control signal 19 is output. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency as a processor clock signal 20. The microprocessor 6 operates using the processor clock signal 20 as a clock. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to temperature.

Example 2. Second Embodiment Next, FIG. 2 is a circuit block diagram showing a second embodiment of the present invention, and shows an example in which claims 3 and 7 are added to claim 1. In FIG.
The same reference numerals as those in FIGS. 1 and 18 denote the same or corresponding parts. Here, the power supply voltage detection circuit as the operating environment element detection circuit 21 outputs the output voltage signal 23 according to the power supply voltage. Further, the A / D conversion circuit 22 receiving this performs level quantization and outputs power supply voltage data 24.

The ROM 13 stores the frequency control data of the voltage controlled oscillator that can obtain a desired oscillation frequency by previously inputting the value of the power supply voltage as an address as an operating environment element of the microprocessor.

Next, the operation will be described. In FIG. 2, a power supply voltage detection circuit 21 as an operating environment element detection circuit outputs an output voltage signal 23 corresponding to the power supply voltage during operation of the microprocessor 6. The A / D conversion circuit 22 performs level quantization based on the output voltage signal 23 and outputs power supply voltage data 24. The ROM 13 inputs the power supply voltage data 24 to its own address terminal and outputs frequency control data 18 for controlling the variable frequency oscillation circuit 16 for generating a clock having a frequency corresponding to the preprogrammed power supply voltage data 24. ..

The D / A conversion circuit 14 uses the frequency control data 1
8 is input, and the corresponding frequency control signal 19 is output. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency as a processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a frequency programmed in advance corresponding to the power supply voltage.

Example 3. Next, FIG. 3 is a circuit block diagram showing a third embodiment of the present invention, and shows an example in the case of adding Claims 4 and 7 to Claim 1. In FIG.
The same reference numerals as those in FIGS. 1 and 18 denote the same or corresponding parts. Reference numeral 25 is operating frequency control data output from the microprocessor 6 which operates according to a program programmed in advance.

It should be noted that the ROM 13 has a microprocessor 6 as an operating environment element of the microprocessor 6 and one or a plurality of signal lines of output ports as address inputs in advance, and a voltage controlled oscillator 15 capable of obtaining a desired oscillation frequency in accordance therewith. The frequency control data of is stored.

Next, the operation will be described. In FIG. 3, the microprocessor 6 uses the operating frequency control data 25.
Is output. The ROM 13 inputs the operating frequency control data 25 to its own address terminal and outputs the frequency control data 18 for controlling the variable frequency oscillating circuit 16 for generating the clock of the frequency corresponding to the pre-programmed operating frequency control data 25. Output.

The D / A conversion circuit 14 uses the frequency control data 1
8 is input, and the corresponding frequency control signal 19 is output. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency as a processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to its own settings.

Example 4. Next, FIG. 4 is a circuit block diagram showing a fourth embodiment of the present invention, and shows an example in which claims 5 and 7 are added to claim 1. In FIG.
The same reference numerals as those in FIGS. 1 and 18 denote the same or corresponding parts. 33 are various status elements that are not caused by the direct operation of the microprocessor 6.

It should be noted that the ROM 6 is previously stored in the ROM 13 as an operating environment element of the microprocessor.
The frequency control data of the voltage controlled oscillator 15 that can obtain a desired oscillation frequency is stored by using various status elements that are not caused by the direct operation of 1 as an address input.

Next, the operation will be described. In FIG. 4, the ROM 13 inputs various stator elements 33 that are not caused by the direct operation of the microprocessor to its own address terminals, and clocks clocks of frequencies corresponding to various status elements 33 that are not caused by the direct operation of the microprocessor 6 that are programmed in advance. Variable frequency oscillator circuit 1 for generating
The frequency control data 18 for controlling 6 is output.

The D / A conversion circuit 14 uses the frequency control data 1
8 is input, and the corresponding frequency control signal 19 is output. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency as a processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to the various status elements 33 that are not caused by the direct operation of the microprocessor.

Example 5. Next, FIG. 5 is a circuit block diagram showing a fifth embodiment of the present invention, and shows an example in which claims 6 and 7 are added to claim 1. In FIG.
The same reference numerals as those in FIGS. 1 to 4 and 18 denote the same or corresponding portions.

It should be noted that the ROM 13 has a temperature value, a power supply voltage value, one or a plurality of signal lines of the output port of the microprocessor 6 and various kinds of direct operation of the microprocessor 6 as operating environment elements of the microprocessor 6 in advance. Frequency control data of a voltage controlled oscillator capable of obtaining a desired oscillation frequency is stored in correspondence with any one or more elements of the status element as an address input. Further, the temperature detection circuit 1 is installed at a position where the temperature during the operation of the microprocessor 6 can be detected or adhered to the microprocessor 6.

Next, the operation will be described. In FIG. 5, the power supply voltage detection circuit 21 outputs an output voltage signal 23 corresponding to the power supply voltage during operation of the microprocessor 6. The A / D conversion circuit 22 performs level quantization based on the output voltage signal 23 and outputs power supply voltage data 24. Further, the temperature detection circuit 1 outputs an output voltage signal 7 corresponding to the temperature during the operation of the microprocessor 6.

The A / D conversion circuit 12 performs level quantization on the basis of the output voltage signal 7 and outputs temperature data 17. On the other hand, the microprocessor 6 uses the operating frequency control data 25
Is output. The ROM 13 inputs the power supply voltage data 24, the temperature data 17, the operating frequency control data 25, and various status elements 33 that are not caused by the direct operation of the microprocessor 6 to its own address terminals as operating environment elements and is programmed in advance. Frequency control data 18 for controlling the variable frequency oscillation circuit 16 for generating a frequency clock is output.

The D / A conversion circuit 14 uses the frequency control data 1
8 is input, and the corresponding frequency control signal 19 is output. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency as a processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to a plurality of operating environment elements.

Example 6. Next, FIG. 6 is a circuit block diagram showing a sixth embodiment of the present invention, and shows an example in which the first and second claims are combined. In FIG.
The same reference numerals as those in FIGS. 1 and 18 denote the same or corresponding parts. 26 is a PLL oscillation circuit, 27 is a PLL oscillation circuit 26
And the reference numeral 28 is a ROM.

The ROM 28 is a PL capable of obtaining a desired oscillation frequency by previously inputting an address of a temperature value as an operating environment element of the microprocessor 6.
The frequency control data of the L oscillation circuit 26 is stored.
Further, the temperature detection circuit 1 is installed at a position where the temperature during the operation of the microprocessor 6 can be detected or adhered to the microprocessor 6.

Next, the operation will be described. In FIG. 6, the temperature detection circuit 1 outputs an output voltage signal 7 corresponding to the temperature during the operation of the microprocessor 6. The A / D conversion circuit 12 performs level quantization based on the output voltage signal 7 and outputs temperature data 17. ROM 28 has temperature data 1
7 is input to its own address terminal and frequency-divided data 27 for controlling the PLL oscillation circuit 26 for generating a clock having a frequency corresponding to the temperature data 17 programmed in advance is output.

The PLL oscillating circuit 26 receives the frequency-divided data 27 as an input and outputs a clock having a frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to the temperature.

Example 7. FIG. 7 is a circuit block diagram showing a seventh embodiment of the present invention, and shows an example in which the third and eighth aspects are added to the first aspect. 7, the same reference numerals as those in FIGS. 1, 2, 6 and 18 denote the same or corresponding parts.

The ROM 28 stores frequency control data of the PLL oscillation circuit 26 that can obtain a desired oscillation frequency by previously inputting the value of the power supply voltage as an address as an operating environment element of the microprocessor 6.

Next, the operation will be described. In FIG. 7, the power supply voltage detection circuit 21 outputs an output voltage signal 23 corresponding to the power supply voltage during operation of the microprocessor 6. The A / D conversion circuit 22 performs level quantization based on the output voltage signal 23 and outputs power supply voltage data 24. RO
M28 is a PLL oscillation circuit 26 for inputting the power supply voltage data 24 to its own address terminal and generating a frequency clock corresponding to the preprogrammed power supply voltage data 24.
And outputs the frequency division data 27 for controlling.

The PLL oscillating circuit 26 inputs the divided data and outputs a clock having a corresponding frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor operates at a preprogrammed frequency as a function of temperature.

Example 8. FIG. 8 is a circuit block diagram showing an eighth embodiment of the present invention, and shows an example in which claims 4 and 8 are added to claim 1. In FIG.
The same reference numerals as those in FIGS. 3, 6, and 18 indicate the same or corresponding portions. Reference numeral 25 is operating frequency control data output by the microprocessor 6 according to a program programmed in advance.

In the ROM 28, one or more signal lines of the output port of the microprocessor 6 are used as address inputs in advance as operating environment elements of the microprocessor 6, and a desired oscillation frequency can be obtained in accordance with the PLL oscillation circuit 26. The frequency control data of is stored.

Next, the operation will be described. In FIG. 8, the microprocessor 6 uses the operating frequency control data 25.
Is output. The ROM 28 inputs the operating frequency control data 25 to its own address terminal and outputs frequency division data 27 for controlling the PLL oscillation circuit 26 for generating a clock having a frequency corresponding to the preprogrammed operating frequency control data 25.

The PLL oscillator circuit 26 receives the frequency-divided data 27 as an input and outputs a clock having a corresponding frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to its own settings.

Example 9. FIG. 9 is a circuit block diagram showing a ninth embodiment of the present invention, and shows an example in which the fifth and eighth aspects are added to the first aspect. In FIG. 9, FIG.
The same reference numerals as those in FIGS. 4, 6, and 18 indicate the same or corresponding portions. It should be noted that the ROM 28 is capable of obtaining a desired oscillation frequency by previously inputting various status elements which are not caused by the direct operation of the microprocessor as an operating environment element of the microprocessor 6 as an address input.
The frequency control data of the oscillation circuit 26 is stored.

Next, the operation will be described. In FIG. 9, the ROM 28 inputs various status elements 33 which are not caused by the direct operation of the microprocessor 6 to its own address terminals and clocks clocks of frequencies corresponding to the various status elements 33 which are not caused by the direct operation of the microprocessor programmed in advance. PLL oscillator circuit 26 for generating
The frequency-divided data 27 for controlling is output.

The PLL oscillation circuit 26 receives the frequency-divided data 27 as an input and outputs a clock having a corresponding frequency as a processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at the frequency programmed in advance corresponding to the various status elements 33 that are not caused by the direct operation of the microprocessor.

Example 10. FIG. 10 is a first embodiment of the present invention.
It is a circuit block diagram which shows 0, and shows the example at the time of adding Claim 6 and Claim 8 to Claim 1. 10, the same reference numerals as those in FIGS. 1 to 4, 6 and 18 indicate the same or corresponding portions.

In the ROM 28, the temperature value, the power supply voltage value, the value of one or more signal lines of the output port of the microprocessor 6 and the value of the microprocessor 6 are set in advance as operating environment elements of the microprocessor 6. The frequency control data of the PLL oscillation circuit 26 that can obtain a desired oscillation frequency is stored in correspondence with any one or more of the various status elements which are not caused by the direct operation as address inputs. Further, the temperature detection circuit 1 is installed at a position where the temperature during the operation of the microprocessor 6 can be detected or adhered to the microprocessor 6.

The next operation will be described. In FIG. 10, the power supply voltage detection circuit 21 outputs an output voltage signal 23 corresponding to the power supply voltage during operation of the microprocessor 6. The A / D conversion circuit 22 performs level quantization based on the output voltage signal 23 and outputs power supply voltage data 24. The temperature detection circuit 1 outputs an output voltage signal 7 corresponding to the temperature during the operation of the microprocessor 6. A / D conversion circuit 12
Performs level quantization on the basis of the output voltage signal 7 and outputs temperature data 17. The microprocessor 6 outputs the operating frequency control data 25.

The ROM 28 inputs the power supply voltage data 24, the temperature data 17, the operating frequency control data 25, and various status elements 33 not caused by the direct operation of the microprocessor 6 into its own address terminals as operating environment elements in advance. It outputs frequency-divided data 27 that controls the PLL oscillation circuit 26 for generating the clock of the programmed corresponding frequency.

The PLL oscillation circuit 26 receives the divided data 27 as an input and outputs a clock having a corresponding frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at the frequency programmed in advance corresponding to the plurality of operating environment elements.

Example 11. FIG. 11 is a first embodiment of the present invention.
FIG. 11 is a circuit block diagram showing No. 1 and is a concrete example assuming an application example of the tenth example. In FIG.
The same reference numerals as those in FIG. 10 indicate the same or corresponding portions. Reference numeral 44 denotes a DIP switch, which specifically assumes the status element 33 that is not caused by the direct operation of the microprocessor 6.

FIG. 12 is a detailed wiring diagram of the address input side of the ROM 28 of the eleventh embodiment. In FIG.
It is assumed that the relationship between the temperature data 17 and the temperature is shown in Table 1 and the relationship between the power supply voltage data 24 and the power supply voltage is shown in Table 2.

[0073]

[Table 1]

[0074]

[Table 2]

In the ROM 28, the temperature value, the power supply voltage value, one signal line of the output port of the microprocessor 6 and the status not caused by the direct operation of the microprocessor are previously stored as operating environment elements of the microprocessor. A PLL oscillation circuit 26 capable of obtaining a desired oscillation frequency by using the DIP switch 44 as an element as an address input and corresponding to any one or more elements thereof.
The frequency control data of is stored. Further, the temperature detection circuit 1 is installed at a position where the temperature during the operation of the microprocessor can be detected or adhered to the microprocessor.

Data examples of the ROM 28 in the embodiment shown in FIG. 11 are shown in Tables 3 to 6.

[0077]

[Table 3]

[0078]

[Table 4]

[0079]

[Table 5]

[0080]

[Table 6]

Note that the operating speed of the microprocessor 6 assumed in this data example is assumed to exhibit the characteristics shown in FIG. 13 with respect to temperature and the characteristics shown in FIG. 14 with respect to the power supply voltage. The operating frequency with respect to the power supply voltage is assumed to exhibit the characteristics shown in Table 7.

[0082]

[Table 7]

Further, the assumed microprocessor 6 has four
The clock is executed for one cycle time. And P
The reference frequency oscillator of LL oscillator 26 is assumed to apply the oscillator 10KH _Z. Assuming an operating frequency mode switching DIP switch 44 as the status element 33 not caused by the direct operation of the microprocessor 6,
It is assumed that the logic 1 operates at the maximum frequency and the logic 0 operates in the fixed frequency mode.

In the operation frequency control data 25, it is assumed that the operation mode is changed to the standby mode and that the logic 1 is used to operate in the standby mode and the logic 0 is used to operate in the normal frequency mode. The data examples of Examples 1 to 10 can also be applied by partially modifying or reducing them.

Next, the operation will be described. In FIG. 11, the power supply voltage detection circuit 21 outputs an output voltage signal 23 corresponding to the power supply voltage during operation of the microprocessor 6. The A / D conversion circuit 22 performs level quantization based on the output voltage signal 23 and outputs power supply voltage data 24. Further, the temperature detection circuit 1 outputs an output voltage signal 7 corresponding to the temperature during the operation of the microprocessor 6.

The A / D conversion circuit 12 performs level quantization on the basis of the output voltage signal 7 and outputs temperature data 17. On the other hand, the microprocessor 6 outputs operating frequency control data. The ROM 28 is pre-programmed by inputting the power supply voltage data 24, the temperature data 17, the operating frequency control data 25, and various status elements 33 not caused by the direct operation of the microprocessor 6 to its own address terminals as operating environment elements. Divided data 2 for controlling the PLL oscillation circuit 26 for generating a clock of a corresponding frequency
7 is output.

The PLL oscillation circuit 26 receives the divided data 27 as an input and outputs a clock having a corresponding frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to a plurality of operating environment elements.

Here, with the patterns of the ROM 28 shown in Tables 3 to 6 assumed in this embodiment, the following operations are performed.
When the signal line of the DIP switch 44, which is assumed as various status elements 33 not caused by the direct operation of the microprocessor 6, is at the H level, the output of the ROM 28 is 10 so that the microprocessor 6 operates reliably within the normal operation range.
Outputs "105" in Decimal, the microprocessor 6 in clock 1.05MH _Z operates.

When the signal line of the DIP switch 44 is at the L level, the microprocessor 6 operates at the maximum operating speed depending on the power supply voltage in the range of -40 ° C to 85 ° C. In addition,
KT = −0.004 / ° C. outside the range of −40 ° C. to 85 ° C.
The derating is assumed and a pattern is expected in which normal operation is expected even if the recommended operating speed of the microprocessor 6 is out of the guaranteed operating temperature range.

When the operation frequency control data 25 set by the microprocessor itself shifts to the standby mode operation due to the frequency decrease by the logic 1, the DIP switch 4
The output of the minimum operating speed becomes as ROM28 microprocessor 6 regardless of 4 states the microprocessor 6 in clock 30KH _Z outputs "3" in decimal operates.

Example 12 FIG. 15 shows claim 9 of the present invention.
FIG. 13 is an image diagram of formation of the temperature detecting element according to Example 12 shown in FIG. In FIG. 15, 29 is a circuit configuration film, 30 is a temperature detection element, 31 is a logic part of a microprocessor,
32 is a microprocessor package. Here, the temperature detection element 30 is arranged on the same circuit structure film as the logic section 31 of the microprocessor 6.

FIG. 15 shows an example in which the temperature detecting element 30 and the logic portion 31 of the microprocessor 6 are arranged on the same circuit constituting film 29. The shapes of the temperature detecting element 30 and the logic portion 31 of the microprocessor are not limited to this shape, and are arbitrary.

Example 13 FIG. 16 shows the first embodiment of the present invention.
FIG. 13 is a block diagram showing No. 3, showing an example in which a general-purpose communication controller and a modem are applied to the objects of the operating environment elements in the tenth embodiment, and the operating environment elements of temperature and power supply voltage are deleted for the sake of space and explanation. .. In FIG. 16, FIG.
The same symbols as 0 indicate the same or corresponding parts. 34 is a general-purpose communication controller, 35 is a modem, 36 is a DTR signal,
37 is a DSR signal, 38 is an RTS signal, 39 is a CTS signal, 40 is a ReceiveREADY signal, and 41 is Tr.
sendREADY signal, 42 is a communication line, and 43 is a bus of the microprocessor.

In the ROM 28, the DTR signal 36 and the RTS signal 3 corresponding to the settings of the microprocessor itself are previously stored as operating environment elements of the microprocessor 6.
8, and the DSR signal 37, the CTS signal 39, and the ReceiveRE that are not caused by the direct operation of the microprocessor 6.
ADY signal 40 and Transmit READY signal 41
A PLL capable of obtaining a desired oscillation frequency in response to any one or a plurality of elements by using as an address input
The frequency control data of the oscillation circuit 26 is stored.

Next, the operation will be described. In FIG. 16, the general-purpose communication controller 34 is the microprocessor 6
The DTR signal 36 is set to the start-up side for the modem 35 in accordance with the setting. The modem 35 notifies the startup stable state to the microprocessor 6 via the general-purpose communication controller 34 by the DSR signal 37. After that, the microprocessor 6 performs the transmission operation while controlling the RTS signal 38.

When the modem 35 side cannot transmit due to some reason, the CTS signal 39 allows the microprocessor 6 to know via the general-purpose communication controller 34. The state of the data buffer of the general-purpose communication controller used during transmission or reception is Transmit
READY signal 41, Receive READY signal 4
You can know by 0.

The ROM 28 has a DTR signal 36, a DSR signal 37, an RTS signal 38, a CTS signal 39, and a Receive.
The eREADY signal 40 and the TransmitREADY signal 41 are input to its own address terminal as an operating environment element, and frequency-divided data 27 for controlling the PLL oscillation circuit 26 for generating the clock of the corresponding programmed frequency is output.

The PLL oscillation circuit 26 receives the divided data 27 as an input and outputs a clock having a corresponding frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to a plurality of operating environment elements.

Example 14. FIG. 17 is a first embodiment of the present invention.
4 is a block diagram showing No. 4 and shows an example in which a magnetic disk controller and a magnetic disk drive are applied to an object of an operating environment element in Embodiment 4. FIG. 17, the same reference numerals as those in FIG. 4 denote the same or corresponding parts. 43 is a microprocessor bus, 44 is a magnetic disk controller, 45 is a magnetic disk drive, and 46 is Read.
y signal, 47 motor drive signal, 48 HLD signal,
49 is an HLT signal.

In the ROM 13, as an operating environment element of the microprocessor 6, the Ready signal 46, the motor drive signal 47, the HLD signal 48, and the HLT signal 49, which are not caused by the direct operation of the microprocessor 6, are used as address inputs in advance. The frequency control data of the voltage controlled oscillator circuit 16 capable of obtaining a desired oscillation frequency corresponding to one or a plurality of elements is stored.

Next, the operation will be described. In FIG. 17, the magnetic disk controller 44 operates the necessary control lines according to the request of the microprocessor 6 as necessary to access the magnetic disk drive 45. ROM1
3 is Ready signal 46, motor drive signal 47 and HL
The D signal 48 and the HLT signal 49 are input to its own address terminal and the frequency control data 18 for controlling the variable frequency oscillation circuit 16 for generating the clock of the corresponding programmed frequency is output.

The D / A conversion circuit 14 inputs the frequency data 18 and outputs a corresponding frequency control signal 19. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency to the processor clock signal 20.
Output as. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to a plurality of operating environment elements.

In this embodiment, R is used to detect a state requiring high-speed processing by the microprocessor 6 from the control line.
Although the easy signal 46, the motor drive signal 47, the HLD signal 48, and the HLT signal 49 have been taken as an example, the present invention is not limited to this control line. It is also conceivable to generate a status that requires high-speed processing by the microprocessor 6 from an existing signal by adding another circuit.

[0104]

The majority of recent microprocessors have a CMOS structure. This CMOS structure device has a characteristic that the maximum operating speed changes significantly with respect to operating environment elements such as temperature and power supply voltage, not limited to the microprocessor. Since the variable frequency oscillation circuit is controlled based on the ROM data having the detected value as an address and the output thereof is used as the operation clock, the microprocessor can always be operated at the maximum operation speed. In addition, the change of the oscillation frequency change pattern for various operating environment elements is RO
This can be done by only changing the inside of M. As a result, it is possible to include the limited frequency control such as the maximum frequency and the minimum frequency by the data pattern in the ROM. Even when frequency control is performed by other elements, R
This is easily possible by increasing the OM address width and adding a data pattern inside the ROM.

According to the second aspect, the operating speed of the microprocessor can be automatically controlled in a wide range and precisely with respect to the temperature element that greatly affects the operating speed of the microprocessor. It is possible to operate the processor at the maximum operation speed.

According to the third aspect of the invention, the temperature detection accuracy of the microprocessor is improved, and the increase in physical volume can be suppressed.

Further, according to claim 4, it is possible to cope with claim 3 by only adding a temperature measuring element and changing the package without changing the circuit structure film of the existing microprocessor. The increase in the cost of the microprocessor can be suppressed significantly from the third aspect while ensuring the temperature detection accuracy equivalent to that of the third aspect.

According to the present invention, the operating speed of the microprocessor is automatically adjusted to a wide range with respect to the element of the power supply voltage which has a great influence on the operating speed of the microprocessor.
In addition, since it can be precisely controlled, the microprocessor can always be operated at the maximum operation speed.

According to the sixth aspect of the invention, the processor clock of itself can be controlled by the operating frequency control data output signal according to the setting of the microprocessor programmed in advance as the operating environment element, so that the clock frequency lowers from the normal operating speed. It is possible to easily perform control such as shifting to the standby mode operation and the low power consumption mode operation.

Further, according to claim 7, a high speed data input / output device such as a disk drive or a modem connected to the microprocessor can operate at high speed when necessary by a control signal which these devices necessarily have. It is possible to lower the clock and shift to low power operation / standby operation when unnecessary.

According to the eighth aspect, all of the above operating elements can be simultaneously and comprehensively determined by selecting the ROM data pattern, and the operating speed of the microprocessor can be controlled.

According to the ninth or tenth aspect, the problems described in the conventional example are eliminated from the operating characteristics of the oscillation circuit.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention in which claims 2 and 7 are added to claim 1 of the present invention.

FIG. 2 is a block diagram showing a second embodiment of the present invention in which claims 3 and 7 are added to claim 1 of the present invention.

FIG. 3 is a block diagram showing a third embodiment of the present invention in which claims 4 and 7 are added to claim 1 of the present invention.

FIG. 4 is a block diagram showing a fourth embodiment of the present invention in which claims 5 and 7 are added to claim 1 of the present invention.

FIG. 5 is a block diagram showing a fifth embodiment of the present invention in which claims 6 and 7 are added to claim 1 of the present invention.

FIG. 6 is a block diagram showing a sixth embodiment of the present invention in which Claims 2 and 8 are added to Claim 1 of the present invention.

FIG. 7 is a block diagram showing a seventh embodiment of the present invention in which the third and eighth aspects are added to the first aspect of the present invention.

FIG. 8 is a block diagram showing an eighth embodiment of the present invention in which claims 4 and 8 are added to claim 1 of the present invention.

FIG. 9 is a block diagram showing an embodiment 9 of the present invention, which is obtained by adding claim 5 and claim 8 to claim 1 of the present invention.

FIG. 10 Claims 6 and 8 according to claim 1 of the present invention
It is a block diagram which shows Example 10 of this invention which considered.

FIG. 11 is a configuration diagram of an eleventh embodiment in which the tenth embodiment is partially embodied.

12 is a connection diagram showing details of connection of address signal lines of a ROM in FIG.

FIG. 13 is a characteristic diagram showing temperature vs. operating frequency characteristics of the microprocessor assumed in Example 11;

FIG. 14 is a characteristic diagram showing power supply voltage versus operating frequency characteristics of the microprocessor assumed in Example 11;

FIG. 15 is an image formation diagram of a temperature detecting element according to a twelfth embodiment described in claim 9 of the present invention.

16] Claims 6 and 8 according to claim 1 of the present invention
It is a block diagram which shows Example 13 of this invention which considered.

[FIG. 17] Claims 1 and 5 of the present invention
It is a block diagram which shows Example 14 of this invention which considered.

FIG. 18 is a circuit block diagram for explaining a clock generation circuit of a conventional electronic computer.

FIG. 19 is a circuit diagram for explaining a clock switching circuit in a clock generation circuit of a conventional electronic computer.

FIG. 20 is a circuit diagram of a clock switching control hysteresis comparator in a conventional clock generation circuit of an electronic computer.

[Explanation of symbols]

1 Temperature Detection Circuit 2 Comparator (Level Comparator) 3 Clock A Generation Circuit 4 Clock B Generation Circuit 5 Clock Switching Circuit 6 Microprocessor 7 Temperature Detection Circuit Output Voltage Signal 8 Clock Selection Signal 9 Clock A Signal 10 Clock B Signal 11 Selected Clock Signal 12 A / D conversion circuit (for temperature detection circuit) 13 ROM (for voltage control oscillator) 14 D / A conversion circuit 15 Voltage control oscillator 16 Variable frequency oscillation circuit 17 Temperature data 18 Voltage control oscillator Frequency control data 19 Voltage control oscillator Frequency control signal 20 Processor clock signal 21 Power supply voltage detection circuit 22 A / D conversion circuit (for power supply voltage detection circuit) 23 Power supply voltage detection circuit output voltage signal 24 Power supply voltage data 25 Operating frequency control data 26 PLL oscillation circuit 27 PLL oscillation circuit Frequency division 28 ROM (for PLL oscillation circuit) 29 Circuit configuration film 30 Temperature detection element 31 Microprocessor logic section 32 Microprocessor package 33 Various status elements not caused by direct operation of microprocessor 34 General-purpose communication controller 35 Modem 36 DTR signal 37 DSR Signal 38 RTS signal 39 CTS signal 40 Receive Ready signal 41 Transmit Ready signal 42 Communication line 43 Microprocessor bus 44 DIP switch

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[Procedure amendment]

[Submission date] April 16, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Full text

[Correction method] Change

[Correction content]

[Document name] Statement

[Title of Invention] Electronic computer

[Claims]

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic computer, and more particularly to an electronic computer for controlling the operation speed of a microprocessor in accordance with operating environment factors of the microprocessor.

[0002]

2. Description of the Related Art Conventionally, as this type of device, there has been one as shown in FIG. This figure shows Japanese Patent Laid-Open No. 3-62611.
In the figure, 1 is a thermistor temperature detection circuit, 2 is a comparator, 3 is a clock A generation circuit, 4 is a clock B generation circuit, 5 is a clock switching circuit, 6 is a microprocessor, 7 is an output voltage signal corresponding to the detected temperature, 8 is a clock selection signal, 9 is a clock A signal generated by the clock A generation circuit, 10 is a clock B signal generated by the clock B generation circuit, and 11 is a clock switching circuit 5. This is the selected clock signal to be output.

Next, the operation will be described. The temperature detection circuit 1 outputs a voltage proportional to the ambient temperature to the comparator 2 as an output voltage signal 7. This comparator 2 compares the temperature detection signal 7 with a reference voltage signal generated inside the comparator, and if the output voltage signal 7 is higher than the reference voltage, it becomes a logic "1", and vice versa. If the voltage is lower than the reference voltage, the clock selection signal 8 that is logical "0" is output.

The clock A generation circuit 3 and the clock B generation circuit 4 respectively include a clock A signal 9 and a clock B signal 1.
Outputs 0. The clock A signal 9 is the clock B
It is a clock signal having a frequency lower than that of the signal 10. The clock switching circuit 5 selects the clock B signal 10 having a high frequency when the clock selection signal 8 is logic "0", that is, when the ambient temperature is lower than a certain reference, and when the clock selection signal 8 is logic "1", that is, When the ambient temperature is higher than a certain reference, the clock A signal 9 having a low frequency is selected and output to the microprocessor 6 as the selected clock signal 11.

[0005]

By the way, since the operation clock control method of the conventional example is as described above,
It is necessary to configure the clock switching circuit 5 itself so as not to output glitch noise at the time of clock switching. For example, as shown in FIG. It states that it is necessary to deal with a circuit that is not easy such as a logic circuit that becomes. This also indicates that it is not easy to switch clock frequencies at critical points.

Further, in the circuit shown in FIG. 19, both clocks are temporarily in the non-selected state at the moment when the clock switching occurs, and when the clock switching operation occurs frequently, the actual clock frequency may decrease. There is a problem that there is a property.

Further, in order to prevent the selection operation from becoming unstable at the critical point where clock switching occurs, it is necessary to provide this portion with a hysteresis characteristic. For example, as shown in FIG. 2b-2
Comparator 2 having a hysteresis characteristic composed of e
Indicates that it is necessary to deal with it.

Further, as prior arts of this type, for example, JP-A-62-102609 and JP-A-64-48119.
Japanese Patent Laid-Open No. 2-76056 and Japanese Patent Laid-Open No. 2-5133 disclose techniques for detecting an operating environment element and controlling the operating speed of a clock or a functional circuit. The control configurations were different.

The present invention has been made to solve the above-mentioned problems, and the clock frequency for determining the operating speed of the microprocessor can be varied over a wide range and continuously according to the operating environment elements of the microprocessor. The purpose is to obtain an electronic calculator that can.

[0010]

An electronic computer according to claim 1 of the present invention includes an operating environment element detecting circuit for detecting an operating environment element of a microprocessor and converting it into an electric signal.
The variable frequency oscillation circuit is provided with a ROM preprogrammed with data for controlling the oscillation frequency based on the level of the operation environment element output from the operation environment element detection circuit, and a variable frequency oscillation circuit controlled by the data in the ROM. It is characterized in that the output of the circuit is used as an operation clock.

Further, in the electronic computer according to the present invention, the operating environment element detecting circuit detects the package temperature of the microprocessor as an operating environment element.

Further, in the electronic computer according to the present invention, as the operating environment element detecting circuit, a temperature measuring element is formed on the same circuit constituent film as the microprocessor, and the output of the temperature measuring element is used as the operating environment element. It is characterized in that it is used as a detection output.

Further, in the electronic computer according to the present invention, as the operating environment element detecting circuit, a temperature measuring element is arranged in the same package as the microprocessor,
The output of the temperature measuring element is used as the detection output of the operating environment element.

Further, in the electronic computer according to the present invention, the operating environment element detecting circuit detects the power supply voltage of the microprocessor as an operating environment element.

Further, in the electronic computer according to the present invention, the operating environment element detecting circuit detects a setting made by the microprocessor itself as an operating environment element by a program programmed in advance.

Further, in the electronic computer according to the first aspect, the operating environment element detecting circuit detects various status elements which are not caused by the direct operation of the microprocessor as operating environment elements.

Further, in the electronic computer according to the present invention, the operating environment element detecting circuit includes various status elements which are not caused by the package temperature of the microprocessor, the power supply voltage, the setting of the microprocessor itself and the direct operation of the microprocessor. , Any one or more elements are detected as operating environment elements.

Further, in the electronic computer according to any one of claims 1 to 8, a voltage controlled oscillator is applied to the variable frequency oscillating circuit, the output data of the ROM is D / A converted, and then the voltage controlled oscillator is used at the output. Is controlled.

Further, in the electronic computer according to any one of claims 1 to 8, the variable frequency oscillation circuit is provided with a PL.
The L oscillating circuit is applied to control the PLL oscillating circuit by using the output data of the ROM as a frequency division ratio of the PLL oscillating circuit.

[0020]

According to the first aspect of the present invention, the operating environment element detecting circuit detects the level of the operating environment element that affects the execution speed of the microprocessor, and uses the operating environment element data as an address input to oscillate the variable frequency oscillator circuit. The oscillation frequency of the variable frequency oscillation circuit is controlled based on the output result of the ROM that outputs the data for controlling the frequency, and the output of this variable frequency oscillation circuit is used as the operation clock of the microprocessor to determine the operating speed of the microprocessor. Take control.

According to the second aspect, the package temperature of the microprocessor is detected by the operating environment element detection circuit, and the operating speed of the microprocessor is controlled according to the detection.

In the third aspect, the temperature measuring element formed as the operating environment element detecting circuit on the same circuit constituent film as the microprocessor increases the temperature detection accuracy of the microprocessor and suppresses an increase in physical volume. ..

Further, according to the fourth aspect, the temperature measuring element is arranged in the same package as the microprocessor, so that the temperature measurement can be performed without changing the circuit structure film of the existing microprocessor as compared with the third aspect. It can be handled only by adding elements and changing packages.

According to the present invention, the operating environment element detecting circuit detects the power supply voltage applied to the microprocessor, and controls the operating speed of the microprocessor according to the detection.

Further, in the present invention, the operating environment element detecting circuit detects the setting of the microprocessor itself and controls the operating speed of the microprocessor according to the detection.

According to the present invention, the operating environment element detecting circuit detects various status elements which are not caused by the direct operation of the microprocessor, and controls the operating speed of the microprocessor according to the detection.

Further, according to the present invention, the operating environment element detecting circuit is used to set one or more of various status elements which are not caused by the package temperature of the microprocessor, the power supply voltage, the setting of the microprocessor itself and the direct operation of the microprocessor. Element is detected and the operating speed of the microprocessor is controlled according to the detection.

According to the ninth aspect of the invention, by applying the voltage controlled oscillator to the variable frequency oscillation circuit of the first to eighth aspects, the operating speed of the microprocessor is controlled so that the output step of D / A conversion is the minimum step. To do.

In the tenth aspect of the invention, the PLL oscillation circuit is applied to the variable frequency oscillator of the first to eighth aspects, whereby the operating speed of the microprocessor is controlled with extremely high accuracy.

[0030]

EXAMPLES Example 1. FIG. 1 is a circuit block diagram showing an embodiment of the present invention, and shows an example in which claim 2 and claim 9 are added to claim 1. In FIG. 1, FIG.
The same reference numerals denote the same or corresponding parts. 1 is an operating environment element detection circuit consisting of a temperature detection circuit, 12 is an A / D conversion circuit, 13 is a ROM, 14 is a D / A conversion circuit, 15 is a voltage controlled oscillator, 16 is a D / A conversion circuit 14 and voltage control A variable frequency oscillation circuit which is the whole of the oscillator 15, 17 is temperature data, 18 is frequency control data of the voltage controlled oscillator 15,
Reference numeral 19 is a frequency control signal of the voltage controlled oscillator 15, and 20 is a processor clock signal.

The ROM 13 stores in advance frequency control data of the voltage controlled oscillator 15 that can obtain a desired oscillation frequency by inputting a temperature value as an address as an operating environment element of the microprocessor 6.
Further, the temperature detection circuit 1 as the operating environment element detection circuit is installed at a position where the temperature of the microprocessor 6 during operation can be detected or is attached to the microprocessor 6.

The next operation will be described. In FIG. 1, a temperature detection circuit 1 as an operation environment element detection circuit outputs an output voltage signal 7 corresponding to the temperature during operation of the microprocessor 6. The A / D conversion circuit 12 performs level quantization based on the output voltage signal 7 and outputs temperature data 17. The ROM 13 inputs the temperature data 17 to its own address terminal and outputs the frequency control data 18 of the voltage controlled oscillator 15 for controlling the variable frequency oscillating circuit 16 for generating a clock having a frequency corresponding to the temperature data 17 programmed in advance. Is output.

The D / A conversion circuit 14 uses the frequency control data 1
8 is input, and the corresponding frequency control signal 19 is output. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency as a processor clock signal 20. The microprocessor 6 operates using the processor clock signal 20 as a clock. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to temperature.

Example 2. Second Embodiment Next, FIG. 2 is a circuit block diagram showing a second embodiment of the present invention, and shows an example in which claims 5 and 9 are added to claim 1. In FIG.
The same reference numerals as those in FIGS. 1 and 18 denote the same or corresponding parts. Here, the power supply voltage detection circuit as the operating environment element detection circuit 21 outputs the output voltage signal 23 according to the power supply voltage. Further, the A / D conversion circuit 22 receiving this performs level quantization and outputs power supply voltage data 24.

The ROM 13 stores the frequency control data of the voltage controlled oscillator that can obtain a desired oscillation frequency by previously inputting the value of the power supply voltage as an address as an operating environment element of the microprocessor.

Next, the operation will be described. In FIG. 2, a power supply voltage detection circuit 21 as an operating environment element detection circuit outputs an output voltage signal 23 corresponding to the power supply voltage during operation of the microprocessor 6. The A / D conversion circuit 22 performs level quantization based on the output voltage signal 23 and outputs power supply voltage data 24. The ROM 13 inputs the power supply voltage data 24 to its own address terminal and outputs frequency control data 18 for controlling the variable frequency oscillation circuit 16 for generating a clock having a frequency corresponding to the preprogrammed power supply voltage data 24. ..

The D / A conversion circuit 14 uses the frequency control data 1
8 is input, and the corresponding frequency control signal 19 is output. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency as a processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a frequency programmed in advance corresponding to the power supply voltage.

Example 3. Next, FIG. 3 is a circuit block diagram showing a third embodiment of the present invention, and shows an example in which claims 6 and 9 are added to claim 1. In FIG.
The same reference numerals as those in FIGS. 1 and 18 denote the same or corresponding parts. Reference numeral 25 is operating frequency control data output from the microprocessor 6 which operates according to a program programmed in advance.

In the ROM 13, one or a plurality of signal lines of the output port of the microprocessor 6 are input as an address as an operating environment element of the microprocessor 6 in advance, and a voltage controlled oscillator 15 capable of obtaining a desired oscillation frequency according to the address input. The frequency control data of is stored.

Next, the operation will be described. In FIG. 3, the microprocessor 6 uses the operating frequency control data 25.
Is output. The ROM 13 inputs the operating frequency control data 25 to its own address terminal and outputs the frequency control data 18 for controlling the variable frequency oscillating circuit 16 for generating the clock of the frequency corresponding to the pre-programmed operating frequency control data 25. Output.

The D / A conversion circuit 14 uses the frequency control data 1
8 is input, and the corresponding frequency control signal 19 is output. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency as a processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to its own settings.

Example 4. Next, FIG. 4 is a circuit block diagram showing a fourth embodiment of the present invention, and shows an example in which claims 7 and 9 are added to claim 1. In FIG.
The same reference numerals as those in FIGS. 1 and 18 denote the same or corresponding parts. 33 are various status elements that are not caused by the direct operation of the microprocessor 6.

It should be noted that the ROM 6 is previously stored in the ROM 13 as an operating environment element of the microprocessor.
The frequency control data of the voltage controlled oscillator 15 that can obtain a desired oscillation frequency is stored by using various status elements that are not caused by the direct operation of 1 as an address input.

Next, the operation will be described. In FIG. 4, the ROM 13 inputs various stator elements 33 that are not caused by the direct operation of the microprocessor to its own address terminals, and clocks clocks of frequencies corresponding to various status elements 33 that are not caused by the direct operation of the microprocessor 6 that are programmed in advance. Variable frequency oscillator circuit 1 for generating
The frequency control data 18 for controlling 6 is output.

The D / A conversion circuit 14 uses the frequency control data 1
8 is input, and the corresponding frequency control signal 19 is output. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency as a processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to the various status elements 33 that are not caused by the direct operation of the microprocessor.

Example 5. Next, FIG. 5 is a circuit block diagram showing a fifth embodiment of the present invention, and shows an example in which claims 8 and 9 are added to claim 1. In FIG.
The same reference numerals as those in FIGS. 1 to 4 and 18 denote the same or corresponding portions.

It should be noted that the ROM 13 has a temperature value, a power supply voltage value, one or a plurality of signal lines of the output port of the microprocessor 6 and various kinds of direct operation of the microprocessor 6 as operating environment elements of the microprocessor 6 in advance. Frequency control data of a voltage controlled oscillator capable of obtaining a desired oscillation frequency is stored in correspondence with any one or more elements of the status element as an address input. Further, the temperature detection circuit 1 is installed at a position where the temperature during the operation of the microprocessor 6 can be detected or adhered to the microprocessor 6.

Next, the operation will be described. In FIG. 5, the power supply voltage detection circuit 21 outputs an output voltage signal 23 corresponding to the power supply voltage during operation of the microprocessor 6. The A / D conversion circuit 22 performs level quantization based on the output voltage signal 23 and outputs power supply voltage data 24. Further, the temperature detection circuit 1 outputs an output voltage signal 7 corresponding to the temperature during the operation of the microprocessor 6. The A / D conversion circuit 12 performs level quantization based on the output voltage signal 7 and outputs temperature data 17. On the other hand, the microprocessor 6 outputs the operating frequency control data 25. ROM13
Is a power supply voltage data 24, temperature data 17, operating frequency control data 25, and various status elements 33 which are not caused by direct operation of the microprocessor 6 are input to its own address terminals as operating environment elements, and the corresponding frequency is programmed in advance. The frequency control data 18 for controlling the variable frequency oscillating circuit 16 for generating the clock is output.

The D / A conversion circuit 14 uses the frequency control data 1
8 is input, and the corresponding frequency control signal 19 is output. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency as a processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to a plurality of operating environment elements.

Example 6. Next, FIG. 6 is a circuit block diagram showing a sixth embodiment of the present invention, and shows an example in which the first and second claims are combined. 6, the same reference numerals as those in FIGS. 1 and 18 indicate the same or corresponding portions. 26 is a PLL oscillation circuit, 27 is a PLL oscillation circuit 2
The frequency division data of 6 and 28 are ROM.

It should be noted that the ROM 28 is a PL capable of obtaining a desired oscillation frequency by inputting a temperature value as an address as an operating environment element of the microprocessor 6 in advance.
The frequency control data of the L oscillation circuit 26 is stored.
Further, the temperature detection circuit 1 is installed at a position where the temperature during the operation of the microprocessor 6 can be detected or adhered to the microprocessor 6.

Next, the operation will be described. In FIG. 6, the temperature detection circuit 1 outputs an output voltage signal 7 corresponding to the temperature during the operation of the microprocessor 6. The A / D conversion circuit 12 performs level quantization based on the output voltage signal 7 and outputs temperature data 17. ROM 28 has temperature data 1
7 is input to its own address terminal and frequency-divided data 27 for controlling the PLL oscillation circuit 26 for generating a clock having a frequency corresponding to the temperature data 17 programmed in advance is output.

The PLL oscillating circuit 26 receives the frequency-divided data 27 as an input and outputs a clock having a frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to the temperature.

Example 7. Embodiment 7 FIG. 7 is a circuit block diagram showing Embodiment 7 of the present invention, and shows an example in which Claim 5 and Claim 10 are added to Claim 1. In FIG. 7, FIG.
The same reference numerals as those in FIGS. 2, 6 and 18 indicate the same or corresponding portions.

The ROM 28 stores frequency control data of the PLL oscillation circuit 26 that can obtain a desired oscillation frequency by previously inputting the value of the power supply voltage as an address as an operating environment element of the microprocessor 6.

Next, the operation will be described. In FIG. 7, the power supply voltage detection circuit 21 outputs an output voltage signal 23 corresponding to the power supply voltage during operation of the microprocessor 6. The A / D conversion circuit 22 performs level quantization based on the output voltage signal 23 and outputs power supply voltage data 24. RO
M28 is a PLL oscillation circuit 26 for inputting the power supply voltage data 24 to its own address terminal and generating a frequency clock corresponding to the preprogrammed power supply voltage data 24.
And outputs the frequency division data 27 for controlling.

The PLL oscillation circuit 26 receives the frequency-divided data as an input and outputs a clock having a corresponding frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor operates at a preprogrammed frequency corresponding to the power supply voltage.

Example 8. FIG. 8 is a circuit block diagram showing an eighth embodiment of the present invention, and shows an example in the case of adding claim 6 and claim 10 to claim 1. 8, the same reference numerals as those in FIGS. 1, 3, 6, and 18 indicate the same or corresponding portions. Reference numeral 25 is operating frequency control data output by the microprocessor 6 according to a program programmed in advance.

In the ROM 28, as an operating environment element of the microprocessor 6, one or more signal lines of the output port of the microprocessor 6 are used as address inputs in advance, and a desired oscillation frequency can be obtained according to the PLL oscillation circuit 26. The frequency control data of is stored.

Next, the operation will be described. In FIG. 8, the microprocessor 6 uses the operating frequency control data 25.
Is output. The ROM 28 inputs the operating frequency control data 25 to its own address terminal and outputs frequency division data 27 for controlling the PLL oscillation circuit 26 for generating a clock having a frequency corresponding to the preprogrammed operating frequency control data 25.

The PLL oscillation circuit 26 receives the frequency-divided data 27 as an input and outputs a clock having a corresponding frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to its own settings.

Example 9. FIG. 9 is a circuit block diagram showing a ninth embodiment of the present invention, and shows an example in which claims 7 and 10 are added to claim 1. 9, the same reference numerals as those in FIGS. 1, 4, 6, and 18 indicate the same or corresponding portions. It should be noted that the ROM 28 can previously obtain a desired oscillation frequency by inputting various status elements, which are not caused by the direct operation of the microprocessor, as address elements in the operating environment of the microprocessor 6 in advance.
The frequency control data of the LL oscillation circuit 26 is stored.

Next, the operation will be described. In FIG. 9, the ROM 28 inputs various status elements 33 which are not caused by the direct operation of the microprocessor 6 to its own address terminals and clocks clocks of frequencies corresponding to the various status elements 33 which are not caused by the direct operation of the microprocessor programmed in advance. PLL oscillator circuit 26 for generating
The frequency-divided data 27 for controlling is output.

The PLL oscillation circuit 26 receives the frequency-divided data 27 as an input and outputs a clock having a corresponding frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at the frequency programmed in advance corresponding to the various status elements 33 that are not caused by the direct operation of the microprocessor.

Example 10. FIG. 10 is a first embodiment of the present invention.
It is a circuit block diagram which shows 0, and shows the example at the time of adding Claim 8 and Claim 10 to Claim 1. 10, the same reference numerals as those in FIGS. 1 to 4, 6 and 18 indicate the same or corresponding portions.

In the ROM 28, the temperature value, the power supply voltage value, the value of one or a plurality of signal lines of the output port of the microprocessor 6, and the value of the microprocessor 6 are set in advance as operating environment elements of the microprocessor 6. The frequency control data of the PLL oscillation circuit 26 that can obtain a desired oscillation frequency is stored in correspondence with any one or more of the various status elements which are not caused by the direct operation as address inputs. Further, the temperature detection circuit 1 is installed at a position where the temperature during the operation of the microprocessor 6 can be detected or adhered to the microprocessor 6.

The next operation will be described. In FIG. 10, the power supply voltage detection circuit 21 outputs an output voltage signal 23 corresponding to the power supply voltage during operation of the microprocessor 6. The A / D conversion circuit 22 performs level quantization based on the output voltage signal 23 and outputs power supply voltage data 24. The temperature detection circuit 1 outputs an output voltage signal 7 corresponding to the temperature during the operation of the microprocessor 6. A / D conversion circuit 12
Performs level quantization on the basis of the output voltage signal 7 and outputs temperature data 17. The microprocessor 6 outputs the operating frequency control data 25.

The ROM 28 inputs the power supply voltage data 24, the temperature data 17, the operating frequency control data 25, and various status elements 33 not caused by the direct operation of the microprocessor 6 into its address terminals as operating environment elements in advance. It outputs frequency-divided data 27 that controls the PLL oscillation circuit 26 for generating the clock of the programmed corresponding frequency.

The PLL oscillation circuit 26 receives the frequency-divided data 27 as an input and outputs a clock having a corresponding frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at the frequency programmed in advance corresponding to the plurality of operating environment elements.

Example 11. FIG. 11 is a first embodiment of the present invention.
FIG. 11 is a circuit block diagram showing No. 1 and is a concrete example assuming an application example of the tenth example. In FIG.
The same reference numerals as those in FIG. 10 indicate the same or corresponding portions. Reference numeral 44 denotes a DIP switch, which specifically assumes the status element 33 that is not caused by the direct operation of the microprocessor 6.

FIG. 12 is a detailed connection diagram of the address input side of the ROM 28 of the eleventh embodiment. In FIG.
It is assumed that the relationship between the temperature data 17 and the temperature is shown in Table 1 and the relationship between the power supply voltage data 24 and the power supply voltage is shown in Table 2.

[0072]

[Table 1]

[0073]

[Table 2]

In the ROM 28, the temperature value, the power supply voltage value, one signal line of the output port of the microprocessor 6 and the status not caused by the direct operation of the microprocessor are previously stored as operating environment elements of the microprocessor. A PLL oscillation circuit 26 capable of obtaining a desired oscillation frequency by using the DIP switch 44 as an element as an address input and corresponding to any one or more elements thereof.
The frequency control data of is stored. Further, the temperature detection circuit 1 is installed at a position where the temperature during the operation of the microprocessor can be detected or adhered to the microprocessor.

Data examples of the ROM 28 in the embodiment shown in FIG. 11 are shown in Tables 3 to 6.

[0076]

[Table 3]

[0077]

[Table 4]

[0078]

[Table 5]

[0079]

[Table 6]

It is assumed that the operating speed of the microprocessor 6 assumed in this data example has the characteristics shown in FIG. 13 with respect to temperature and the characteristics shown in FIG. 14 with respect to the power supply voltage. The operating frequency with respect to the power supply voltage is assumed to exhibit the characteristics shown in Table 7.

[0081]

[Table 7]

Further, the assumed microprocessor 6 has four
The clock is executed for one cycle time. And P
The reference frequency oscillator of LL oscillator 26 is assumed to apply the oscillator 10KH _Z. Assuming an operating frequency mode switching DIP switch 44 as the status element 33 not caused by the direct operation of the microprocessor 6,
It is assumed that the logic 1 operates at the maximum frequency and the logic 0 operates in the fixed frequency mode.

In the operating frequency control data 25, it is assumed that the operating mode is changed to the standby mode and that the logical 1 is used to operate in the standby mode and the logical 0 is used to operate in the normal frequency mode. The data examples of Examples 1 to 10 can also be applied by partially modifying or reducing them.

Next, the operation will be described. In FIG. 11, the power supply voltage detection circuit 21 outputs an output voltage signal 23 corresponding to the power supply voltage during operation of the microprocessor 6. The A / D conversion circuit 22 performs level quantization based on the output voltage signal 23 and outputs power supply voltage data 24. Further, the temperature detection circuit 1 outputs an output voltage signal 7 corresponding to the temperature during the operation of the microprocessor 6. The A / D conversion circuit 12 performs level quantization based on the output voltage signal 7 and outputs temperature data 17. On the other hand, the microprocessor 6 outputs operating frequency control data. ROM28 is
The power supply voltage data 24, the temperature data 17, the operating frequency control data 25, and various status elements 33 that are not caused by the direct operation of the microprocessor 6 are input to their own address terminals as operating environment elements and the corresponding frequencies programmed in advance. The frequency-divided data 27 for controlling the PLL oscillation circuit 26 for generating the clock is output.

The PLL oscillation circuit 26 receives the divided data 27 as an input and outputs a clock having a corresponding frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to a plurality of operating environment elements.

Here, with the patterns of the ROM 28 shown in Tables 3 to 6 assumed in this embodiment, the following operations are performed.
When the signal line of the DIP switch 44, which is assumed to be various status elements 33 not caused by the direct operation of the microprocessor 6, is at the L level, the output of the ROM 28 is 10 so that the microprocessor 6 can operate reliably within the normal operation range.
Outputs "105" in Decimal, the microprocessor 6 in clock 1.05MH _Z operates.

When the signal line of the DIP switch 44 is at the H level, the microprocessor 6 operates at the maximum operating speed depending on the power supply voltage in the range of -40 ° C to 85 ° C. In addition,
KT = −0.004 / ° C. outside the range of −40 ° C. to 85 ° C.
The derating is assumed and a pattern is expected in which normal operation is expected even if the recommended operating speed of the microprocessor 6 is out of the guaranteed operating temperature range.

When the operation frequency control data 25 set by the microprocessor itself shifts to the standby mode operation due to the frequency decrease by the logic 1, the DIP switch 4
The output of the minimum operating speed becomes as ROM28 microprocessor 6 regardless of 4 states the microprocessor 6 in clock 30KH _Z outputs "3" in decimal operates.

Example 12 FIG. 15 shows claim 3 of the present invention.
FIG. 13 is an image diagram of formation of the temperature detecting element according to Example 12 shown in FIG. In FIG. 15, 29 is a circuit configuration film, 30 is a temperature detection element, 31 is a logic part of a microprocessor,
32 is a microprocessor package. Here, the temperature detection element 30 is arranged on the same circuit structure film as the logic section 31 of the microprocessor 6.

FIG. 15 shows an example in which the temperature detecting element 30 and the logic portion 31 of the microprocessor 6 are arranged on the same circuit constituting film 29. The shapes of the temperature detecting element 30 and the logic portion 31 of the microprocessor are not limited to this shape, and are arbitrary.

Example 13 FIG. 16 shows the first embodiment of the present invention.
FIG. 13 is a block diagram showing No. 3, showing an example in which a general-purpose communication controller and a modem are applied to the objects of the operating environment elements in the tenth embodiment, and the operating environment elements of temperature and power supply voltage are deleted for the sake of space and explanation. .. In FIG. 16, FIG.
The same symbols as 0 indicate the same or corresponding parts. 34 is a general-purpose communication controller, 35 is a modem, 36 is a DTR signal,
37 is a DSR signal, 38 is an RTS signal, 39 is a CTS signal, 40 is a ReceiveREADY signal, and 41 is Tr.
sendREADY signal, 42 is a communication line, and 43 is a bus of the microprocessor.

In the ROM 28, the DTR signal 36 and the RTS signal 3 corresponding to the setting of the microprocessor itself are previously stored as operating environment elements of the microprocessor 6.
8, and the DSR signal 37, the CTS signal 39, and the ReceiveRE that are not caused by the direct operation of the microprocessor 6.
ADY signal 40 and Transmit READY signal 41
A PLL capable of obtaining a desired oscillation frequency in response to any one or a plurality of elements by using as an address input
The frequency control data of the oscillation circuit 26 is stored.

Next, the operation will be described. In FIG. 16, the general-purpose communication controller 34 is the microprocessor 6
The DTR signal 36 is set to the start-up side for the modem 35 in accordance with the setting. The modem 35 notifies the startup stable state to the microprocessor 6 via the general-purpose communication controller 34 by the DSR signal 37. After that, the microprocessor 6 performs the transmission operation while controlling the RTS signal 38.

When the modem 35 side cannot transmit due to some reason, the CTS signal 39 enables the microprocessor 6 to know via the general-purpose communication controller 34. The state of the data buffer of the general-purpose communication controller used during transmission or reception is Transmit
READY signal 41, Receive READY signal 4
You can know by 0.

The ROM 28 has a DTR signal 36, a DSR signal 37, an RTS signal 38, a CTS signal 39, and a Receive.
The eREADY signal 40 and the TransmitREADY signal 41 are input to its own address terminal as an operating environment element, and frequency-divided data 27 for controlling the PLL oscillation circuit 26 for generating the clock of the corresponding programmed frequency is output.

The PLL oscillation circuit 26 receives the divided data 27 as an input and outputs a clock having a corresponding frequency as the processor clock signal 20. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to a plurality of operating environment elements.

Example 14. FIG. 17 is a first embodiment of the present invention.
4 is a block diagram showing No. 4 and shows an example in which a magnetic disk controller and a magnetic disk drive are applied to an object of an operating environment element in Embodiment 4. FIG. 17, the same reference numerals as those in FIG. 4 denote the same or corresponding parts. 43 is a microprocessor bus, 44 is a magnetic disk controller, 45 is a magnetic disk drive, and 46 is Read.
y signal, 47 motor drive signal, 48 HLD signal,
49 is an HLT signal.

In the ROM 13, as an operating environment element of the microprocessor 6, the Ready signal 46, the motor drive signal 47, the HLD signal 48, and the HLT signal 49, which are not caused by the direct operation of the microprocessor 6, are used as address inputs and any one of them is input. The frequency control data of the voltage controlled oscillator circuit 16 capable of obtaining a desired oscillation frequency corresponding to one or a plurality of elements is stored.

Next, the operation will be described. In FIG. 17, the magnetic disk controller 44 operates the necessary control lines according to the request of the microprocessor 6 as necessary to access the magnetic disk drive 45. ROM1
3 is Ready signal 46, motor drive signal 47 and HL
The D signal 48 and the HLT signal 49 are input to its own address terminal and the frequency control data 18 for controlling the variable frequency oscillation circuit 16 for generating the clock of the corresponding programmed frequency is output.

The D / A conversion circuit 14 receives the frequency data 18 as an input and outputs a corresponding frequency control signal 19. The voltage controlled oscillator 15 receives the frequency control signal 19 as an input and outputs a clock having a corresponding frequency to the processor clock signal 20.
Output as. The microprocessor 6 operates by using the processor clock signal 20 as a clock input. Therefore, the microprocessor 6 operates at a preprogrammed frequency corresponding to a plurality of operating environment elements.

In this embodiment, R is used to detect a state requiring high speed processing by the microprocessor 6 from the control line.
Although the easy signal 46, the motor drive signal 47, the HLD signal 48, and the HLT signal 49 have been taken as an example, the present invention is not limited to this control line. It is also conceivable to generate a status that requires high-speed processing by the microprocessor 6 from an existing signal by adding another circuit.

[0102]

The majority of recent microprocessors have a CMOS structure. This CMOS structure device has a characteristic that the maximum operating speed changes significantly with respect to operating environment elements such as temperature and power supply voltage, not limited to the microprocessor. Since the variable frequency oscillation circuit is controlled based on the ROM data having the detected value as an address and the output thereof is used as the operation clock, the microprocessor can always be operated at the maximum operation speed. In addition, the change of the oscillation frequency change pattern for various operating environment elements is RO
This can be done by only changing the inside of M. As a result, it is possible to include the limited frequency control such as the maximum frequency and the minimum frequency by the data pattern in the ROM. Even when frequency control is performed by other elements, R
This is easily possible by increasing the OM address width and adding a data pattern inside the ROM.

According to the second aspect of the present invention, the operating speed of the microprocessor can be automatically controlled over a wide range and precisely with respect to the temperature element that greatly affects the operating speed of the microprocessor. It is possible to operate the processor at the maximum operation speed.

According to the third aspect, the temperature detection accuracy of the microprocessor is improved, and the increase in physical volume can be suppressed.

Further, according to claim 4, it is possible to cope with claim 3 by only adding a temperature measuring element and changing the package without changing the circuit structure film of the existing microprocessor. The increase in the cost of the microprocessor can be suppressed significantly from the third aspect while ensuring the temperature detection accuracy equivalent to that of the third aspect.

According to the fifth aspect, the operating speed of the microprocessor is automatically set to a wide range with respect to the element of the power supply voltage that has a great influence on the operating speed of the microprocessor.
In addition, since it can be precisely controlled, the microprocessor can always be operated at the maximum operation speed.

According to the sixth aspect of the invention, the processor clock of itself can be controlled by the operating frequency control data output signal according to the setting of the microprocessor which is programmed in advance as the operating environment element. It is possible to easily perform control such as shifting to the standby mode operation and the low power consumption mode operation.

Further, according to claim 7, a high speed data input / output device such as a disk drive or a modem connected to the microprocessor can operate at high speed when necessary by a control signal which these devices necessarily have. It is possible to lower the clock and shift to low power operation / standby operation when unnecessary.

According to the eighth aspect of the invention, all of the above operating elements can be simultaneously and comprehensively determined by selecting from the data pattern of the ROM, and the operating speed of the microprocessor can be controlled.

According to the ninth or tenth aspect, the problems described in the conventional example are eliminated from the operating characteristics of the oscillation circuit.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention in which claims 2 and 9 are added to claim 1 of the present invention.

FIG. 2 is a block diagram showing a second embodiment of the present invention in which claims 5 and 9 are added to claim 1 of the present invention.

FIG. 3 is a block diagram showing a third embodiment of the present invention in which claims 6 and 9 are added to claim 1 of the present invention.

FIG. 4 is a block diagram showing a fourth embodiment of the present invention in which claims 7 and 9 are added to claim 1 of the present invention.

FIG. 5 is a block diagram showing a fifth embodiment of the present invention in which claims 8 and 9 are added to claim 1 of the present invention.

[FIG. 6] Claims 2 and 10 of claim 1 of the present invention
It is a block diagram which shows Example 6 of this invention which considered.

[FIG. 7] Claims 1 and 5 of the present invention
It is a block diagram which shows Example 7 of this invention which considered.

[FIG. 8] Claims 6 and 10 according to claim 1 of the present invention
It is a block diagram which shows Example 8 of this invention which added the.

FIG. 9 is a cross-sectional view of claim 1 and claim 7 of the present invention.
It is a block diagram which shows Example 9 of this invention which considered.

[FIG. 10] Claim 8 and Claim 1 of Claim 1 of this invention
It is a block diagram which shows Example 10 of this invention which added 0.

FIG. 11 is a configuration diagram of an eleventh embodiment in which the tenth embodiment is partially embodied.

12 is a connection diagram showing details of connection of address signal lines of a ROM in FIG.

FIG. 13 is a characteristic diagram showing temperature vs. operating frequency characteristics of the microprocessor assumed in Example 11;

FIG. 14 is a characteristic diagram showing power supply voltage versus operating frequency characteristics of the microprocessor assumed in Example 11;

FIG. 15 is an image formation diagram of a temperature detecting element according to a twelfth embodiment described in claim 9 of the present invention.

[FIG. 16] Claim 8 and Claim 1 of Claim 1 of this invention
It is a block diagram which shows Example 13 of this invention which added 0.

[FIG. 17] Claims 1 and 7 of the present invention
It is a block diagram which shows Example 14 of this invention which considered.

FIG. 18 is a circuit block diagram for explaining a clock generation circuit of a conventional electronic computer.

FIG. 19 is a circuit diagram for explaining a clock switching circuit in a clock generation circuit of a conventional electronic computer.

FIG. 20 is a circuit diagram of a clock switching control hysteresis comparator in a conventional clock generation circuit of an electronic computer.

[Explanation of reference signs] 1 temperature detection circuit 2 comparator (level comparator) 3 clock A generation circuit 4 clock B generation circuit 5 clock switching circuit 6 microprocessor 7 temperature detection circuit output voltage signal 8 clock selection signal 9 clock A signal 10 clocks B signal 11 Selected clock signal 12 A / D conversion circuit (for temperature detection circuit) 13 ROM (for voltage controlled oscillator) 14 D / A conversion circuit 15 Voltage controlled oscillator 16 Variable frequency oscillation circuit 17 Temperature data 18 Voltage controlled oscillator frequency control Data 19 Voltage controlled oscillator Frequency control signal 20 Processor clock signal 21 Power supply voltage detection circuit 22 A / D conversion circuit (for power supply voltage detection circuit) 23 Power supply voltage detection circuit output voltage signal 24 Power supply voltage data 25 Operating frequency control data 26 PLL oscillation Circuit 27 PLL Frequency division data 28 ROM (for PLL oscillation circuit) 29 Circuit configuration film 30 Temperature detection element 31 Microprocessor logic section 32 Microprocessor package 33 Various status elements not caused by direct microprocessor operation 34 General-purpose communication controller 35 Modem 36 DTR signal 37 DSR signal 38 RTS signal 39 CTS signal 40 Receive ready signal 41 Transmit ready signal 42 Communication line 43 Microprocessor bus 44 DIP switch

[Procedure Amendment 2]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 5

[Correction method] Change

[Correction content]

[Figure 5]

[Procedure 3]

[Document name to be corrected] Drawing

[Name of item to be corrected] Fig. 10

[Correction method] Change

[Correction content]

[Figure 10]

[Procedure amendment 4]

[Document name to be corrected] Drawing

[Name of item to be corrected] Fig. 11

[Correction method] Change

[Correction content]

FIG. 11

Claims (10)

[Claims] 1. An operating environment element detecting circuit for detecting an operating environment element of a microprocessor and converting it into an electric signal, and controlling an oscillation frequency based on the level of the operating environment element output by the operating environment element detecting circuit. An electronic computer comprising a ROM preprogrammed with data and a variable frequency oscillation circuit controlled by the data of the ROM, wherein the output of the variable frequency oscillation circuit is used as an operation clock. 2. The electronic computer according to claim 1, wherein the operating environment element detection circuit detects a package temperature of a microprocessor as an operating environment element. 3. The electronic computer according to claim 2, wherein a temperature measuring element is formed on the same circuit configuration film as the microprocessor as the operating environment element detecting circuit, and the output of the temperature measuring element is used as the operating environment element. An electronic computer characterized by being a detection output. 4. The temperature measuring element according to claim 2, wherein a temperature measuring element is arranged in the same package as the microprocessor as the operating environment element detecting circuit, and an output of the temperature measuring element is used as a detection output of the operating environment element. An electronic computer characterized by: 5. The electronic computer according to claim 1, wherein the operating environment element detection circuit detects a power supply voltage of a microprocessor as an operating environment element. 6. The computer according to claim 1, wherein the operating environment element detecting circuit detects, as an operating environment element, a setting made by the microprocessor itself according to a program programmed in advance. 7. The electronic computer according to claim 1, wherein the operating environment element detection circuit detects various status elements that are not caused by the direct operation of the microprocessor as operating environment elements. 8. The computer according to claim 1, wherein the operating environment element detection circuit includes various status elements not caused by the package temperature of the microprocessor, the power supply voltage, the setting of the microprocessor itself, and the direct operation of the microprocessor. , An electronic computer which detects any one or more elements as operating environment elements. 9. The electronic computer according to claim 1, wherein a voltage controlled oscillator is applied to the variable frequency oscillation circuit, D / A conversion is performed on output data from the ROM, and then the voltage controlled oscillator is used as the output. An electronic computer characterized by performing control of. 10. The electronic computer according to claim 1, wherein the variable frequency oscillator circuit has a PLL.
An electronic computer, wherein an oscillation circuit is applied, and the output data of the ROM is used as a division ratio of the PLL oscillation circuit to control the PLL oscillation circuit.