JPH05224627A - Liquid crystal driving method - Google Patents

Abstract

PURPOSE:To provide a liquid crystal driving method in which flickering is not caused. CONSTITUTION:This is a liquid crystal driving method in which a vertical synchronizing signal for liquid crystal from a control circuit 2 is interrupted when an information terminal device 1 is reset in the case of converting a clock signal, a data signal, a horizontal synchronizing signal and a vertical synchronizing signal outputted from the information terminal device 1 into a clock signal, a data signal, a horizontal synchronizing signal and a vertical synchronizing signal for liquid crystal by the control circuit 2, and driving a simple matrix type liquid crystal panel 6 according to the clock signal, the data signal, the horizontal synchronizing signal, and the vertical synchronizing signal for the liquid crystal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal driving method of a simple matrix type liquid crystal panel used as a display of an information terminal device such as a personal computer or a word processor.

[0002]

2. Description of the Related Art A conventional liquid crystal driving method will be described below with reference to the drawings.

FIG. 1 is an embodiment showing a liquid crystal drive circuit configuration. In the figure, an information terminal device 1 such as a personal computer
Then, a CRT clock signal, a data signal, a horizontal synchronizing signal, and a vertical synchronizing signal are taken out and input to the control circuit 2. The control circuit 2 converts the CRT clock signal, data signal, horizontal synchronizing signal, and vertical synchronizing signal into a liquid crystal driving clock signal, data signal, horizontal synchronizing signal, and vertical synchronizing signal, respectively. This circuit also generates signals other than those required for driving the liquid crystal, that is, control signals for AC driving the liquid crystal. The scanning side driver circuit 4 receives the output voltage of the power supply circuit 3 for driving the liquid crystal, the vertical synchronizing signal for the liquid crystal among the output signals of the control circuit 2, the horizontal synchronizing signal, and the control signal for AC driving the liquid crystal. And outputs the output voltage of the power supply circuit 3 and the clock signal for the liquid crystal among the output signals of the control circuit 2, the data signal, the horizontal synchronizing signal, and the control signal for AC driving the liquid crystal to the segment side. The signals are output to the driver circuit 5, and the outputs of the driver circuits 4 and 5 are connected to the liquid crystal panel 6. The liquid crystal panel 6 is a simple matrix type liquid crystal panel having a single screen structure without screen division.

FIG. 4A is an operation waveform diagram of the liquid crystal drive circuit shown in FIG. 1 during normal operation. In the figure, VS,
HS is a vertical synchronizing signal and a horizontal synchronizing signal for CRT which are output from the information terminal device 1 to the control circuit 2, and LVS and LHS are the liquid crystal panel 6 output from the control circuit 2, respectively. Are a vertical synchronizing signal and a horizontal synchronizing signal for driving. The VS is subjected to signal processing by the control circuit 2, and each LVS is output after a certain time delay according to each VS. Similarly, the HS outputs each LHS according to each HS.

FIG. 4B is an operation waveform diagram at the time of reset. In the figure, VS, HS, LVS, LHS
4A and 4B are a vertical synchronizing signal for CRT, a horizontal synchronizing signal, a vertical synchronizing signal for liquid crystal, and a horizontal synchronizing signal, respectively, as in FIG. 4A. As shown in the figure, depending on the information terminal device 1, the cycle of VS and HS at the time of reset may be different from that at the time of normal operation. LVS and LHS are VS, H
Since S is created by signal processing, the cycles of LVS and LHS are different from those in normal operation.

[0006]

For example, FIG. 4 (b)
Then, it is an operation waveform diagram when the cycle of LVS and LHS at the time of reset becomes twice as long as that in the normal operation. There was a problem that it becomes / 2 and flicker occurs.

An object of the present invention is to provide a liquid crystal driving method that solves the problems of the conventional liquid crystal driving method.

[0008]

SUMMARY OF THE INVENTION According to the present invention, a clock signal, a data signal, a horizontal synchronizing signal and a vertical synchronizing signal output from an information terminal device are supplied to a liquid crystal clock signal and data by a control circuit. When the simple matrix type liquid crystal panel is driven by the clock signal, the data signal, the horizontal synchronizing signal, and the vertical synchronizing signal for converting the liquid crystal signal, the horizontal synchronizing signal, and the vertical synchronizing signal, It is a liquid crystal driving method of interrupting a vertical synchronizing signal for liquid crystal from the control circuit at the time of reset.

[0009]

In the present invention, when the information terminal device is reset,
Since the vertical synchronizing signal for liquid crystal is not input to the scanning side driver circuit, there is no scanning side selection signal. As a result, generally, each pixel of the simple matrix type liquid crystal panel driven by the voltage averaging method is turned off and flicker does not appear.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

The circuit configuration diagram of the present invention is the same as FIG.
Indicated by. The difference from the conventional example is that
The LVS of the signals connected from the scanning circuit 2 to the scanning side driver circuit 4 is connected via the circuit of FIG.

Next, the circuit of FIG. 2 will be described. In the figure, the 3-state buffer 7 receives the vertical synchronizing signal LVS for liquid crystal from the control circuit 2 and outputs it to the LVS.
1 is an amplifier for outputting to the scanning side driver circuit 4. The reset signal RST * of the information terminal device 1 is connected to the control terminal of the 3-state buffer 7, and its output is grounded via the resistor 8.

FIG. 3 shows an operation waveform diagram when the vertical synchronizing signal for liquid crystal is inputted from the control circuit 2 to the scanning side driver-4 through the circuit of FIG. In the figure, VS,
HS is a vertical synchronizing signal and a horizontal synchronizing signal for the CRT, which are output from the information terminal device 1 to the control circuit 2, and LVS and LHS are for the liquid crystal output from the control circuit 2. These are a vertical synchronizing signal and a horizontal synchronizing signal. VS is signal processed by the control circuit 2,
Each LVS is output after a certain time delay according to each VS. Similarly, the HS outputs each LHS according to each HS. RST * is a reset signal output from the information terminal device 1. When the reset signal is "L", the 3 state buffer 7 is in a high impedance state and the output of the 3 state buffer 7 is " L ". Further, LVS1 is a vertical synchronizing signal for liquid crystal after passing through the circuit of FIG. As shown in FIG. 3, in the normal operation state of the information terminal device 1, the same operation waveform as that of FIG. When the information terminal device 1 is reset, L
Although the cycle of VS and LHS is doubled, the vertical synchronizing signal LVS1 for liquid crystal is fixed to "L" at reset by RST *. As a result, since the selection signal of the scanning side driver circuit 4 disappears, each pixel of the simple matrix type liquid crystal panel 6 which is generally driven by the voltage averaging method is turned off and flicker does not appear.

[0014]

As described above, according to the present invention, even if the VS and HS cycles of the information terminal device are changed at the time of resetting, the selection signal is not input to the scanning side driver circuit, so that a liquid crystal display without flicker can be obtained. It becomes possible to provide a screen, which is very effective in improving the display quality of the liquid crystal panel.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of a liquid crystal driving method according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of a vertical synchronizing signal generation circuit for liquid crystal according to an embodiment of the present invention.

FIG. 3 is an operation waveform diagram of each part according to the liquid crystal driving method of the present invention.

FIG. 4 is an operation waveform diagram of each part according to a conventional liquid crystal driving method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Information terminal device 2 Control circuit 3 Power supply circuit 4 Scan side driver-circuit 5 Segment side driver-circuit 6 Liquid crystal panel 7 3 State buffer circuit 8 Resistance

Claims (1)

[Claims] 1. A clock signal, a data signal, a horizontal synchronizing signal, and a vertical synchronizing signal output from an information terminal device are respectively supplied to a liquid crystal clock signal by a control circuit,
Converted to data signal, horizontal sync signal, vertical sync signal, clock signal for liquid crystal, data signal, horizontal sync signal,
When driving a simple matrix type liquid crystal panel by a vertical synchronizing signal, when the information terminal device is reset, the vertical synchronizing signal for liquid crystal from the control circuit is cut off.