JPH05218466A - Manufacture of photovoltaic element - Google Patents
Manufacture of photovoltaic elementInfo
- Publication number
- JPH05218466A JPH05218466A JP4056162A JP5616292A JPH05218466A JP H05218466 A JPH05218466 A JP H05218466A JP 4056162 A JP4056162 A JP 4056162A JP 5616292 A JP5616292 A JP 5616292A JP H05218466 A JPH05218466 A JP H05218466A
- Authority
- JP
- Japan
- Prior art keywords
- silicon
- substrate
- thin film
- film
- silicon thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/546—Polycrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/548—Amorphous silicon PV cells
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、光エネルギーを電気エ
ネルギーに変換する光起電力素子の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a photovoltaic device for converting light energy into electric energy.
【0002】[0002]
【従来の技術】結晶系シリコン薄型太陽電池において
は、光を十分に吸収する目的から、例えば、図4に示す
コルゲート型太陽電池のように、p型単結晶シリコン基
板aの両側に、V字型の溝b,b,…が多数平行に形成
されてなる構造のものがあり、これにより、反射光を有
効に利用して光閉じ込めを行うようにされている(Con
f.Rec.20th IEEE Photovolt. Special. Conf.(1988), p
p 792〜795 (株式会社日立製作所中央研究所)参
照)。尚、図4において、cはp+型層、dはn+型層、
eはシリコン酸化膜、fは表面電極およびgは裏面電極
を示す。2. Description of the Related Art In a crystalline silicon thin solar cell, for the purpose of sufficiently absorbing light, for example, as in a corrugated solar cell shown in FIG. 4, a V-shape is formed on both sides of a p-type single crystal silicon substrate a. There is a structure in which a plurality of mold grooves b, b, ... Are formed in parallel, whereby the reflected light is effectively used to confine the light (Con.
f.Rec.20th IEEE Photovolt. Special.Conf. (1988), p
p 792 to 795 (Central Research Laboratory, Hitachi, Ltd.)). In FIG. 4, c is a p + type layer, d is an n + type layer,
Reference numeral e represents a silicon oxide film, f represents a front surface electrode, and g represents a back surface electrode.
【0003】[0003]
【発明が解決しようとする課題】ところで、前記V溝
b,b,…は、前記単結晶シリコン基板aの両面にアル
カリ異方性エッチングを施して形成されているが、この
ように両側にV溝b,b,…を有する構造では、その製
造工程が複雑であるとともに、V溝b,b,…の角度や
太陽電池のバルク層の厚さの制御が困難である。しか
も、V溝b,b,…形成後の単結晶シリコン基板aは厚
さが50μm程度であるために、強度が不十分で割れや
すいという問題もあった。The V-grooves b, b, ... Are formed by subjecting both sides of the single crystal silicon substrate a to alkaline anisotropic etching. In the structure having the grooves b, b, ..., The manufacturing process is complicated, and it is difficult to control the angle of the V grooves b, b, ... And the thickness of the bulk layer of the solar cell. Moreover, since the thickness of the single crystal silicon substrate a after forming the V-grooves b, b, ... Is about 50 μm, there is a problem that the strength is insufficient and it is easily cracked.
【0004】本発明は係る従来の問題点に鑑みてなされ
たものであって、製造が容易であるとともに、V溝の角
度やバルク層の厚さの制御も確実であり、しかも、十分
な強度を有する光起電力素子の製造方法を提供すること
を目的とする。The present invention has been made in view of the above conventional problems, is easy to manufacture, and is sure to control the angle of the V groove and the thickness of the bulk layer, and has sufficient strength. An object of the present invention is to provide a method for manufacturing a photovoltaic element having
【0005】[0005]
【課題を解決するための手段】本発明の光起電力素子の
製造方法は、結晶系シリコン表面に微細なV字型の溝が
多数平行に形成してなる基板上に、シリコンと屈折率の
異なる絶縁膜のパターンを形成し、その上に一導電型の
シリコン薄膜を液相成長法により形成した後、このシリ
コン薄膜上に他導電型のシリコン薄膜を形成することを
特徴とする。According to the method of manufacturing a photovoltaic element of the present invention, a substrate having a plurality of fine V-shaped grooves formed in parallel with each other on the surface of crystalline silicon has a refractive index of silicon and that of silicon. It is characterized in that patterns of different insulating films are formed, a silicon thin film of one conductivity type is formed thereon by a liquid phase growth method, and then a silicon thin film of another conductivity type is formed on this silicon thin film.
【0006】[0006]
【作用】本発明の製造方法によれば、下地基板の結晶系
シリコン表面のみにV溝を形成するだけですむために、
その製造工程が単純である。このため、V溝の角度およ
びバルク層の厚さの制御が確実に行える。According to the manufacturing method of the present invention, since it is only necessary to form the V groove only on the crystalline silicon surface of the base substrate,
The manufacturing process is simple. Therefore, the angle of the V groove and the thickness of the bulk layer can be reliably controlled.
【0007】また、V溝を下地基板の片面にのみ形成す
るため、下地基板の厚さを強度的に十分な程度に確保で
き、これにより、下地基板が支持基板として作用し得、
強固な構造となる。Further, since the V groove is formed only on one surface of the base substrate, the thickness of the base substrate can be secured to a sufficient strength, and thus the base substrate can act as a supporting substrate,
It has a strong structure.
【0008】シリコン酸化膜(SiO2 )等の絶縁膜の
パターンを形成することにより、ポイントコンタクトに
よる表面再結合速度の低減、およびシリコンとシリコン
酸化膜の屈折率の違いによる光閉じ込めを同時に計れ
る。さらに、下地基板を低抵抗としておくことにより裏
面BSF(Back Surface Field)化も計れる。By forming a pattern of an insulating film such as a silicon oxide film (SiO 2 ), it is possible to reduce the surface recombination rate by point contact and to confine light at the same time due to the difference in refractive index between silicon and the silicon oxide film. Furthermore, by setting the base substrate to have a low resistance, it is possible to achieve a back surface BSF (Back Surface Field).
【0009】[0009]
【実施例】以下、本発明の実施例を図1ないし図3に基
づいて説明する。図1は本発明に係る光起電力素子から
なる太陽電池の構造図であって、この太陽電池は、具体
的には単結晶シリコン膜を用いた、アモルファスシリコ
ン(a−Si)/単結晶シリコンヘテロ接合太陽電池で
ある。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a structural diagram of a solar cell including a photovoltaic element according to the present invention. Specifically, the solar cell is an amorphous silicon (a-Si) / single crystal silicon using a single crystal silicon film. It is a heterojunction solar cell.
【0010】図1において、1は低抵抗(n+ )単結晶
シリコンからなる下地基板で、その表面にはV字型の溝
1a,1a,…が多数平行に形成されている。2は酸化
シリコン(SiO2 )等のようにシリコンと屈折率の異
なる絶縁膜であり、図に示すように基板1上に設けら
れ、部分的に基板1表面が露出するようにパターニング
されている。この実施例ではV字型の溝1a,1aの底
の部分の基板1表面が露出するようにパターニングされ
ている。3はn型単結晶シリコン薄膜、4はp型アモル
ファスシリコン薄膜であり、このn型単結晶シリコン薄
膜3とp型アモルファスシリコン薄膜4との接合界面が
発電層として寄与する。5は透明導電膜、6裏面電極,
7は表面側取り出し電極である。光Aの入射方向は図示
のように前記下地基板1とは反対側である。In FIG. 1, reference numeral 1 is a base substrate made of low-resistance (n + ) single crystal silicon, on the surface of which a large number of V-shaped grooves 1a, 1a, ... Are formed in parallel. Reference numeral 2 is an insulating film having a refractive index different from that of silicon, such as silicon oxide (SiO 2 ). The insulating film 2 is provided on the substrate 1 as shown in the figure and is patterned so that the surface of the substrate 1 is partially exposed. .. In this embodiment, patterning is performed so that the surface of the substrate 1 at the bottom of the V-shaped grooves 1a, 1a is exposed. Reference numeral 3 is an n-type single crystal silicon thin film, 4 is a p-type amorphous silicon thin film, and the junction interface between the n-type single crystal silicon thin film 3 and the p-type amorphous silicon thin film 4 contributes as a power generation layer. 5 is a transparent conductive film, 6 is a back electrode,
Reference numeral 7 is a front side extraction electrode. The incident direction of the light A is the side opposite to the base substrate 1 as shown in the figure.
【0011】次に、前記光起電力素子の製造方法につき
図2及び図3を参照して説明する。まず、下地基板1の
表面に、機械的エッチングにより、V字型の溝1a,1
a,…を多数平行に形成した後(図2(a) 参照)、この
表面上に、酸化シリコンからなる絶縁膜2を形成し、V
字型の溝1a,1aの底の部分の基板1表面が露出する
ようにパターニングする(図2(b) 参照)。続いて、こ
の絶縁膜2の上に、液相成長法(LPE)等により、n
型単結晶シリコン薄膜をラテラルシーディングエピタキ
シャル(Lateral Seeding Epitaxitial)して形成する。
(図2(c) 参照)。続いて、n型単結晶シリコン薄膜3
上に、LPCVD法などにより、p型アモルファスシリ
コン薄膜4を形成し(図3(a) 参照)、n型単結晶シリ
コン薄膜3とp型アモルファスシリコン薄膜4との接合
界面が発電層となる。然る後、p型アモルファスシリコ
ン薄膜4上にTCO等の透明導電膜5を設ける(図3
(b) 参照)。そして、透明導電膜5上に取り出し電極7
を、基板1の裏面に裏面電極6を形成して図1に示す光
起電力素子が得られる。Next, a method of manufacturing the photovoltaic element will be described with reference to FIGS. First, the V-shaped grooves 1a, 1 are formed on the surface of the base substrate 1 by mechanical etching.
After a large number of a, ... Are formed in parallel (see FIG. 2 (a)), an insulating film 2 made of silicon oxide is formed on this surface, and V
Patterning is performed so that the surface of the substrate 1 at the bottom of the V-shaped grooves 1a, 1a is exposed (see FIG. 2B). Then, n is formed on the insulating film 2 by liquid phase epitaxy (LPE) or the like.
A type single crystal silicon thin film is formed by lateral seeding epitaxy.
(See Figure 2 (c)). Then, the n-type single crystal silicon thin film 3
A p-type amorphous silicon thin film 4 is formed thereon by the LPCVD method or the like (see FIG. 3 (a)), and the junction interface between the n-type single crystal silicon thin film 3 and the p-type amorphous silicon thin film 4 becomes a power generation layer. After that, a transparent conductive film 5 such as TCO is provided on the p-type amorphous silicon thin film 4 (see FIG. 3).
(See (b)). Then, the extraction electrode 7 is formed on the transparent conductive film 5.
Then, the back electrode 6 is formed on the back surface of the substrate 1 to obtain the photovoltaic element shown in FIG.
【0012】ところで、n型単結晶シリコン薄膜3側の
電極取り出しはV字型の溝1a,1aの底の部分の基板
1表面が露出部分とコンタクトする領域を介して行われ
るため、ポイントコンタクトになり、表面再結合速度の
低減がされる。また、シリコンとシリコン酸化膜の屈折
率の違いによる光閉じ込め効果を有する。By the way, since the electrode extraction on the n-type single crystal silicon thin film 3 side is performed through the region where the surface of the substrate 1 at the bottom of the V-shaped grooves 1a, 1a contacts the exposed portion, point contact is made. Therefore, the surface recombination rate is reduced. Further, it has an optical confinement effect due to the difference in refractive index between silicon and the silicon oxide film.
【0013】次に、以上のように構成された太陽電池
(本発明品)について、従来法による太陽電池(従来
品)と比較して行った光起電力特性試験の結果を表1に
示す。Next, Table 1 shows the results of the photovoltaic characteristic test conducted on the solar cell (invention product) having the above-mentioned structure in comparison with the solar cell by the conventional method (conventional product).
【0014】なお、この試験に使用された本発明品は図
1に示す構造のもので、上述した方法で形成された発電
層3の上に、p型アモルファスシリコン膜4を表2の条
件下で形成して接合を作ったものである。また、従来品
は、n型単結晶シリコン基板の両面に従来法によりV溝
を形成し、その上にn型アモルファスシリコン膜を形成
して接合を作ったものである。The product of the present invention used in this test has the structure shown in FIG. 1, and the p-type amorphous silicon film 4 is formed on the power generation layer 3 formed by the above method under the conditions shown in Table 2. It is formed by and joined. Further, the conventional product is one in which V-grooves are formed on both sides of an n-type single crystal silicon substrate by a conventional method, and an n-type amorphous silicon film is formed thereon to form a junction.
【0015】[0015]
【表1】 [Table 1]
【0016】[0016]
【表2】 [Table 2]
【0017】表1から明らかなように、本発明品は、V
字型の溝1a,1a,…が下地基板1の表面側にのみ形
成されているにも係わらず、従来品と同程度の変換効率
が得られることが判明した。As is clear from Table 1, the product of the present invention is V
It was found that the conversion efficiency comparable to that of the conventional product can be obtained even though the V-shaped grooves 1a, 1a, ... Are formed only on the front surface side of the base substrate 1.
【0018】なお、本発明は上述した実施例に限定され
ることなく種々設計変更可能である。例えば、図示例に
おいては、下地基板1として単結晶シリコン基板が用い
られているが、この他、キャスト多結晶シリコン基板も
使用でき、あるいは、金属板の表面をアモルファスシリ
コン膜で被った後、このアモルファスシリコン膜を結晶
化してなる構造としても良い。The present invention is not limited to the above-mentioned embodiment, and various design changes can be made. For example, in the illustrated example, a single crystal silicon substrate is used as the base substrate 1, but in addition to this, a cast polycrystalline silicon substrate can also be used, or after the surface of the metal plate is covered with an amorphous silicon film, A structure formed by crystallizing an amorphous silicon film may be used.
【0019】[0019]
【発明の効果】以上詳述したように、本発明によれば、
結晶系シリコン表面に微細なV字型の溝が多数平行に形
成してなる基板上に、シリコンと屈折率の異なる絶縁膜
のパターンを形成し、その上にシリコン薄膜をラテラル
シーディングエピタキシャルして形成するから、従来法
と同程度の変換効率を確保しつつ製造工程の単純化が図
れ、V溝の角度やバルク層の厚さの制御も確実である。As described in detail above, according to the present invention,
A pattern of an insulating film having a different refractive index from that of silicon is formed on a substrate in which a number of fine V-shaped grooves are formed in parallel on the surface of crystalline silicon, and a silicon thin film is laterally seeded epitaxially thereon. Since it is formed, it is possible to simplify the manufacturing process while ensuring the same conversion efficiency as that of the conventional method, and to control the angle of the V groove and the thickness of the bulk layer with certainty.
【0020】また、V溝を下地基板の片面にのみ形成す
ることにより、下地基板の厚さを強度的に十分な程度に
確保して、この下地基板に支持基板としての機能を付与
することができ、強固な構造を得ることが可能である。By forming the V groove only on one surface of the base substrate, the thickness of the base substrate can be secured to a sufficient strength, and the base substrate can be provided with a function as a supporting substrate. It is possible to obtain a strong structure.
【0021】さらに、シリコン酸化膜(SiO2 )等絶
縁膜のパターンの形成により、ポイントコンタクトによ
る表面再結合速度の低減と、シリコンおよびシリコン酸
化膜の屈折率の違いによる光閉じ込めを同時に計ること
ができ、また、下地基板を低抵抗としておくことにより
裏面BSF化も計れる。Furthermore, by forming a pattern of an insulating film such as a silicon oxide film (SiO 2 ), it is possible to reduce the surface recombination rate by point contact and simultaneously confine light by the difference in the refractive index of silicon and the silicon oxide film. In addition, the back surface BSF can be achieved by setting the underlying substrate to have a low resistance.
【図1】本発明に係る一実施例であるヘテロ接合太陽電
池の構造を示す断面図である。FIG. 1 is a cross-sectional view showing the structure of a heterojunction solar cell which is an embodiment according to the present invention.
【図2】同ヘテロ接合太陽電池における発電層の形成方
法を説明するための工程別の断面図である。FIG. 2 is a cross-sectional view for each step for explaining a method for forming a power generation layer in the same heterojunction solar cell.
【図3】同ヘテロ接合太陽電池における発電層の形成方
法を説明するための工程別の断面図である。FIG. 3 is a cross-sectional view for each step for explaining a method for forming a power generation layer in the same heterojunction solar cell.
【図4】従来の結晶系シリコン薄型太陽電池であるコル
ゲート型太陽電池の構造を示す図である。FIG. 4 is a view showing a structure of a corrugated solar cell which is a conventional crystalline silicon thin solar cell.
1 n型単結晶シリコンからなる下地基板 1a V字型の溝 2 酸化シリコン等からなる絶縁膜のパターン 3 単結晶シリコン薄膜からなる発電層 4 p型アモルファスシリコン膜 5 透明導電膜 6 裏面電極 7 表面電極 A 光 DESCRIPTION OF SYMBOLS 1 Base substrate made of n-type single crystal silicon 1a V-shaped groove 2 Pattern of insulating film made of silicon oxide 3 Power generation layer made of single crystal silicon thin film 4 p-type amorphous silicon film 5 transparent conductive film 6 back electrode 7 surface Electrode A light
Claims (3)
が多数平行に形成してなる基板上に、シリコンと屈折率
の異なる絶縁膜のパターンを形成し、その上に一導電型
のシリコン薄膜を液相成長法により形成した後、このシ
リコン薄膜上に他導電型のシリコン薄膜を形成すること
を特徴とする光起電力素子の製造法。1. A pattern of an insulating film having a refractive index different from that of silicon is formed on a substrate having a plurality of fine V-shaped grooves formed in parallel on the surface of crystalline silicon, and a pattern of one conductivity type is formed thereon. A method for manufacturing a photovoltaic element, comprising forming a silicon thin film by a liquid phase epitaxy method and then forming a silicon thin film of another conductivity type on the silicon thin film.
である請求項1に記載の光起電力素子の製造法。2. The method for manufacturing a photovoltaic element according to claim 1, wherein the substrate is a cast polycrystalline silicon substrate.
スシリコン膜で被った後、このアモルファスシリコン膜
を結晶化してなる請求項1に記載の光起電力素子の製造
法。3. The method of manufacturing a photovoltaic element according to claim 1, wherein the substrate is obtained by covering the surface of a metal plate with an amorphous silicon film and then crystallizing the amorphous silicon film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4056162A JP2749228B2 (en) | 1992-02-05 | 1992-02-05 | Method for manufacturing photovoltaic element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4056162A JP2749228B2 (en) | 1992-02-05 | 1992-02-05 | Method for manufacturing photovoltaic element |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05218466A true JPH05218466A (en) | 1993-08-27 |
JP2749228B2 JP2749228B2 (en) | 1998-05-13 |
Family
ID=13019403
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP4056162A Expired - Fee Related JP2749228B2 (en) | 1992-02-05 | 1992-02-05 | Method for manufacturing photovoltaic element |
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JP (1) | JP2749228B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010056800A2 (en) * | 2008-11-13 | 2010-05-20 | Applied Materials, Inc. | A method of forming front contacts to a silicon solar cell without patterning |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013014860A1 (en) * | 2011-07-26 | 2013-01-31 | パナソニック株式会社 | Plasma processing device and plasma processing method |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6489423A (en) * | 1987-09-30 | 1989-04-03 | Kawasaki Steel Co | Manufacture of epitaxial si substrate |
JPH03206669A (en) * | 1990-01-08 | 1991-09-10 | Mitsubishi Electric Corp | Solar cell |
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1992
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Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6489423A (en) * | 1987-09-30 | 1989-04-03 | Kawasaki Steel Co | Manufacture of epitaxial si substrate |
JPH03206669A (en) * | 1990-01-08 | 1991-09-10 | Mitsubishi Electric Corp | Solar cell |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010056800A2 (en) * | 2008-11-13 | 2010-05-20 | Applied Materials, Inc. | A method of forming front contacts to a silicon solar cell without patterning |
WO2010056800A3 (en) * | 2008-11-13 | 2010-08-12 | Applied Materials, Inc. | A method of forming front contacts to a silicon solar cell without patterning |
US7820472B2 (en) | 2008-11-13 | 2010-10-26 | Applied Materials, Inc. | Method of forming front contacts to a silicon solar cell without patterning |
Also Published As
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JP2749228B2 (en) | 1998-05-13 |
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