JPH05218116A - Semiconductor placing device - Google Patents
Semiconductor placing deviceInfo
- Publication number
- JPH05218116A JPH05218116A JP1520692A JP1520692A JPH05218116A JP H05218116 A JPH05218116 A JP H05218116A JP 1520692 A JP1520692 A JP 1520692A JP 1520692 A JP1520692 A JP 1520692A JP H05218116 A JPH05218116 A JP H05218116A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- frame
- semiconductor
- resin frame
- recess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、耐湿性に優れた半導体
搭載装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor mounted device having excellent moisture resistance.
【０００２】[0002]
【従来の技術】従来、半導体チップをプリント配線板に
接続する方法としては、ピングリッドアレー、リードレ
スチップキャリア、リーディッドチップキャリア等の半
導体搭載装置を用いる方法が知られている。しかし、近
年、搭載される半導体チップの高速化、高集積化、大容
量化に伴い、チップの大型化が進展してきており、短時
間での接続信頼性低下等の問題が発生してきている。2. Description of the Related Art Conventionally, as a method of connecting a semiconductor chip to a printed wiring board, a method of using a semiconductor mounting device such as a pin grid array, a leadless chip carrier or a lead chip carrier has been known. However, in recent years, as semiconductor chips to be mounted have become higher in speed, higher in integration, and larger in capacity, the size of the chips has been increasing, and problems such as deterioration of connection reliability in a short time have occurred.
【０００３】従来、図２に示すような半導体搭載用基板
（１）に半導体チップ（９）を搭載し、ボンディングワ
イヤ（８）で回路パターンのボンディングパッド（１
３）と接続した後、封止樹脂枠（２）を貼り付け半導体
封止樹脂（５）にて半導体チップ（９）を封止しピン立
て半田付けを実施して、必要に応じて図中の形状をした
もの、もしくは封止樹脂部分のみならず基板全体までを
覆う金属キャップ（１１）を載せバッケージを形成して
いる。金属キャップ（１１）を載せる前のパッケージを
ＰＣＴ試験を実施すると、封止樹脂と基板の界面及び封
止樹脂表面から水分が浸入し、不純物イオンによる半導
体チップのパッドの腐食が発生し接続不良になるという
問題点があった。更に金属キャップ（１１）で封止樹脂
部を覆った該パッケージでも数時間不良発生時間が延び
る程度であった。Conventionally, a semiconductor chip (9) is mounted on a semiconductor mounting substrate (1) as shown in FIG. 2, and a bonding pad (1) of a circuit pattern is formed by a bonding wire (8).
After connecting with 3), the sealing resin frame (2) is attached, the semiconductor chip (9) is sealed with the semiconductor sealing resin (5), and pin-pitch soldering is performed. Or a metal cap (11) covering not only the sealing resin portion but also the entire substrate is placed to form a package. When the package before mounting the metal cap (11) is subjected to the PCT test, moisture penetrates from the interface between the encapsulation resin and the substrate and the surface of the encapsulation resin, causing corrosion of the pad of the semiconductor chip due to impurity ions, resulting in a defective connection. There was a problem that Further, even in the package in which the sealing resin portion was covered with the metal cap (11), the defect occurrence time was extended to several hours.
【０００４】[0004]
【発明が解決しようとする課題】本発明は、水分の浸入
を防止し、耐湿性等の問題を解決した半導体搭載装置を
提供することを目的としたものである。SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor mounted device which prevents moisture from entering and solves problems such as humidity resistance.
【０００５】[0005]
【課題を解決するための手段】即ち本発明は、プリント
回路板に凹部を設け、該凹部に半導体チップを搭載した
後、凹部周辺のボンディングパッドを取り囲む位置に第
１の樹脂枠を貼り付けて封止樹脂を注入する半導体搭載
装置であって、前記第１の樹脂枠より大きく、かつ高さ
の高い第２の樹脂枠を第１の樹脂枠の外側に貼り付け、
第２の樹脂枠で囲まれた内側に撥水性樹脂を注入するこ
とからなることを特徴とする半導体搭載装置である。That is, according to the present invention, a recess is provided in a printed circuit board, a semiconductor chip is mounted in the recess, and then a first resin frame is attached to a position surrounding the bonding pad around the recess. A semiconductor mounting device for injecting a sealing resin, wherein a second resin frame, which is larger and taller than the first resin frame, is attached to the outside of the first resin frame,
A semiconductor-mounted device, characterized in that a water-repellent resin is injected into the inside surrounded by a second resin frame.
【０００６】以下、図面により本発明を説明する。図１
は、本発明による半導体搭載用基板の一実施例を示す図
で、（ａ）は上面図、（ｂ）は図（ａ）の第１の樹脂枠
と第２の樹脂枠の間及び封止樹脂上に撥水性樹脂を注入
したもののＡ−Ａ′断面図である。The present invention will be described below with reference to the drawings. Figure 1
FIG. 3 is a diagram showing an embodiment of a semiconductor mounting substrate according to the present invention, in which (a) is a top view, (b) is a space between the first resin frame and the second resin frame in FIG. It is an AA 'cross section figure of what injected water-repellent resin on resin.
【０００７】本発明の半導体搭載用装置は、図１（ｂ）
に示すように両面銅張積層板の所定の位置に、座ぐり加
工による半導体搭載用凹部（１０）と、スルーホール
（６）を形成し、回路パターンを形成した後、ソルダー
レジストを基板に印刷形成し、半導体用ボンディングパ
ッド及び露出している導体部分にニッケル・金メッキを
施し、半導体搭載用凹部（１０）に半導体チップ（９）
を載せ、更に封止樹脂用の第１の樹脂枠（２）と、第２
の樹脂枠（３）を設ける。半導体チップ（９）を封止樹
脂（５）にてコートした後、第２の樹脂枠（３）で囲ま
れた内側の第１の樹脂枠（２）との間及び封止樹脂上に
撥水性樹脂を注入するしたものである。The semiconductor mounting device of the present invention is shown in FIG.
As shown in Fig. 5, a semiconductor mounting recess (10) and a through hole (6) are formed by spot facing in a predetermined position of the double-sided copper clad laminate, a circuit pattern is formed, and then a solder resist is printed on the substrate. Nickel / gold plating is applied to the semiconductor bonding pad and the exposed conductor portion to form a semiconductor chip (9) in the semiconductor mounting recess (10).
On the first resin frame (2) for the sealing resin, and the second
The resin frame (3) is provided. After the semiconductor chip (9) is coated with the sealing resin (5), the semiconductor chip (9) is repelled between the first resin frame (2) surrounded by the second resin frame (3) and on the sealing resin. A water-based resin is injected.
【０００８】樹脂枠（２)(３）の材質は、アルミ等の金
属、熱可塑性樹脂、熱硬化性樹脂等、あるいは２種以上
の樹脂混合物に有機物、無機物等のフィラーを混練して
得られたものがあるが、好ましくはプリント回路板と同
等の線膨張率を有するものが良く、第１、第２の樹脂枠
とも同じ材質が好ましい。The material of the resin frames (2) and (3) is obtained by kneading a metal such as aluminum, a thermoplastic resin, a thermosetting resin, or a mixture of two or more kinds of resins with a filler such as an organic substance or an inorganic substance. However, a material having a coefficient of linear expansion equivalent to that of the printed circuit board is preferable, and the same material is preferable for both the first and second resin frames.
【０００９】第２の樹脂枠（３）の大きさは、第１の樹
脂枠（２）との間が１〜４mmが良く、好ましくは２〜３
mmが良い。１mm未満であれば、樹脂枠を貼り付けた接着
剤のはみ出し部分によって撥水性樹脂（４）を樹脂枠の
厚み分、充填することが難しく、撥水の効果を得ること
ができず、また図１（ｂ）の方法にて金属キャップ（１
１）を樹脂枠の間に挿入することが難しい。また４mmを
越えると第２の樹脂枠（３）を貼り付ける接着剤がスル
ーホールに流れ込む可能性があった。第２の樹脂枠
（３）の高さは、第１の樹脂枠（２）より０．５〜２ｍ
ｍ高いものがよい。０．５ｍｍ未満であれば、水分を遮
断するに十分な厚みが封止樹脂上の撥水性樹脂で得るこ
とができず、また２ｍｍを越えると撥水性樹脂の量が増
えコストアップになったり、本装置の凸部分が高くなる
ことにより、搭載機の治具でピックアップできなくなる
可能性があった。The size of the second resin frame (3) is preferably 1 to 4 mm between the first resin frame (2) and preferably 2 to 3 mm.
mm is good. If it is less than 1 mm, it is difficult to fill the water-repellent resin (4) with the protruding portion of the adhesive to which the resin frame is attached, by the thickness of the resin frame, and the water-repellent effect cannot be obtained. The metal cap (1
It is difficult to insert 1) between the resin frames. If it exceeds 4 mm, the adhesive for attaching the second resin frame (3) may flow into the through hole. The height of the second resin frame (3) is 0.5 to 2 m higher than that of the first resin frame (2).
Higher is better. If the thickness is less than 0.5 mm, the water-repellent resin on the sealing resin cannot have a sufficient thickness to block moisture, and if it exceeds 2 mm, the amount of the water-repellent resin increases and the cost increases. There is a possibility that the jig of the mounting machine may not be able to pick up because the convex portion of this device becomes high.
【００１０】半導体チップを封止する樹脂は、本用途に
一般に用いられているエポキシ樹脂が好ましい。第１と
第２の樹脂枠の間に注入する撥水性樹脂は、撥水性に優
れたシリコーン系樹脂、フッソ系樹脂等が適している。
これらの樹脂は粘度が低いものが多く、第２の樹脂枠を
設けて、第１の樹脂枠との間に注入することにより水分
の侵攻を遮断するに十分な撥水性樹脂の厚みが得られ、
接続信頼性に優れた半導体搭載装置をうることができ
る。従来、金属キャップ及び樹脂枠は基板に接着剤のみ
で接着され、外部からの水分の進攻を防止するには十分
でなかった。本発明により、樹脂表面、樹脂と基板との
界面からの水分の侵攻が遮断され、接続信頼性に優れた
半導体搭載装置を得ることができる。The resin for sealing the semiconductor chip is preferably an epoxy resin generally used for this purpose. As the water-repellent resin injected between the first and second resin frames, a silicone-based resin, a fluorine-based resin or the like having excellent water repellency is suitable.
Many of these resins have low viscosities. By providing a second resin frame and injecting it between the second resin frame and the first resin frame, a sufficient thickness of the water-repellent resin to block invasion of water can be obtained. ,
It is possible to obtain a semiconductor mounted device having excellent connection reliability. Heretofore, the metal cap and the resin frame have been adhered to the substrate only by the adhesive agent, which has not been sufficient to prevent moisture from entering from the outside. INDUSTRIAL APPLICABILITY According to the present invention, invasion of moisture from the resin surface and the interface between the resin and the substrate is blocked, and a semiconductor mounting device having excellent connection reliability can be obtained.
【００１１】[0011]
【発明の効果】本発明により、撥水性樹脂にて、樹脂表
面、樹脂と基板との界面からの水分の侵攻が遮断される
ため、半導体チップ表面に水分により不純物イオンが到
達することがないため、チップ表面が腐食されることの
ない、接続信頼性のある半導体搭載装置を提供するもの
としてきわめて有用である。According to the present invention, the water-repellent resin blocks moisture invasion from the surface of the resin and the interface between the resin and the substrate, so that the impurity ions do not reach the surface of the semiconductor chip by the moisture. Therefore, it is extremely useful as a semiconductor mounted device having a reliable connection, in which the chip surface is not corroded.
【図１】本発明による半導体搭載装置の一実施例を示す
図で、（ａ）は上面図、（ｂ）は図（ａ）の第１の樹脂
枠と第２の樹脂枠の間及び封止樹脂上に撥水性樹脂を注
入したもののＡ−Ａ′断面図である。1A and 1B are views showing an embodiment of a semiconductor mounting device according to the present invention, in which FIG. 1A is a top view, and FIG. 1B is a space between a first resin frame and a second resin frame in FIG. It is an AA 'sectional view of what inject | poured a water-repellent resin on the stop resin.
【図２】従来の半導体搭載装置の図であり、半導体チッ
プを搭載し樹脂封止し金属キャップを載せたもののＡ−
Ａ′の断面図である。FIG. 2 is a view of a conventional semiconductor mounting device, in which a semiconductor chip is mounted, resin-sealed, and a metal cap is mounted,
It is a sectional view of A '.
Claims (1)
半導体チップを搭載した後、凹部周辺のボンディングパ
ッドを取り囲む位置に第１の樹脂枠を貼り付けて封止樹
脂を注入する半導体搭載装置であって、前記第１の樹脂
枠より大きく、かつ高さの高い第２の樹脂枠を第１の樹
脂枠の外側に貼り付け、第２の樹脂枠で囲まれた内側に
撥水性樹脂を注入することからなることを特徴とする半
導体搭載装置。1. A semiconductor mounting device in which a recess is provided in a printed circuit board, a semiconductor chip is mounted in the recess, and then a first resin frame is attached to a position surrounding a bonding pad around the recess to inject a sealing resin. The second resin frame, which is larger and taller than the first resin frame, is attached to the outside of the first resin frame, and the water-repellent resin is attached to the inside surrounded by the second resin frame. A semiconductor-mounted device comprising injection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1520692A JPH05218116A (en) | 1992-01-30 | 1992-01-30 | Semiconductor placing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1520692A JPH05218116A (en) | 1992-01-30 | 1992-01-30 | Semiconductor placing device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05218116A true JPH05218116A (en) | 1993-08-27 |
Family
ID=11882400
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1520692A Pending JPH05218116A (en) | 1992-01-30 | 1992-01-30 | Semiconductor placing device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05218116A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6707166B1 (en) | 2000-02-17 | 2004-03-16 | Oki Electric Industry Co., Ltd. | Semiconductor devices and manufacturing method thereof |
| WO2006100768A1 (en) * | 2005-03-23 | 2006-09-28 | Fujitsu Limited | Semiconductor device and method for manufacturing same |
-
1992
- 1992-01-30 JP JP1520692A patent/JPH05218116A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6707166B1 (en) | 2000-02-17 | 2004-03-16 | Oki Electric Industry Co., Ltd. | Semiconductor devices and manufacturing method thereof |
| US6780671B2 (en) | 2000-02-17 | 2004-08-24 | Oki Electric Industry Co., Ltd. | Method of encapsulating conductive lines of semiconductor devices |
| WO2006100768A1 (en) * | 2005-03-23 | 2006-09-28 | Fujitsu Limited | Semiconductor device and method for manufacturing same |
| JPWO2006100768A1 (en) * | 2005-03-23 | 2008-08-28 | 富士通株式会社 | Semiconductor device and manufacturing method thereof |
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