JPH05217868A - Graphic data storing memory - Google Patents

Abstract

PURPOSE:To avoid write disabling condition of a writing apparatus itself by automatically isolating defective small regions from the read and write access if a memory storing graphic data is divided into small regions and a failure is generated in the memory element within small regions. CONSTITUTION:If unrepairable failure is generated in a part of a graphic storing memory 2, a control computer 1 detects memory address, etc., of defective part and notifies, as required, a fault address information to a table control 10. The table control 10 judges a defective small regions having an area indicated by a lower significant address 12 for each higher significant figure address 11, isolates the higher significant address data 11 indicating a small region including a failure from an address conversion table 9 and writes another higher significant address data to this part. Thereby, access to memory other than the defective part can be realized, eliminating interference on the function of the apparatus as a whole.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory for storing graphic data of a charged particle drawing apparatus represented by an electron beam drawing apparatus.

[0002]

2. Description of the Related Art In the case of drawing a graphic pattern forming an LSI or the like by a charged particle drawing apparatus typified by an electron beam drawing apparatus, data representing a figure is generally stored in a graphic data storage memory. In recent years, with the miniaturization and complexity of the graphic data to be drawn, the capacity of this graphic data storage memory has increased, and the probability of occurrence of defects in the storage element IC constituting the large-capacity memory has increased. This is dealt with by adding an ECC code to the data and making it possible to repair a 1-bit error. Even in this case, however, if a 2-bit error occurs, it cannot be repaired. If this is due to an element defect, There is a case where the drawing apparatus itself becomes in the drawing-disabled state until the elements are replaced.

[0003]

SUMMARY OF THE INVENTION It is an object of the present invention to avoid a non-drawable state of a drawing apparatus itself when an unrecoverable abnormality occurs in a graphic data storage memory due to a defective memory element or the like. It is to provide a memory for storing various graphic data.

[0004]

In order to achieve the above object, the present invention provides a table for converting a higher address of a memory by a look-up method, and a memory address input from outside the memory and an address input of the memory itself are provided. Put in between. As a result, the figure data storage memory is divided into small areas that are divided according to the upper addresses for address conversion, and a small area that includes an abnormal memory element that has been clarified by a daily memory test, an abnormality during drawing, etc. By operating, the memory access will be automatically excluded from the next time. As a result, even if an irrecoverable abnormality occurs in a part of the graphic data storage memory, it is possible to access the part excluding the part, and the drawing apparatus itself is not set to the drawing-disabled state.

[0005]

When a non-repairable abnormality occurs in a part of the memory, it is clear by checking the memory address which of the small areas the abnormal point belongs to. At this time, if the upper address indicating the abnormal small area is erased from the look-up method address conversion table, the memory address converted by the conversion table does not specify the abnormal area and the area is automatically accessed. It is possible to remove it from the target of.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG.

FIG. 1 is a block diagram of a memory for storing an electron beam drawing apparatus graphic. When the control computer 1 that controls the entire electron beam drawing apparatus transfers the graphic data 3 to the graphic storage memory 2, the address switching 4 and the data switching 5 are operated in advance, and the graphic data 3 and the graphic address 6 on the control computer 1 side are operated. To enable. Here, the control computer 1
The storage address of the graphic storage memory 2 is designated by the graphic address 6, and the graphic data 3 is stored in the graphic storage memory. After storing the graphic data, the control computer 1 operates the data switch 5 and the address switch 4 to validate the graphic address 6 and the graphic data 3 on the graphic processing unit 7 side. In this state, the graphic processing unit 7 reads the graphic storage memory 2 as necessary, processes the read graphic data 3, and outputs drawing control data 8 capable of electron beam drawing. The upper 11 of the figure address is given to the address input 13 of the figure storing memory directly via the address conversion table 9. In the simplest case where it is not necessary to write one pattern data to the discontinuous area connecting the empty areas of the figure storage memory 2, the same output as the upper 11 of the figure address is obtained from the address conversion table 9. The inside of the conversion table 9 is configured. The table control 10 changes the address conversion table 9 and the like.

When an irreparable abnormality occurs in a part of the graphic storage memory 2, the control computer 1 detects the memory address information of the abnormality occurrence portion, and if necessary, the abnormality address information is sent to the table controller 10. Notice. Table control 10
Determines which small area having the area indicated by the graphic lower address 12 has an abnormal part for each graphic address upper 11 and removes the address data upper 11 indicating the small area including the abnormal part from the address conversion table, Another upper address data is written in this portion. As a result, when a small area including the abnormal portion of the graphic storage memory 2 is accessed, the address is converted by the address conversion table 9 and another normal area is accessed. Since this is the same state that the small area is already occupied by some pattern, it can be implemented by the same method as the address mapping management in which the discontinuous area connecting the empty areas is one area. It becomes possible to control by the table control 10.

[0009]

According to the present invention, even if an unrecoverable abnormality occurs in the graphic storage memory, the small area including the abnormal portion can be automatically removed from the memory access. Is possible and does not hinder the function of the entire device.

[Brief description of drawings]

FIG. 1 is a block diagram of a periphery of a graphic storage memory unit showing an embodiment of the present invention.

[Explanation of symbols]

2 ... Memory for storing figures, 9 ... Address conversion table, 1
0 ... Table control.

Claims (1)

[Claims] 1. A memory for storing graphic data forming an LSI pattern, a graphic processing unit for reading graphic data from the memory, and a charged particle beam capable of exposing a graphic onto a sample according to data from the graphic processing unit. In a charged particle drawing apparatus equipped with a different mirror body, the memory for storing the graphic data is divided into small areas, and when an abnormality occurs in a memory element in the small area, the small area in which the abnormality has occurred is automatically read and written. A graphic data storage memory that can be easily removed.