JPH05209727A - Mounting-deviation inspecting appatatus of chip component - Google Patents

Abstract

PURPOSE:To improve a detect detecting rate by providing a camera, which receives the reflected light by lighting, a binary-coding circuit of an analog variable-density signal, an inspecting-window generating circuit, an edge extracting circuit and a quality judging circuit. CONSTITUTION:A camera 6 receives reflected light 5 when an illuminating light 3 is cast on a chip component 2 from a lighting device 4. A binary-coding circuit 7 binary-codes an analog variable-density signal 12 from the camera 6 and outputs the binary-coded data 13 into an edge extracting circuit 10. An inspection-window generating circuit 9 generates an inspection window 8 at the intermediate position of both pads. The extracting circuit 10 scans the data 13 named as the 'window 8' in the direction of the X axis, extracts the coordinate data of four edge points (a), (b), (c) and (d) and outputs the data to a quality judging circuit 11. The judging circuit 11 judges the deviation of theta when the difference between the X-coordinate data of the edges (a) and (c) or the difference between the X-coordinate data of the edges (b) and (d) is larger than a threshold value. The judgment of the good or bad state of the defective mounting of the chip component, i.e., the deviation of theta, is easy, and the defect detecting rate is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting deviation inspection device for chip parts.

[0002]

2. Description of the Related Art A conventional mounting deviation inspection apparatus for chip components will be described in detail with reference to the drawings. FIG. 3 is a block diagram showing a conventional example.

The chip component mounting deviation inspection apparatus shown in FIG. 3 is a ring-shaped illumination device 4 for irradiating the chip component 2 mounted on the printed board 1 with the illumination light 3 and a camera for capturing an image of the reflected light 5. 6, the binarization circuit 7 to which the output of the camera 6 is connected, the inspection window generation circuit 16 that generates the inspection windows 15 on both sides of the component, the output of the inspection window generation circuit 16 and the binarization circuit 7. It has a window internal area calculation circuit 17 to which is connected, and a mounting deviation determination circuit 18 to which the output of the window internal area calculation circuit 17 is connected.

The camera 6 captures the reflected light 5 when the illumination device 4 irradiates the chip component 2 with the illumination light 3. The binarization circuit 7 binarizes the analog grayscale signal output from the camera 6 and outputs the binarized data to the window internal area calculation circuit 17. The window internal area calculation circuit 17 obtains the sum of the binarized data in the inspection window 15 generated by the inspection window generation circuit 16. Mounting deviation determination circuit 18
Determines whether the mounting deviation is good or bad by comparing the output data of the window internal area calculation circuit 17 with the threshold value. FIG. 4 is a schematic diagram showing an outline of generation of an inspection window in the conventional technique. As an example, the chip size is
2.00 (mm) x1.25 (mm), pad size is 1.70 (mm) x1.45
(mm), the resolution of the camera is 25 (μm), and the minimum allowable mounting deviation is one-third of 1.25 (mm), or about 0.417 (m
m). Therefore, the generation coordinates of the inspection window 15 should be 16 pixels (= 0.4 mm) away from the pad. The size of the inspection window 15 is 2 pixels × 120 pixels. FIG. 5 shows the angle θ (0
It is a schematic diagram showing an outline when the mounting is deviated by (° ≦ θ <90 °). Here, in the conventional technique under the above-mentioned conditions, θ is 0 ° ≦ θ ≦ 40.54 ° or 75.44 ° ≦ θ <90.
It cannot be detected at °. If the generation position of the inspection window 15 is moved closer to the chip side, the detection rate of θ deviation is improved, but over-detection is made for a mounting deviation in the X-axis direction of less than one-third, and the erroneous determination rate is increased. There was a drawback that it would end up.

[0005]

The above-described conventional mounting deviation inspection apparatus for chip components has a drawback that it is difficult to detect a mounting failure that has caused a θ deviation.

[0006]

SUMMARY OF THE INVENTION A chip component mounting deviation inspection apparatus of the present invention is a lighting device for illuminating a chip component on a printed circuit board, a camera for capturing reflected light from the illumination, and a camera for capturing the reflected light. A binarization circuit that binarizes the analog grayscale signal of the image, an inspection window generation circuit that generates an inspection window between pads, an edge extraction circuit that extracts the edges of the parts in the inspection window, and its output It is configured to include a determination circuit for performing quality determination from certain edge coordinate data.

[0007]

The present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention.

The chip component mounting deviation inspection apparatus shown in FIG. 1 is a ring-shaped illumination device 4 for irradiating the chip component 2 mounted on the printed circuit board 1 with illumination light 3 and a camera for capturing an image of reflected light 5. 6, the binarization circuit 7 to which the output of the camera 6 is connected, and both pads 1 of the chip component 2.
4. An inspection window generation circuit 9 for generating an inspection window 8 at an intermediate position of 4, and an edge extraction circuit 10 to which the outputs of the inspection window generation circuit 9 and the binarization circuit 7 are connected.
And a pass / fail judgment circuit 11 to which the output of the edge extraction circuit 10 is connected.

The camera 6 captures the reflected light 5 when the illumination device 4 irradiates the chip component 2 with the illumination light 3. The binarization circuit 7 binarizes the analog grayscale signal 12 output from the camera 6 and outputs binarized data 13 to the edge extraction circuit 10. On the other hand, the inspection window generation circuit 9 generates the inspection window 8 at an intermediate position between the pads 14.

FIG. 2 is a schematic diagram showing an outline of generation of an inspection window of the mounting deviation inspection apparatus for chip parts shown in FIG. The edge extraction circuit 10 scans the binarized data 13 in the inspection window 8 in the X-axis direction, extracts the coordinate data of the four edge points a, b, c, d, and outputs the coordinate data to the pass / fail judgment circuit 11.

The pass / fail judgment circuit 11 calculates X of edge points a and c.
If the difference between the coordinate data or the difference between the X coordinate data of the edge points b and d is larger than the threshold value, it is determined as θ deviation. As shown in Fig. 5, the angle θ (0 ° ≤
If the mounting shifts by θ <90 °), as an example,
Size 2.00 (mm) x1.25 (mm), pad size 1.70
(mm) x 1.45 (mm), camera resolution is 25 (μm), window size is 108 pixels (= 2.7 mm) x 16 pixels (= 0.
4 mm), the range of θ deviation that cannot be detected is 0 ° ≤ θ
Only within the ranges of ≤ 3.57 ° and 86.43 ° ≤ θ <90 °. Therefore, the detection power of the θ deviation is increased.

[0012]

The chip component mounting deviation inspection apparatus of the present invention changes the inspection window and extracts the edge of the component, so that it is easy to judge the quality of the mounting defect of the θ deviation of the chip component and the defect detection rate is improved. It has the effect of improving.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a schematic diagram showing an outline of inspection window generation in the present invention.

FIG. 3 is a block diagram showing a conventional example.

FIG. 4 is a schematic diagram showing an outline of generation of an inspection window in a conventional technique.

FIG. 5 is a schematic diagram showing an outline of a θ-deviation mounting defect.

[Explanation of symbols]

 1 substrate 2 chip parts 3 illumination light 4 illumination device 5 reflected light, 6 camera 7 binarization circuit 8 inspection window, 9 inspection window generation circuit 10 edge extraction circuit, 11 pass / fail judgment circuit 12 analog grayscale signal 13 binarized data, 14 pad 15 inspection window 16 inspection window generation circuit, 17 window area calculation circuit 18 mounting deviation determination circuit

Claims (1)

[Claims] 1. A luminaire for irradiating a chip component on a printed circuit board with illumination, a camera for capturing reflected light from the illumination, and a binarizing circuit for binarizing an analog grayscale signal of an image captured by the camera. An inspection window generation circuit for generating an inspection window between pads, and an edge extraction circuit for extracting an edge of a component in the inspection window,
A mounting deviation inspecting device for a chip component, comprising: a determination circuit for performing a quality determination based on the output edge coordinate data.