JPH05207403A - Controller for liquid crystal display device - Google Patents

Abstract

PURPOSE:To prevent the flicker of a pattern when a picture of a multigradation is displayed on a display panel of the liquid crystal display device. CONSTITUTION:The liquid crystal display panel controller 10 is provided with frame counters 21, 22, 23 and line counters 25, 26, 27, plural probability signal output means 31, 35, 41, 45, 51, 55, 61 outputting a probability signal every time the count of line counters 25, 26, 27 is incremented by a prescribed number from a reference value, a probability signal output means 65 outputting a probability signal indicating probability 0 or 1, a selection means 71 selecting a probability signal resulting from dividing the probability 0-1 by a number of (gradation number -1) with a picture signal, and the probability signal selected by the selection means 71 is outputted to the liquid crystal display device as a lighting signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for controlling a liquid crystal display panel, and more particularly to a method for displaying an image having a gray scale on the liquid crystal display panel.

[0002]

2. Description of the Related Art Today, a device using a liquid crystal display plate is widely used as a small television screen device. This liquid crystal display device, as shown in FIG.
A lighting signal of each pixel is sent from a liquid crystal display device 90 (hereinafter referred to as LCD) to a liquid crystal display device 90 (hereinafter referred to as LCD) by a 4-bit parallel signal, and the lighting signal is sequentially shifted by a shift signal to connect a large number of registers in series. Latch in register 95, for example, 320 lines, 1 line 4
When a screen of 80 dots is formed on the display plate section 91, when a lighting signal of 480 pixels for one line is latched in the first stage register 95, the dot clock is supplied to the control section 93 of the LCD 90.
Simultaneously, all the data in the first-stage register 95 is transferred to the second-stage register 97 by the dot clock, and a voltage is applied to a specific line of the display panel section 91 so that each pixel on the specific line is transferred to the second-stage register 97. The pixel is lit according to the data as transparent or opaque, the data for the next one line of 480 pixels is latched in the first stage register 95, the data of the lighting signal is transferred to the second stage register 97 by the dot clock, and the next Pixels in a line are lit, 320 lines are lit and controlled to form one frame image. For example, when forming an image of 16 gradations, one frame is made up of 15 frames, and the brightness of each pixel is changed depending on the number of lighting in 15 frames. There are things that define.

The LCD controller 10 sequentially reads out a 4-bit image signal from a video random access memory (hereinafter referred to as V-RAM), and outputs an image signal input via the input / output interface 11 as an L signal.
It is formed as a lighting signal by the conversion circuit 19 controlled by the control unit 15 in the CD controller 10. The conversion circuit 19 displays the screen by the first line marker signal among the control signals output from the LCD controller 10 to the LCD 90. The number of frames to be formed is counted. For example, in the case of 8/16 gradation, the lighting signal is set to H level in the case of odd frames, and in the case of 5/16 gradation, the lighting signal is set to H level every 3 frames. As described above, when each image signal is converted into a lighting signal of each pixel based on the number of frames and four pixels are stored in the output buffer 17, the LCD is displayed.
90 sequentially output to the first stage register 95 and latched in the first stage register 95 by the shift clock. When the shift clock is output 120 times, the dot clock is output and the lighting signal is moved to the second stage register 97. is there.

[0004]

As described above, in a liquid crystal display device in which a lighting circuit is formed by a conversion circuit based on an image signal and each pixel is made transparent or opaque depending on the number of frames to control the brightness of each pixel, When the number of pixels increases, the amount of data processing required to form one frame increases, and because the reaction speed of the liquid crystal display panel is also limited, when forming a multi-gradation image, there are 10 pixels per second. The image formation speed may be about several screens, and the number of times the pixels are lit is reduced to tens of times in the dark part of the screen, and the flickering of the pixels causes image flicker, making the screen difficult to see. was there.

[0005]

According to the present invention, an image is formed in a liquid crystal display panel control device that sends a lighting signal based on an image signal and a control signal such as a dot clock that determines a line to be lighted to the liquid crystal display device. A frame counter for counting the number of frames for counting and a line counter for counting the lighting lines of each frame, and outputs a probability signal each time the count value of the line counter increases from the reference value by the required number, and A plurality of probability signal generating means for changing the reference value of the line counter when outputting the probability signal corresponding to the count value are provided, and a probability signal generating means for outputting the probability signal of probability 0 and the probability signal of probability 1 are provided. Probability signals from 0 to 1 which are different by one-half the number of gradations are formed by each of the probability signal generating means, and the probability signals are generated by the image signal. And providing a selection means for the lighting signal by selecting one of the rate signals.

[0006]

[Operation] Since the present invention is provided with the probability signal generating means for outputting the probability signal each time the value of the line counter increases by the required number, the output of the probability signal is stopped when the value of the line counter increases, and Even when pixels of the same brightness are continuously formed by a signal in a plurality of lines, it is possible to prevent pixels of adjacent lines from blinking in the same frame cycle.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As an embodiment of the liquid crystal display panel control device 10 according to the present invention, an image of 16 gradations is formed by a 4-bit image signal, and 15 frames form one screen, and each pixel is formed in 15 frames. 16 gradations are formed by setting the number of times of lighting of 0 to a predetermined number from 0 to 15.

As shown in FIG. 1, the liquid crystal display panel control device 10 sequentially turns on 320 lines in the display panel 91 by the dot clock signal output from the control unit 15, and turns on the lighting line by the first line marker signal. Is returned to the first line and the lighting of the LCD 90 is controlled. Then, the lighting signals for four pixels are sent in parallel from the output buffer 17 to the first-stage register 95 of the LCD 90, and the 4-bit lighting signals are sequentially accumulated in the first-stage register 95 by the shift clock signal, and the lighting signals for 480 pixels are stored. When the lighting signal is accumulated in the first-stage register 95, the data of the lighting signal is transferred to the second-stage register 97 by the dot clock signal to make each pixel for one line transparent or opaque based on the lighting signal. Is.

When forming the lighting signal, three line counters that count the dot clock while being zero-cleared by the first line marker signal and three frame counters that count the number of frames by the first line marker signal. Further, a control device for forming a lighting signal is provided with seven probability signal generating means formed by a decoder and a multiplexer, and a multiplexer as a selecting means.

The first line counter 2 in this embodiment
5 and the first frame counter 21 use a 15-ary counter that repeatedly counts from 0 to 14, and the second line counter 26 and the second frame counter 22 use a 5-ary counter that repeatedly counts from 0 to 4. The third line counter 27 and the third frame counter 23 are ternary counters that repeatedly count from 0 to 2.

Then, the first probability signal generating means 31, the second
The probability signal generating means 35, the fourth probability signal generating means 45, and the seventh probability signal generating means 61 are the first line counter 25.
Based on a 4-bit signal containing the count value from
A 4 to 15 decoder and a first frame counter 2 which are ring counters which cyclically output H pulses to 15 terminals from the 0th output terminal to the 14th output terminal
It is formed by a 15-to-1 multiplexer that selects one of 15 input terminals by a 4-bit signal from 1.

Further, the first probability signal generating means 31, as shown in FIG. 2, when the output terminal of the decoder 32 is connected to the input terminal of the multiplexer 33, 0 of the decoder 32 is connected.
The output terminals from No. 14 to No. 14 are, for example, No. 9, No. 3, No. 12, No. 6, No. 10, No. 10, No. 4, No. 13, and No. 13 of the multiplexer 33.
No. 7, No. 1, No. 11, No. 5, No. 5, No. 14, No. 8, No. 2,
Randomly connect to each of the input terminals.

Therefore, the first probability signal generating means 31
Is, for example, the value of the first frame counter 21 is 0,
When the multiplexer 33 selects the 0th input terminal, the signal of the 4th output terminal of the decoder 32 is input to the multiplexer 33, and every time the value of the line counter 25 becomes 4, in other words, 4 is used as the reference value. Line counter 2
Every time the value of 5 increases by 15, the multiplexer 33
When the value of the frame counter 21 becomes 1, for example, the H pulse is output from the first line counter 25 based on the signal of the 9th output terminal of the decoder 32 connected to the 1st input terminal. The H pulse is output each time the value of the line counter 25 increases by 15 using the value as a reference value, and if attention is paid to a specific line, the H pulse is output only once in 15 frames.

As shown in FIG. 3, the second probability signal generating means 35 uses a two-input type OR circuit so that the 0 of the decoder 37 is zero.
The multiplexer 3 from the output terminal No. 14 to the output terminal No. 14
When connecting to each input terminal of No. 8, for example, output terminal No. 0 is input terminal No. 4 and No. 13 and output terminal No. 1 is No. 8 and 2.
No. 2 input terminal, No. 2 output terminal, No. 12 and No. 6 input terminal, No. 3 output terminal, No. 1 and No. 10 input terminal, No. 4 output terminal to No. 5 and No. 14 input terminal, No. 5 output Input terminal 9 and 3 input terminal, output terminal 6 is input terminal 13 and 7; output terminal 7 is input terminal 2 and 11; output terminal 8 is input 6 and 0 For the terminals, the 9th output terminal is the 10th and 4th input terminals, the 10th output terminal is the 14th and 8th input terminals, the 11th output terminal is the 3rd and 12th input terminals,
The output terminal # 7 is connected to the input terminals # 1 and # 1, the output terminal # 13 is connected to the input terminals # 11 and # 5, and the output terminal # 14 is connected to the input terminals # 0 and # 9.

Therefore, the second probability signal generating means 35 is
For example, when the value of the first frame counter 21 is 3, when the H pulse is output to the 5th output terminal and the 11th output terminal of the decoder 37 connected to the 3rd input terminal of the multiplexer 38, that is, the first line When the value of the counter 25 is 5 and 11, the H pulse is output from the multiplexer 38, and every time the count value of the line counter 25 is increased by 15 with 5 and 11 as reference values, in other words, the number of lines is increased by 15. The H pulse is output twice during this period, and if attention is paid to a specific line, the H pulse is output only twice in 15 frames.

As shown in FIG. 4, the fourth stochastic signal generating means 45 uses a four-input type OR circuit to output 0 of the decoder 45.
The output terminals are numbered 2, 6 and 10 of the multiplexer 48.
No. 1 and No. 14 input terminals, decoder No. 1 output terminal No. 0, No. 4, No. 8, No. 12 of multiplexer 48, No. 2 output terminals No. 3, No. 7, No. 11, No. 13 For the input terminal, the 3rd output terminal is the 1, 5, 9, 14th input terminal, and the 4th output terminal is the 2, 6, 10, 12th input terminal,
5th output terminal to 0, 4, 8, 11 input terminal, 6th output terminal to 3, 7, 9, 13 input terminal, 7th output terminal to 1, 5, 10, 14th input terminal , Output terminal 8
2, 6, 8 and 12 input terminals, 9 output terminal is 0,
4, 7, 11 input terminals, 10 output terminal 3, 5,
9th and 13th input terminals, 11th output terminals 1, 6, 1
0, 14 input terminal, 12 output terminal 2, 4, 8,
No. 12 input terminal, No. 13 output terminal 0, 3, 7, 11
The 14th output terminal is connected to the 1st input terminal, and the 1st, 5th, 9th, and 13th input terminals are connected.

Therefore, the fourth probability signal generating means 45
Is, for example, when the value of the first frame counter 21 is 5, the fifth input terminal of the multiplexer 48 is the decoder 47.
Since it is connected to the 3rd, 7th, 10th, and 14th output terminals, the first line counter 25 repeats 0 to 14th.
The H pulse is output as a probability signal when the value is 3, 7, 10, or 14 while counting up to, and the H pulse is output in 4 fields out of 15 fields when focusing on a specific line. is there.

The seventh probability signal generating means 61 uses a seven-input type OR circuit, and the 0th output terminal of the decoder 62 is connected to the 0th, 2nd, 4th, 6th, 8th, 10th and 14th input terminals of the multiplexer 63. No. 2 output terminals are 0, 4, 6, 8, 10, 1
No. 2 and No. 14 input terminals, No. 4 output terminals are 0, 2, 4,
Input terminals 6, 10, 12, 14 to 0, 2,
Nos. 4, 6, 8, 10, 12 and 0 to 0, 2, 6, 8,
No. 10, 12, 14 to No. 10, 0, 2, 4, 6, 8,
No.12, No.14, No.12 is 0,2,4,8,10,1
2, 14 to 2, 14 to 2, 4, 6, 8, 10, 12,
The odd-numbered output terminals 1 to 13 of the decoder 62 are connected to the No. 14 decoder, respectively,
It is connected to the No. 7, 9, 11, and 13 input terminals.

Further, the third probability signal generating means 41 and the sixth probability signal generating means 55, based on the 3-bit signal from the second line counter 26, have five terminals from the 0th output terminal to the 4th output terminal. Formed by a 3 to 5 decoder that sequentially and cyclically outputs an H pulse and a 5 to 1 multiplexer that selects one of the five input terminals by the 3 bit signal from the second frame counter 22. And the third probability signal generation means 41, as shown in FIG.
The 0th output terminal of the decoder 42 is connected to the 2nd of the multiplexer 43.
No. 1 to No. 4 output terminals of the decoder 42 are sequentially connected to No. 4 input terminals of the multiplexer 43 by changing the connection order to the No. 4 input terminals of the multiplexer 43. The means 55 is a two-input type OR circuit, and is shown in FIG.
As shown in, the 0th output terminal to the 1st and 3rd input terminals,
1st output terminal is 0th and 2nd input terminals, 2nd output terminal is 1st and 4th input terminals, 3rd output terminal is 0th and 3rd
The 4th output terminal is connected to the 2nd and 4th input terminals.

Therefore, the third probability signal generating means 41
Is the first frame, the fifth frame, and the tenth frame, that is, when the value of the second frame counter 22 is 0, the value of the line counter 26 is 5 with the value of 1 of the second line counter 26 as a reference value. The H-pulse probability signal is output every time the number of pulses increases, and if attention is paid to a specific line, the H-pulse probability signal is output in 3 out of 15 frames, and the sixth probability signal generation means 55 , For example, when the value of the second frame counter 22 is 2, the 2nd input terminal of the multiplexer 58 is the 1st and 4th of the decoder 57.
Since it is connected to the number output terminal, the probability signal is the number of lines obtained by adding 1 to an integer multiple of 5 and the number of lines obtained by adding 4 to an integer multiple of 5 with 1 and 4 of the value of the line counter 26 as reference values. And paying attention to a specific line, the H pulse probability signal is output in 6 out of 15 frames.

The fifth probability signal generating means 51 is a two-to-three decoder connected to the third line counter 27 and a three-to-one decoder connected to the third frame counter 23.
Decoder 5 is used as shown in FIG.
The output terminal 0 of 2 is the input terminal 0 of the multiplexer 53, and the output terminal 1 of the decoder 52 is the multiplexer 53.
The second output terminal of the decoder 52 is connected to the first input terminal of the multiplexer 53.

Therefore, the fifth probability signal generating means 51
Is, for example, when the number of frames is 2, 5, 8, 11, or 14, that is, when the value of the third frame counter 23 is 1, when the value of the third line counter 27 is 2, that is, when the number of lines is 2 and 2. When a value obtained by adding an integer multiple of 3 to H, the probability signal of the H pulse is output, and if attention is paid to a specific line, the probability signal is output in 5 out of 15 frames.

As shown in FIG. 1, the output terminal of the first probability signal generating means 31 is selected by using the seven probability signal generating means for outputting the probability signals having different values by 1/15. 71 to the first input terminal of the 16-to-1 multiplexer, and the multiplexer 1 via the inverter.
It is connected to the No. 4 input terminal, the output terminal of the second probability signal generating means 35 is connected to the No. 2 input terminal of the multiplexer used as the selecting means 71, and is also connected to the No. 13 input terminal via the inverter, and similarly the third terminal is connected. The output terminal of the probability signal generating means 41 is the 3rd input terminal of the multiplexer and the 12th input terminal via the inverter, and the output terminal of the 4th probability signal generating means 45 is 4.
No. 11 input terminal via the inverter and the No. 11 input terminal via the inverter, the output terminal of the fifth probability signal generating means 51 is at the No. 10 input terminal via the No. 5 input terminal and the inverter, and the output terminal of the sixth probability signal generating means 55. Is connected to the sixth input terminal and the ninth input terminal via the inverter, and the output terminal of the seventh probability signal generating means 61 is connected to the seventh input terminal and the eighth input terminal via the inverter to form the selecting means 71. The 0th input terminal of the multiplexer is connected to the Q output terminal of the flip-flop 65 fixed to the L level, and the 15th input terminal of the multiplexer is connected to the inverted Q output terminal to always input the H level probability signal. , A 4-bit image signal containing the density data sent from the input / output interface 11 to the input buffer 13 is input to the control input terminal of the multiplexer which is the selection means 71. , It is set to be selectively input terminal 15 from No. 0 th by an image signal.

Therefore, the 0th input terminal of the multiplexer used as the selection means 71 is always maintained at the L level, and the probability 0.
Probability signal is input to the first input terminal of the multiplexer, and the probability signal whose probability is 1/15 from the first probability signal generating means 31 is input to the second input terminal of the multiplexer from the second probability signal generating means 35. The probability signal with probability of 2/15 is 3
A probability signal having a probability of three-fifteenth is input to the No. 1 input terminal, and a probability signal whose probability is sequentially increased by one-fifteenth is sequentially supplied from each probability signal generating means to the No. 7 input terminal. 8
Since the probability signals obtained by inverting each probability signal are also input from the No. 14 input terminal to the No. 14 input terminal via the inverter, 1
A probability signal having a probability of being increased by 1/15 from 8/5 to 14/15 is input, and a probability signal of probability 1 is input to the 15th input terminal.

Therefore, for the specific pixel, the probability signal based on the value of the line counter and the value of the frame counter for specifying the pixel is selected by the selecting means 71, and the required number of times in 15 frames is selected based on the probability signal. A specific pixel is made transparent to form a screen with 16 gradations. If the LCD controller 10 thus formed outputs a control signal for calling an image signal for turning on a specific pixel of the liquid crystal display panel from the control unit 15 to the gate array or the main CPU via the interface 11, the V-RAM will operate. From the above, the image signal of the specific pixel is read into the input buffer 13 via the interface 11, and if this image signal is, for example, 0110 (binary number), the selecting means 71 selects the 6th input terminal of the multiplexer, and the sixth The lighting signal of H level or L level can be sent to the LCD 90 based on the probability signal of 6/15 from the probability signal generation means 55.

Then, as shown in FIG. 8, for example, from X line to Y + 12 line from X dot to X line of 320 lines.
When a rectangular area of +20 dots has a screen with a brightness of 3/16, the image signal of each pixel in this area is 0011 (2
Since it is a decimal number, the selecting means 71 uses a probability signal having a probability of being input to the third input terminal of the multiplexer, which is the selecting means 71, which is 1/5 as a lighting signal, and the Y line in the first frame. When is lit, Y + 5 and Y + 5
And the Y + 10 line lights up, and this Y line and Y + 5
The line, and the Y + 10 line is the 6th frame and the 11th line.
It will be lit in the frame, and the second frame and the seventh
The Y + 4, Y + 9 lines are lit in the frame and the twelfth frame, the Y + 2, Y + 7, Y + 12 lines are lit in the third frame, the eighth frame, and the thirteenth frame, and in the fourth frame, the ninth frame, and the fourteenth frame. Y + 1,
The Y + 6 line and the Y + 11 line are lit, and the Y + 3 and Y + lines are in the fifth frame, the tenth frame, and the fifteenth frame.
Eight lines are lit, and each pixel from the Y line to the Y + 12 line is lit in 3 out of 15 frames,
All pixels that have a brightness of 3/16 are not lit at the same time, the frame number to be lit is different depending on the line, and the lighting timing is different depending on the line even if the overall brightness is 3/16. , Y line to Y +
It is prevented that the entire square points formed in the range of X dots to X + 20 dots of 12 lines appear to blink.

Further, in this embodiment, when connecting the output terminal of the decoder and the input terminal of the multiplexer in each probability signal generating means, the terminal numbers are switched so that the areas of the same brightness are several lines. In the case of the above, the line that lights up changes discontinuously as the number of frames increases sequentially, and an image having a wide range of the same brightness is displayed on the display board unit 9.
In the case of displaying on the screen No. 1, it is possible to prevent the shadow of brightness from flowing from the upper side to the lower side, and it is possible to form a screen that is easier to see.

As another embodiment, as the first line counter 25, a ring counter which sequentially outputs an H level signal to any one of 15 output signals is used.
A ring counter that sequentially outputs an H level signal to any one of the five output signals as the second line counter 26, and an H level to any one of the three output signals as a third line counter 27 sequentially. In some cases, a ring counter that outputs a signal is used, a multiplexer is used as each probability signal generating means, and the output terminal of each line counter is directly connected to each input terminal of the multiplexer that is each probability signal generating means.

Further, the above embodiment is an embodiment in which an image of 16 gradations is formed. For example, in the case of an image of 8 gradations, a probability signal of probability 0 and a probability signal of probability 0 are maintained. In addition to the probability signal of 1, the probability and the number of gradations are reduced by a decoder and a multiplexer, that is, six probability signals from 1/7 to 6/7 are sequentially formed by the probability signal generating means. However, it is possible to obtain an image of 8 gradations by forming one screen in 7 frames while selecting one of the 8 probability signals as a lighting signal by the selecting means.

As the LCD controller 10, the input buffer 13 is omitted and the input / output interface 1
It is also possible to directly input the image signal from 1 to the selection means 71, and the output bit number of the output buffer 17 is the LCD 9
It is sufficient to match the number of input bits of 0.

[0031]

The present invention has a frame counter and a line counter, outputs a probability signal each time the value of the line counter increases by a required number from the reference value, and outputs the probability signal according to the value of the frame counter. A probability signal generating means for changing the reference value of, and a selecting means for selecting one of the probability signals whose number is equal to the number of gradations from 0 to 1 which is different from the number of gradations by one to one as a lighting signal. Since it is a liquid crystal display panel control device having even, even if the image area of the same brightness is displayed on several lines, the entire image area of the same brightness does not blink in the same frame, It is possible to prevent flickering and form an easily viewable screen.

[Brief description of drawings]

FIG. 1 is a block diagram showing a liquid crystal display panel control device according to the present invention.

FIG. 2 is a specific circuit diagram of a first probability signal generating means.

FIG. 3 is a specific circuit diagram of a second probability signal generating means.

FIG. 4 is a specific circuit diagram of a fourth probability signal generating means.

FIG. 5 is a specific circuit diagram of a third probability signal generating means.

FIG. 6 is a specific circuit diagram of sixth probability signal generating means.

FIG. 7 is a specific circuit diagram of fifth probability signal generating means.

FIG. 8 is a diagram showing an example of a screen area having the same brightness.

FIG. 9 is a diagram showing an example of a conventional liquid crystal display panel control device and liquid crystal display device.

[Explanation of symbols]

10 liquid crystal display panel control device 11 input / output interface 13 input buffer 15 control unit 17 output buffer 19 conversion circuit 21, 22, 23 frame counter 25, 26, 27 line counter 31, 35, 41, 45, 51, 55, 61, 65 Probability signal generating means 71 Selection means 90 Liquid crystal display device

Claims (2)

[Claims] 1. A liquid crystal display panel control device for sending a lighting signal for making each pixel transparent or opaque to a liquid crystal display device, and sending a dot clock for sequentially sending a line for lighting control to the liquid crystal display device. It has a frame counter that counts the number of frames for forming an image on a board,
A line counter that counts the lighting line of each frame is output, and a probability signal for lighting a pixel is output each time the count value of the line counter increases from a reference value by a required number, and corresponding to the count value of the frame counter. A plurality of probability signal generating means for changing the reference value of the line counter for outputting the probability signal, a probability signal generating means of probability 0 and a probability signal generating means of probability 1 are provided, and each probability signal generating means is formed. 2. A control device for a liquid crystal display panel, comprising: a selection means for selecting, as a lighting signal, each probability signal having a probability of 0 to 1 which differs by one to one gradation number or one to one. 2. The probability signal generating means has a structure in which when the count value of the frame counter sequentially increases, the reference value of the line counter that outputs the probability signal changes irregularly within a required number. Claim 1 characterized by the above-mentioned.
A control device for a liquid crystal display board described in 1.