JPH05206452A - Semiconductor device and fabrication thereof - Google Patents

Semiconductor device and fabrication thereof

Info

Publication number
JPH05206452A
JPH05206452A JP1226592A JP1226592A JPH05206452A JP H05206452 A JPH05206452 A JP H05206452A JP 1226592 A JP1226592 A JP 1226592A JP 1226592 A JP1226592 A JP 1226592A JP H05206452 A JPH05206452 A JP H05206452A
Authority
JP
Japan
Prior art keywords
gate
oxide
containing carbon
oxide film
mosfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1226592A
Other languages
Japanese (ja)
Inventor
Munetaka Oda
宗隆 小田
Yoshio Kaneko
良夫 金子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JFE Steel Corp
Original Assignee
Kawasaki Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kawasaki Steel Corp filed Critical Kawasaki Steel Corp
Priority to JP1226592A priority Critical patent/JPH05206452A/en
Publication of JPH05206452A publication Critical patent/JPH05206452A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

PURPOSE:To enhance characteristics and reliability even of a MOSFET having fine minimum line width by constituting a gate insulation film of an oxide containing carbon atoms thereby enhancing hot carrier resistance. CONSTITUTION:Oxygen and carbon dioxide are fed from a gas supply source 6 through a flow meter 4 into a reaction vessel l in which a semiconductor substrate 2 is set. The semiconductor substrate 2 is then heated quickly by means of a halogen lamp 3 to form an oxide containing carbon. A gate electrode composed of poly-Si added with high concentration phosphorus is then formed on the gate oxide and As is introduced to semiconductor substrates on the opposite sides of the gate region to provide a source and a gate thus fabricating a MOSFET. An oxide having excellent hot carrier resistance can be formed by containing carbon atoms and when the oxide is employed as a gate insulation film, good characteristics and high reliability can be achieved even for a fine MOSFET having minimum line width of 1mum or below.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はMOS集積回路等の半導
体装置に関し、特にゲート絶縁膜の形成に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a MOS integrated circuit, and more particularly to formation of a gate insulating film.

【0002】[0002]

【従来の技術】従来よりこの種の半導体装置について、
デバイススケーリングにおける主要な制約の1つとして
されているものにホット・キャリアによるデバイスの経
時変化および信頼性の問題がある。例えば最小加工線幅
が1ミクロン以下の、いわゆるサブミクロンデバイスで
は、高ドレイン電界領域において衝突電離により発生す
るホット・キャリアのゲート酸化膜への注入がデバイス
特性を劣化させる。これは、このような酸化膜中に電子
トラップやホールトラップが、また酸化膜−シリコン
(Si)界面には電子やホールのトラップとなる界面準
位が多く存在するためで、MOSFETではホット・キ
ャリアトラッピングの影響を強く受けてオン電流が徐々
に低下したり、低電圧駆動時の動作が緩慢になったりす
る。
2. Description of the Related Art Conventionally, regarding this type of semiconductor device,
One of the major constraints in device scaling is the issue of device aging and reliability due to hot carriers. For example, in a so-called submicron device having a minimum processing line width of 1 micron or less, injection of hot carriers generated by impact ionization into a gate oxide film in a high drain electric field region deteriorates device characteristics. This is because there are many electron traps and hole traps in the oxide film, and many interface states that serve as electron and hole traps at the oxide film-silicon (Si) interface. The on-current is gradually reduced due to the strong influence of trapping, or the operation at the time of low voltage driving becomes slow.

【0003】このような問題に対する対策として、従
来、特開平1−37027号公報に記載されるように酸
化膜をアンモニアガスで熱窒化しさらに酸化性ガスで酸
化する技術や、特開平3−119731号公報に記載さ
れるように酸化膜に接するSi表面に炭素を含有させる
ことでホット・キャリア耐性を向上させる技術が提案さ
れている。
As a measure against such a problem, there is a conventional technique of thermally nitriding an oxide film with ammonia gas and further oxidizing with an oxidizing gas as described in JP-A-1-37027, and JP-A-3-119731. As described in Japanese Patent Laid-Open Publication No. 2003-242242, there is proposed a technique for improving hot carrier resistance by including carbon on the Si surface in contact with an oxide film.

【0004】[0004]

【発明が解決しようとする課題】上述した従来の技術の
うち前者を使用した場合には、MOSFETの動作時に
おける特性の劣化は少なくなるものの、初期の界面準位
密度が高く、初期特性が良くない。
When the former of the above-mentioned conventional techniques is used, the deterioration of the characteristics during the operation of the MOSFET is reduced, but the initial interface state density is high and the initial characteristics are good. Absent.

【0005】一方後者は、界面を構成するSi原子の一
部を炭素原子に置き換えることで界面準位の発生を抑制
するもので、Si表面に炭素を含有させるには、初めか
ら炭素濃度の高いSiウエハを用いるか、酸化膜を形成
する前に炭素を基板表面の直ぐ下にイオン注入するなど
の方法によるものとされている。しかしながら、第1の
方法は、Siウエハ中の炭素により酸化膜の形成中また
は熱処理中に界面近傍に積層欠陥が形成される可能性が
あり、実際上使用することは困難である。また第2の方
法では、イオン注入時に形成される界面近傍の格子欠陥
が新たな界面準位発生の原因となり、ホット・キャリア
耐性を劣化させる。
On the other hand, the latter suppresses the generation of the interface state by replacing a part of the Si atoms constituting the interface with carbon atoms. In order to contain carbon on the Si surface, the carbon concentration is high from the beginning. It is said that a Si wafer is used, or carbon is ion-implanted immediately below the substrate surface before forming an oxide film. However, the first method is practically difficult to use because carbon in the Si wafer may cause stacking faults in the vicinity of the interface during formation of an oxide film or during heat treatment. In the second method, a lattice defect near the interface formed during ion implantation causes a new interface state to be generated, which deteriorates hot carrier resistance.

【0006】本発明の課題は、このような問題点を解消
することにある。
An object of the present invention is to eliminate such a problem.

【0007】[0007]

【課題を解決するための手段】この発明の半導体装置
は、ゲート絶縁膜を、炭素原子を含む酸化膜によって構
成したものである。
In the semiconductor device of the present invention, the gate insulating film is composed of an oxide film containing carbon atoms.

【0008】またこの発明の製造方法は、ゲート絶縁膜
の形成を、酸化性ガスと、炭素を含む化合物とからなる
雰囲気中で半導体基板を熱処理することにより行うもの
である。
Further, in the manufacturing method of the present invention, the gate insulating film is formed by heat-treating the semiconductor substrate in an atmosphere containing an oxidizing gas and a compound containing carbon.

【0009】[0009]

【作用】一般に酸化膜−Si界面の界面準位は、Si−
酸素(O)−Siのネットワークに酸素原子が欠落した
Si−Si結合ができたり、歪んだSi−O結合がホー
ルにより切断されることによって発生する。また、酸化
膜中のホールトラップは歪んだSi−Siであり、電子
トラップは水素(H)やOHと結合したSi原子であ
る。
Function Generally, the interface level of the oxide film-Si interface is Si-
This is caused by the formation of Si-Si bonds lacking oxygen atoms in the oxygen (O) -Si network, and the distorted Si-O bonds being broken by holes. The hole traps in the oxide film are strained Si-Si, and the electron traps are Si atoms bonded to hydrogen (H) or OH.

【0010】本発明では、ゲート酸化膜に炭素原子を含
有させることで、当該酸化膜中や酸化膜−Si界面の歪
んだSi−O結合やSi−Si結合を緩和することがで
きる。これは、炭素原子がSi原子に比べて原子半径が
小さいことによる。加えて、炭素原子は水素との結合力
がSiより大きく、酸化膜中や界面に炭素原子が存在す
ることにより、電子トラップやホールトラップとなるS
i−H結合をC−H結合に代替させることにより、これ
らのトラップ密度を低下させることができる。
In the present invention, by containing carbon atoms in the gate oxide film, the distorted Si—O bond or Si—Si bond in the oxide film or at the oxide film-Si interface can be relaxed. This is because carbon atoms have a smaller atomic radius than Si atoms. In addition, the carbon atom has a stronger binding force with hydrogen than Si, and the presence of the carbon atom in the oxide film or at the interface serves as an electron trap or a hole trap.
By substituting C—H bonds for i—H bonds, these trap densities can be reduced.

【0011】このような炭素原子を含んだ、電子やホー
ルトラップの少ないゲート酸化膜は、基板を熱酸化する
際の雰囲気ガス中に炭素を含んだ化合物を混在させるこ
とで容易に形成できる。
Such a gate oxide film containing carbon atoms and having few electrons and hole traps can be easily formed by mixing a compound containing carbon in the atmospheric gas when the substrate is thermally oxidized.

【0012】[0012]

【実施例】図1〜図3により本発明の一実施例を説明す
る。図1はゲート絶縁膜の形成に用いる装置の概略を示
す構成図であり、図中1は石英チューブからなる反応容
器、2は半導体基板、3は赤外線を発するハロゲンラン
プ、4は流量計、5は弁、6はボンベからなるガス供給
源、7はリフレクタ、8は半導体基板2が置かれる石英
トレー、9は排気口をそれぞれ示している。ゲート絶縁
膜を形成するに当たっては、まず反応容器1内に半導体
基板2をセットする。次いで反応容器1内に、ガス供給
源6より流量計4を通して酸素および二酸化炭素を、そ
れぞれ毎分9リットルおよび1リットルずつ流す。次
に、ハロゲンランプ3により半導体基板2を1050℃
まで急速加熱し、この温度で30秒間だけ保持すること
により、5.5nmの厚さの炭素を含む酸化膜を形成す
る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a schematic diagram showing an apparatus used for forming a gate insulating film. In the figure, 1 is a reaction vessel made of a quartz tube, 2 is a semiconductor substrate, 3 is a halogen lamp that emits infrared rays, 4 is a flow meter, 5 Is a valve, 6 is a gas supply source consisting of a cylinder, 7 is a reflector, 8 is a quartz tray on which the semiconductor substrate 2 is placed, and 9 is an exhaust port. In forming the gate insulating film, first, the semiconductor substrate 2 is set in the reaction container 1. Then, oxygen and carbon dioxide are made to flow from the gas supply source 6 into the reaction container 1 through the flowmeter 4 at 9 liters and 1 liter per minute, respectively. Next, the semiconductor substrate 2 is heated to 1050 ° C. by the halogen lamp 3.
By rapidly heating to and holding this temperature for 30 seconds, an oxide film containing carbon with a thickness of 5.5 nm is formed.

【0013】このようにして形成したゲート酸化膜上に
さらにリンを高濃度に添加した多結晶Siからなるゲー
ト電極を形成し、またゲート領域の両側の半導体基板に
砒素を導入してソースおよびドレインとし、MOSFE
Tを作成した。その実効チャネル長は0.5μmであ
る。また比較のため、従来行われているように二酸化炭
素を含まない純酸素雰囲気中において(その他は上述し
たと同様の条件とする)ゲート酸化膜を形成したMOS
FETを同様に作成し、これらのMOSFETの特性を
比較した。図2および図3にその結果を示す。
On the gate oxide film thus formed, a gate electrode made of polycrystalline Si doped with phosphorus at a high concentration is further formed, and arsenic is introduced into the semiconductor substrate on both sides of the gate region to form the source and drain. And MOSFE
Created T. Its effective channel length is 0.5 μm. For comparison, a MOS having a gate oxide film formed in a pure oxygen atmosphere containing no carbon dioxide as in the past (other conditions are the same as described above).
FETs were made in the same manner and the characteristics of these MOSFETs were compared. The results are shown in FIGS. 2 and 3.

【0014】図2はホットキャリア注入後に相互コンダ
クタンスgmがどのように変化するかを示したもので、
横軸にストレス時間、つまりホットキャリア注入からの
経過時間をとり(単位は秒)、縦軸にはgmの最大値g
mmax の初期値gmmax (0)からの変化量−Δgmmax
を、初期値gmmax (0)に対する比の形でとっている
(単位はパーセント)。また図3は同じくホットキャリ
アの注入後にしきい値電圧がどのように変化するかを示
したもので、横軸にストレス時間、縦軸にしきい値電圧
th(単位はミリボルト)をとっている。いずれも実線
が本実施例、破線が従来例の結果を表しているが、二酸
化炭素を含む酸素雰囲気中でゲート酸化膜を形成した本
実施例の方が、純酸素雰囲気中でゲート酸化膜を形成し
た従来例よりすぐれた特性を示している。
FIG. 2 shows how the transconductance g m changes after hot carrier injection.
The horizontal axis shows the stress time, that is, the elapsed time from hot carrier injection (unit is second), and the vertical axis shows the maximum value g of g m.
Change in mmax from initial value gmmax (0) -Δgmmax
In the form of a ratio to the initial value g mmax (0) (unit is percent). Further, FIG. 3 also shows how the threshold voltage changes after hot carrier injection. The horizontal axis represents the stress time, and the vertical axis represents the threshold voltage V th (unit: millivolt). .. In both cases, the solid line shows the results of this example and the broken line shows the results of the conventional example.However, in this example in which the gate oxide film was formed in an oxygen atmosphere containing carbon dioxide, The characteristics are superior to the formed conventional example.

【0015】さらに、酸化膜形成時の雰囲気と酸化温度
および酸化時間を種々に変えて形成したゲート酸化膜を
有するMOSFETについて、その特性(デバイス寿
命)を表1にまとめて示した。ここで、ホットキャリア
ストレス条件は基板電流が最大になる条件(ゲート電圧
1V、ドレイン電圧6V)であり、デバイス寿命として
は、このようなホットキャリアストレス条件において相
互コンダクタンスの最大値gmmax が初期値g
mmax (0)に対して10%だけ変化するまでのホット
キャリアストレス時間たるgm寿命と、同様にしきい値
電圧Vthが0.1V変化するまでのホットキャリアスト
レス時間たるVth寿命(いずれも単位は秒)とを示して
いる。表には同様に、上述したように純酸素雰囲気中で
ゲート酸化膜を形成した従来例7についても併せて示し
てある。
Further, Table 1 shows the characteristics (device life) of MOSFETs having a gate oxide film formed by changing the atmosphere, the oxidation temperature and the oxidation time at the time of forming the oxide film. Here, the hot carrier stress condition is a condition that the substrate current becomes maximum (gate voltage 1 V, drain voltage 6 V), and as the device life, the maximum value g mmax of mutual conductance is an initial value under such hot carrier stress condition. g
g m life, which is the hot carrier stress time until it changes by 10% with respect to mmax (0), and V th life, which is the hot carrier stress time until the threshold voltage V th changes by 0.1 V (both are The unit is seconds). Similarly, the table also shows the conventional example 7 in which the gate oxide film is formed in the pure oxygen atmosphere as described above.

【0016】[0016]

【表1】 [Table 1]

【0017】従来例7はgm寿命およびVth寿命ともに
106 秒以下と短く、MOSFETのゲート酸化膜とし
て適さないことが分かる。これに対し、二酸化炭素を含
む酸素雰囲気中で熱処理することによりゲート酸化膜を
形成した本発明の実施例2〜6は、二酸化炭素の濃度に
よらずいずれも長い寿命を示している。
The prior art example 7 has a short g m life and V th life of 10 6 seconds or less, and it is understood that it is not suitable as a gate oxide film of MOSFET. On the other hand, Examples 2 to 6 of the present invention in which the gate oxide film is formed by heat treatment in an oxygen atmosphere containing carbon dioxide have a long life regardless of the concentration of carbon dioxide.

【0018】[0018]

【発明の効果】以上のように本発明によれば、炭素原子
を含有させることによりホットキャリア耐性の優れた酸
化膜を形成でき、これをゲート絶縁膜とすることにより
最小加工線幅が1μm以下の微細なMOSFETについ
ても良好な特性と高い信頼性を実現することが可能にな
る。
As described above, according to the present invention, it is possible to form an oxide film having excellent hot carrier resistance by containing carbon atoms, and by using this oxide film as a gate insulating film, the minimum processing line width is 1 μm or less. It is possible to realize good characteristics and high reliability even with respect to the fine MOSFET of.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のゲート絶縁膜の形成に用い
る装置の概略構成図。
FIG. 1 is a schematic configuration diagram of an apparatus used for forming a gate insulating film according to an embodiment of the present invention.

【図2】MOSFETの相互コンダクタンスのホットキ
ャリアストレス時間依存性を示す図。
FIG. 2 is a diagram showing hot carrier stress time dependence of transconductance of MOSFET.

【図3】MOSFETのしきい値電圧のホットキャリア
ストレス時間依存性を示す図。
FIG. 3 is a diagram showing hot carrier stress time dependence of a threshold voltage of a MOSFET.

【符号の説明】[Explanation of symbols]

1…反応容器、2…半導体基板、3…ハロゲンランプ、
6…ガス供給源。
1 ... Reaction container, 2 ... Semiconductor substrate, 3 ... Halogen lamp,
6 ... Gas supply source.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 ゲート絶縁膜を含む半導体装置におい
て、ゲート絶縁膜が、炭素原子を含む酸化膜よりなるこ
とを特徴とする半導体装置。
1. A semiconductor device including a gate insulating film, wherein the gate insulating film is made of an oxide film containing carbon atoms.
【請求項2】 少なくとも半導体基板上にゲート絶縁膜
を形成する工程を含む半導体装置の製造方法において、
ゲート絶縁膜の形成を、酸化性ガスと、炭素を含む化合
物とからなる雰囲気中で半導体基板を熱処理することに
より行うことを特徴とする半導体装置の製造方法。
2. A method of manufacturing a semiconductor device, which includes a step of forming a gate insulating film on at least a semiconductor substrate,
A method for manufacturing a semiconductor device, wherein the gate insulating film is formed by heat-treating the semiconductor substrate in an atmosphere containing an oxidizing gas and a compound containing carbon.
JP1226592A 1992-01-27 1992-01-27 Semiconductor device and fabrication thereof Pending JPH05206452A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1226592A JPH05206452A (en) 1992-01-27 1992-01-27 Semiconductor device and fabrication thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1226592A JPH05206452A (en) 1992-01-27 1992-01-27 Semiconductor device and fabrication thereof

Publications (1)

Publication Number Publication Date
JPH05206452A true JPH05206452A (en) 1993-08-13

Family

ID=11800540

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1226592A Pending JPH05206452A (en) 1992-01-27 1992-01-27 Semiconductor device and fabrication thereof

Country Status (1)

Country Link
JP (1) JPH05206452A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006137146A1 (en) * 2005-06-24 2006-12-28 Fujitsu Limited Field effect transistor and fabrication method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006137146A1 (en) * 2005-06-24 2006-12-28 Fujitsu Limited Field effect transistor and fabrication method thereof

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