JPH05206110A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To have an even surface with no influence of the foundation dependability by providing an alumina layer formed on the surface of a metal wiring and an oxide film formed on the metal wiring and on a foundation insulating film through this alumina layer by chemical vapor deposition mainly composed of organic silane. CONSTITUTION:A silicon oxide film 5 is manufactured by putting a silicon wafer 1 into an atmospheric CVD device for performing chemical vapor deposition with TEOS as raw material gas. Since an insulating alumina layer 4 is formed on the surface of an aluminium wiring 3, the thickness of the silicon oxide film 5 on the aluminium wiring becomes very thin as compared with the thickness of the silicon oxide film to be formed on a foundation insulating film 2. Accordingly, no unevenness is formed on the surface of the silicon oxide film so as to have a good flatness degree. Therefore, an interlayer insulating film and a protective insulating film can be composed of a single insulating layer. Thereby, danger of generating a defect such as the void can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a protective insulation used as an insulating film between a semiconductor element and a metal wiring, an interlayer insulating film between metal wirings or an uppermost layer. The present invention relates to a method for forming a film.

[0002]

2. Description of the Related Art In recent years, VLSI devices are rapidly becoming highly integrated and highly densified, and semiconductor processing techniques have become indispensable to be processed in a submicron order. As the submicron processing progresses, irregularities on the device surface become more and more severe, and it is expected that these irregularities will become a constraint in device manufacturing. What is most strongly desired to solve this problem is a planarization technique for the interlayer insulating film.

Characteristics required for the submicron interlayer insulating film include forming a submicron space and realizing excellent step coverage on a pattern having a high aspect ratio. As a method of forming an interlayer insulating film that satisfies such requirements, there have been proposed chemical vapor deposition methods such as plasma CVD method using organic silane and inorganic silane as source gas, atmospheric pressure CVD method, and low pressure CVD method. Among these, the insulating film formed by the atmospheric pressure CVD method using organic silane is the most expected insulating film forming method because of its good flatness.

The atmospheric pressure CVD method using the above-mentioned organic silane as a raw material gas is described in, for example, Japanese Patent Application Laid-Open No. 61-77695. In this conventional method, for example, tetraethoxysilane (TEOS) gas is used as the organic silane, and this and ozone gas are simultaneously introduced into the interior as a carrier gas of nitrogen gas, and the SiO ₂ film is formed in the reaction chamber heated to a temperature of 400 ° C. Is to grow.

In addition, the flatness of the insulating film used as the final protective film is strongly demanded as VLSI devices are highly integrated and have a high density. The main purpose of this is to prevent mixing of moisture and the like from the side wall of the final wiring.

[0006]

In the above-mentioned conventional method for forming an insulating film, the film forming speed is high on the underlying metal wiring due to the underlying dependence of the film forming speed, whereas the underlying insulating film is formed. In the above, there is a drawback that the film forming speed becomes slow and the unevenness of the insulating film becomes large, so that the insulating film cannot be formed as a single layer. Regarding such background dependency, published in 1991, “Electronics A, 111
Vol. 7, pp. 652-658.

Further, it has been proposed to form a plasma oxide film on the underlayer in order to eliminate such dependency on the underlayer. However, in a submicron device, the space is narrow and the aspect ratio is large, so that the plasma oxide film is formed. There is a drawback that voids are already formed at the time of forming.

An object of the present invention is to eliminate the above-mentioned drawbacks, and to provide a semiconductor device having an insulating film having a flat surface without being affected by underlayer dependency and having excellent characteristics without defects such as voids. Is what you are trying to do. Another object of the present invention is to provide a method for forming an insulating film having a high degree of flatness without being affected by the underlayer dependency and excellent characteristics without defects such as voids as described above. Is.

[0009]

A semiconductor device according to the present invention comprises a semiconductor substrate, a base insulating film formed thereon,
The metal wiring formed on the base insulating film, the alumina layer formed on the surface of the metal wiring, the organosilane is mainly formed on the metal wiring and the base insulating film through the alumina layer. And an oxide film formed by chemical vapor deposition as a component. According to the method of manufacturing a semiconductor device of the present invention, a base insulating film is formed on the surface of a semiconductor substrate, aluminum wiring is formed on the base insulating film, and the aluminum wiring is subjected to an ozone treatment or a perhydrogen treatment to form alumina on the surface. A layer is formed, and then an oxide film is formed on the base insulating film and the aluminum wiring by chemical vapor deposition using organosilane as a raw material. In a preferred embodiment of the method for manufacturing a semiconductor device according to the present invention, after the aluminum wiring is subjected to ozone treatment,
When forming an oxide film by chemical vapor deposition using organosilane as a raw material, a voltage is applied to the inner wall of the reaction chamber so that the aluminum wiring has a positive polarity.

[0010]

In the conventional method, the underlayer dependence appears in the case where an organic silane represented by TEOS is used, the decomposition of TEOS and the intermediate produced by the decomposition thereof is partially promoted by the electrons to form an oxide film. This is because the oxide film is formed and combined with each other, so that the film formation rate of the oxide film on the metal wiring having many free electrons becomes high. However, according to the present invention described above, an insulating alumina film is formed on the surface of the metal wiring. Since the layer is formed, the film formation rate on the layer is not high, and there is no difference from the film formation rate on the base insulating film. Therefore, the surface of the oxide film does not have irregularities, Flatness can be obtained. Furthermore, by forming an alumina layer on the metal wiring, reducing the supply of electrons that contribute to the decomposition of TEOS, and slowing the film formation rate, the insulating film can be formed as a single layer, and can be flattened in a single process. Can be achieved. In this case, by supplying a voltage having a positive polarity to the inner wall of the reaction chamber to the aluminum wiring, it is possible to further reduce the supply of electrons and further flatten the surface. As a method of applying a voltage to the aluminum wiring as described above, when the wiring is connected to the silicon wafer of the semiconductor substrate, a positive voltage is applied to the wiring by applying a positive voltage to the susceptor supporting the semiconductor substrate. can do. However, when the wiring and the silicon wafer are not connected, it is necessary to directly apply a voltage to the wiring. Further, when ozone treatment is applied to the aluminum wiring to form the alumina layer, the surface of the underlying insulating film is terminated by OH (hydroxyl group) bonds and a negative voltage is applied, so TEOS is decomposed. Will be promoted and the flatness will be further improved.

[0011]

1 to 3 show the structure of a semiconductor device in one embodiment of a method of manufacturing a semiconductor device according to the present invention. FIG. 1 shows a state in which a silicon oxide film 2 having a thickness of about 6000Å is formed as a base insulating film on the surface of a silicon wafer 1, and aluminum wiring 3 having a predetermined pattern is further formed on the silicon oxide film 2. The distance between the aluminum wirings 3 is shorter than the thickness thereof, and the aspect ratio is extremely large.

Next, FIG. 2 shows a state in which ozone is introduced into the aluminum wiring 3 to uniformly form an alumina layer 4 having a thickness of 40 Å on the surface thereof. Examples of the ozone treatment include a method in which ozone gas is caused to act on the aluminum wiring 3 and plasma ozone is caused.

After the surface treatment is performed in this manner, the silicon wafer 1 is placed in an atmospheric pressure CVD apparatus as shown in FIG.
FIG. 3 shows a state in which the silicon oxide film 5 is formed by performing chemical vapor deposition using TEOS as a source gas. According to the present invention, since the insulating alumina layer 4 is formed on the surface of the aluminum wiring 3, the thickness of the silicon oxide film 5 on the aluminum wiring is equal to that of the silicon oxide film formed on the base insulating film 2. Since the thickness is extremely smaller than the thickness, no unevenness is formed on the surface of the silicon oxide film, and the flatness is good.
Therefore, the interlayer insulating film and the protective insulating film can be composed of a single insulating layer, and as a result, defects such as voids are less likely to occur.

As shown in FIG. 4, the atmospheric pressure CVD apparatus is configured such that a susceptor 11 holding a silicon wafer 1 is arranged in a reaction chamber 10, and the silicon wafer is heated by a heater 12. Further, fins 13 are arranged below the silicon wafer 1 so that a gas described later can be uniformly sprayed over the entire silicon wafer. Further, a constant temperature bath 14 is arranged outside the reaction chamber 10, and a bubbler 15 for generating TEOS gas is arranged inside the constant temperature bath 14. This bubbler 1
In FIG. 5, the raw material TEOS is accommodated, nitrogen gas acting as a carrier gas is supplied, and the generated TEOS gas is introduced into the reaction chamber 10. An ozonizer 16 is further provided outside the reaction chamber 10, oxygen is supplied to this to generate ozone gas, and this ozone gas is introduced into the reaction chamber by nitrogen gas.

In the above-mentioned embodiment, the silicon wafer 1 was placed in the reaction chamber 10 and heated by the heater 12 to a temperature of about 400.degree. The temperature in the reaction chamber at this time was lower than this. The bubbler 15 is 65
It is heated to a temperature of ℃, and the flow rate of nitrogen gas is 3
It was liter. In addition, the ozonizer 16 has 7.5 per minute.
Oxygen was supplied at a flow rate of 1 liter. This ozonizer 16
The ozone production rate was 4.0%. Further, the flow rate of carrier nitrogen gas was 18.0 liters per minute. Further, a voltage of about 50 V was applied to the inner wall of the reaction chamber 10 so that the aluminum wiring 3 had a positive polarity. Under these conditions, a film is formed for about 10 minutes and a silicon oxide film 5 with a thickness of 7,000Å is formed.
Is formed on the base insulating film, and 2000 is formed on the aluminum wiring 3.
Formed to a thickness of Å.

FIG. 5 shows the configuration of another embodiment of the semiconductor device according to the present invention. In this example, after the aluminum wiring 3 is formed, a water treatment is applied to the surface of the aluminum wiring.
The 40 Å alumina layer 4 is formed, and the silicon oxide film 6 is formed under the same conditions as those in the above-described embodiment. In this example, the silicon oxide film 6 having almost the same thickness (7000 Å) is formed on the aluminum wiring 3 and the base insulating film 2.
Therefore, the surface of the silicon oxide film 6 almost corresponds to the surface shape of the base.

FIG. 6 shows the structure of a comparative example. In the comparative example, the aluminum wiring 3 is formed on the base insulating film 2, and the silicon oxide film 7 is directly formed on the aluminum wiring 3 by the TEOS atmospheric pressure CVD method. The film forming conditions at this time were the same as the conditions in the above-described embodiment of the present invention.
The film formation rate of the silicon oxide film 7 on the aluminum wiring 3 was very high, and therefore was extremely thick, and extremely large irregularities were formed on the surface of the silicon oxide film. In this example, the thickness of the silicon oxide film formed on the base insulating film 2 is 7,000 Å, and the thickness on the aluminum wiring 3 is 90
It was formed to a thickness of 00Å.

[0018]

As described above, in the semiconductor device according to the present invention, the insulating film formed on the metal wiring formed on the semiconductor substrate via the insulating film has a large aspect ratio of the metal wiring. In spite of this, since the surface has good flatness and no defects such as voids, high integration and high density can be achieved without impairing the device characteristics. Further, according to the method for manufacturing a semiconductor substrate of the present invention, the aluminum wiring is subjected to ozone treatment or superhydrogen treatment to form an alumina layer, and a voltage is applied to the inner wall of the reaction chamber so that the aluminum wiring has a positive polarity. Since the silicon oxide film is deposited in this manner, the film formation rate of the oxide film on the aluminum wiring can be reduced, and thus the flatness of the surface of the insulating film formed thereon can be improved and the insulating film can be formed. Since it can be formed of a single layer, defects such as voids do not occur and the process is simplified.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a configuration in one step of a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a cross-sectional view showing a configuration in the next step.

FIG. 3 is a cross-sectional view showing a configuration in a further next step.

FIG. 4 is a diagram showing a configuration of an atmospheric pressure CVD apparatus.

FIG. 5 is a sectional view showing the configuration of another embodiment of the semiconductor device according to the present invention.

FIG. 6 is a cross-sectional view showing a configuration of a comparative example.

[Explanation of symbols]

 1 Silicon Wafer 2 Base Insulating Film 3 Aluminum Wiring 4 Alumina Layer 5, 6 Silicon Oxide Film 10 Reaction Chamber 11 Susceptor 12 Heater 13 Fin 14 Constant Temperature Bath 15 Bubbler 16 Ozonizer

Claims (5)

[Claims] 1. A semiconductor substrate, an insulating film formed on the surface of the semiconductor substrate, a metal wiring formed on the insulating film, an alumina layer formed on the surface of the metal wiring, and an alumina layer. On the metal wiring and on the insulating film,
A semiconductor device comprising an oxide film formed by chemical vapor deposition containing organosilane as a main component. 2. A base insulating film is formed on the surface of a semiconductor substrate, aluminum wiring is formed on the base insulating film, and ozone treatment is applied to the aluminum wiring to form an alumina layer on the surface. A method of manufacturing a semiconductor device, characterized in that an oxide film is formed on the base insulating film and aluminum wiring by chemical vapor deposition using as a raw material. 3. The semiconductor according to claim 2, wherein when performing chemical vapor deposition using the organic silane as a raw material, a voltage is applied so that the aluminum wiring has a positive polarity with respect to the inner wall of the reaction chamber. Device manufacturing method. 4. A base insulating film is formed on the surface of a semiconductor substrate, aluminum wiring is formed on the base insulating film, and the aluminum wiring is subjected to a water treatment to form an alumina layer on the surface. A method of manufacturing a semiconductor device, comprising forming an oxide film on the base insulating film and aluminum wiring by chemical vapor deposition using silane as a raw material. 5. The semiconductor according to claim 4, wherein when performing chemical vapor deposition using the organic silane as a raw material, a voltage is applied so that the aluminum wiring has a positive polarity with respect to the inner wall of the reaction chamber. Device manufacturing method.