JPH0520412U - High frequency integrated circuit - Google Patents

Abstract

(57) [Summary] [Structure] The collector voltages of the grounded emitter amplifiers Q ₁ and Q ₂ are applied to the bases of the emitter follower amplifiers Q ₃ and Q ₄ , respectively, and the emitter follower amplifiers Q ₃ and Q ₄ are applied.
The emitter voltage of each of the emitter output resistors R _E3 , R
_It is applied to the respective bases of the grounded-emitter amplifiers Q ₁ and Q ₂ via _E4 and the negative feedback resistors R _F1 and R _F2 . [Effect] There is no reduction in the amplification degree in the high frequency range of the amplifier due to the stray capacitance between the capacitor and the substrate. In addition, the semiconductor chip becomes smaller and the yield is improved.

Description

[Detailed description of the device]

[0001]

[Industrial application]

 The present invention relates to a high frequency integrated circuit used for a TV or VTR tuner.

[0002]

[Prior Art]

 FIG. 2 is a circuit diagram showing a configuration example of a conventional high frequency integrated circuit and its peripheral circuits. In this figure, 1 is an input terminal to which an RF signal is input, and 2 is an unbalanced signal for converting an unbalanced signal into a balanced signal. Balance conversion transformers 3 and 4 are DC blocking capacitors. Reference numeral 5 is a high-frequency integrated circuit in which a balanced-type grounded-emitter amplifier and a balanced-type emitter-follower amplifier are connected in series. There is. In the high frequency integrated circuit 5, V_ccIs a constant voltage source, Q₁And Q₂Is a transistor for high-frequency amplification that constitutes a balanced-grounded-emitter amplifier, R₁~ R_FourIs the base bias resistance, R_C1And R _C2 Is the collector resistance, I₁Is a constant current source, and these resistors R₁~ R_Four, R_C1And R_C2And constant current source I₁Is the transistor Q₁And Q₂Transistor Q to operate at a specified operating point₁And Q₂Apply a bias to.

C ₁ and C ₂ are DC blocking capacitors, Q ₃ and Q ₄ are high frequency amplifying transistors forming a balanced emitter follower amplifier, R _{5 to} R ₈ are base bias resistors, and I ₂ and I _{2. 3} is a constant current source, and these resistors R _{5 to} R _{8 and} constant current sources I ₂ and I ₃ are transistors Q ₃ and Q ₄ so that the transistors Q ₃ and Q ₄ operate at a predetermined operating point. Apply a bias to.

R _E1 and R _E2 are output resistors for arbitrarily setting the output impedance of the balanced emitter follower amplifier, R _F1 and R _F2 are negative feedback resistors, and C _F1 and C _F2 are direct current blocking capacitors. .. Further, 6 and 7 are DC blocking capacitors, 8 is a balanced-unbalanced conversion transformer for converting a balanced signal into an unbalanced signal, and 9 is an output terminal for outputting an amplified signal.

In such a configuration, the RF signal input from the input terminal 1 is converted into a balanced signal in the unbalanced balance conversion transformer 2, and then is passed through the DC blocking capacitors 3 and 4 to form a high frequency integrated circuit. 5, respectively. Next, high-frequency input balanced signal to the integrated circuit 5 is inputted to the respective bases of the transistors Q ₁ and Q _2, transistors in Q ₁ and Q ₂ are widths increase, respectively, capacitors DC blocking from each collector C Input to the respective bases of transistors Q ₃ and Q ₄ via ₁ and C ₂ .

Furthermore, signal input to the respective bases of the transistors Q ₃ and Q ₄ are respectively amplified in the transistor Q ₃ and Q _4, the high-frequency integrated circuit from the emitters through the output resistor R _E1 and R _E2 The signal is output from the output terminal 5, passed through DC blocking capacitors 6 and 7, converted into an unbalanced signal in a balanced-unbalanced conversion transformer, and then output from an output terminal 9 as an amplified signal.

Further, a part of the signals output from the respective emitters of the transistors Q ₃ and Q ₄ are DC blocking capacitors C _F1 and C _F2 and the negative feedback resistors R _F1 and R _F1.
Through _F2, transistor Q ₁ in the negative feedback amount according to the value of the negative feedback resistor R _F1 and R _F2
It is negatively fed back to the base of your and Q _2. As a result, the distortion of the high frequency integrated circuit 5 is improved.

[0008]

[Problems to be solved by the device]

By the way, in the above-mentioned conventional high frequency integrated circuit 5, it is necessary to form the DC blocking capacitors C ₁ , C ₂ , C _F1 and C _F2 in the integrated circuit, but these capacitors have a large capacity. However, since it occupies a large area in the integrated circuit, there is a drawback that the degree of integration of the integrated circuit is extremely deteriorated and the semiconductor chip is enlarged. Further, since the large-capacity DC blocking capacitors C ₁ , C ₂ , C _F1 and C _F2 occupy a large area in the integrated circuit, the floating capacitance between these capacitors and the substrate also depends on the area. However, it has a drawback that the amplification factor of each amplifier is lowered in the high frequency range.

Further, since each of the transistors Q _{1 to} Q ₄ needs the base bias resistors R _{1 to} R ₈ , these also have a drawback that the integration degree of the integrated circuit is deteriorated. The present invention has been made under such a background, and provides a high frequency integrated circuit which does not deteriorate the integration degree of the integrated circuit and does not reduce the amplification degree of each amplifier in the high frequency band. The purpose is to

[0010]

[Means for Solving the Problems]

 According to the present invention, in a high frequency integrated circuit in which a grounded-emitter amplifier and an emitter-follower amplifier are connected in cascade, and a negative feedback is applied from the emitter-follower amplifier to the grounded-emitter amplifier, the collector voltage of the grounded-emitter amplifier is And the emitter voltage of the emitter follower amplifier is applied to the base of the grounded-emitter amplifier via the emitter output resistance and the negative feedback resistance.

[0011]

[Action]

 According to the above configuration, the base bias voltage of the emitter follower amplifier is obtained from the collector voltage of the grounded emitter amplifier, and the base bias voltage of the grounded emitter amplifier is derived from the base voltage of the emitter follower amplifier to the base-emitter of the emitter follower amplifier. It is the value obtained by subtracting the inter-voltage and the voltage drop of the emitter output resistance.

[0012]

【Example】

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing the configuration of a high-frequency integrated circuit 10 and its peripheral circuits according to one embodiment of this idea. In this figure, parts corresponding to those in FIG. The description is omitted. In the high frequency integrated circuit 10 shown in this figure, the resistors R _{5 to} R _{8 and the} DC blocking capacitors C ₁ and C ₂ are removed, and instead, the collector of the transistor Q _{1 and} the base of the transistor Q ₄ are directly connected. , The collector of the transistor Q _{2 and} the base of the transistor Q ₃ are directly connected.

Also, the resistors R _{1 to} R ₄ , R _E1 and R _E2 are removed and instead the resistor R _E4 is _placed between the emitter of the transistor Q ₄ and the current source I ₃ and the emitter of the transistor Q ₃ and the current Resistors R _E3 are respectively interposed between the sources I ₂ . These resistors R _E3 and R _E4 are output resistors for arbitrarily setting the output impedance of the balanced emitter follower amplifier. Further, the DC blocking capacitors C _F1 and C _F2 are removed, and instead one end of the resistor R _F1 is connected to the connection point between the resistor R _E4 and the current source I _3, and the resistor R _E3 and the current source I ₂ are connected. One end of the resistor R _F2 is connected to the connection point.

In such a configuration, first, the base bias voltage of the transistor Q ₃ is obtained by the voltage drop due to the collector current of the transistor Q ₂ flowing from the constant voltage source V _CC through the resistor R _C2, and the base bias voltage of the transistor Q ₄ is obtained. The voltage is obtained by the voltage drop due to the collector current of the transistor Q ₁ flowing through the resistor R _C1 from the constant voltage source V _CC . Further, since the collector voltage of the transistor Q ₁ is being applied to the base of the transistor Q _4, the emitter potential of the transistor Q ₄ are, transistors to Q ₁ base-emitter voltage of the transistor Q ₄ from the collector voltage (approximately 0. 7V) lower. Et al of the potential of the connection point a between the resistor R _E4 and the constant current source I _3, only the voltage drop in the resistor R _E4 by the emitter current of the transistor Q ₄ from the emitter capacitor voltage of the transistor Q ₄ low. The voltage at the connection point a is applied to the base of the transistor Q ₁ via the negative feedback resistor R _F1 , and this becomes the base bias voltage of the transistor Q ₁ . Chi words, the base of the transistor Q ₁ is, the voltage obtained by subtracting a voltage drop from its collector voltage and base-emitter voltage of the transistor Q ₄ the resistor R _E4 is applied, the collector of the transistor Q ₁ A sufficient voltage is secured as the emitter-to-emitter voltage V _CE1 . Similarly, the base bias voltage of the transistor Q ₂ is a voltage obtained by subtracting the base-emitter voltage of the transistor Q _{3 and} the voltage drop in the resistor R _E3 from its own collector voltage.

Next, the operation of the circuit shown in FIG. 1 will be described. First, the RF signal input from the input terminal 1 is converted into a balanced signal in the unbalanced balanced conversion transformer 2 and then input to the high frequency integrated circuit 10 via the DC blocking capacitors 3 and 4. Next, the balanced signal input to the high frequency integrated circuit 10 is inputted to the respective bases of the transistors Q ₁ and Q _2, it is their respective amplified in transistors Q ₁ and Q _2, directly transistor Q ₃ from the respective collectors And into the respective bases of Q ₄ .

Furthermore, signal input to the respective bases of the transistors Q ₃ and Q ₄ are respectively amplified in the transistor Q ₃ and Q _4, the high-frequency integrated circuit from the emitters through the output resistor R _E3 and R _E4 The signal is output from the output terminal 10, passed through DC blocking capacitors 6 and 7, converted into an unbalanced signal in the balanced-unbalanced conversion transformer, and then output from the output terminal 9 as an amplified signal.

Further, a part of the signals output from the respective emitters of the transistors Q ₃ and Q ₄ passes through the output resistors R _E3 and R _E4 and the negative feedback resistors R _F1 and R _F2 , and the negative return resistor R _F1. Negative feedback to the bases of the transistors Q ₁ and Q ₂ with a negative feedback amount according to the values of R _F2 and R _F2 . As a result, the distortion of the high frequency integrated circuit is improved. As described above, the base bias voltage of each of the transistors Q _{1 to} Q ₄ is generated by the resistors R _C1 , R _C2 , R _E3 and R _E4 and the respective base emitter voltages V _{BE of the} transistors Q ₃ and Q _4. The resistors R _{1 to} R ₈ for supplying the base bias voltage and the large-capacity DC blocking capacitor, which were required in the past, are no longer required. In the above-described embodiment, the invention is applied to the balanced amplifier, but the invention may be applied to the unbalanced amplifier.

[0018]

[Effect of the device]

 As described above, according to the present invention, since a large-capacity DC blocking capacitor is unnecessary, the degree of amplification in the high frequency range of the amplifier is reduced due to the stray capacitance between the capacitor and the substrate. There is an effect that there is no. Further, since a large-capacity DC blocking capacitor is unnecessary, there is an effect that the semiconductor chip of the integrated circuit can be made small.

Furthermore, since a resistor for supplying a base bias voltage to each transistor is unnecessary, this also has an effect of reducing the size of the semiconductor chip of the integrated circuit. In addition, since the number of elements in the circuit is smaller than in the conventional case, there is an effect that the yield of semiconductor chips is improved.

[Brief description of drawings]

FIG. 1 shows a high frequency integrated circuit 10 according to an embodiment of the present invention.
FIG. 3 is a circuit diagram showing a configuration of a peripheral circuit and its peripheral circuits.

FIG. 2 is a circuit diagram showing a configuration example of a conventional high frequency integrated circuit 5 and its peripheral circuits.

[Explanation of symbols]

1 Input Terminal 2 Unbalanced Balanced Transformer 3, 4, 6, 7 DC Blocking Capacitor 5, 10 High Frequency Integrated Circuit 8 Balanced Unbalanced Transformer 9 Output Terminal _Vcc Constant Voltage Source I _{1 to} I ₃ Constant Current Source Q ₁ ~ Q ₄ transistor R _C1 , R _C2 , R _E3 , R _E4 , R _F1 , R _F2 resistance

Claims (1)

[Scope of utility model registration request] 1. A high-frequency integrated circuit in which a grounded-emitter amplifier and an emitter-follower amplifier are connected in cascade, and a negative feedback is applied from the emitter-follower amplifier to the grounded-emitter amplifier. A high-frequency integrated circuit which is applied to the base of an amplifier, and the emitter voltage of the emitter follower amplifier is applied to the base of the grounded-emitter amplifier via an emitter output resistance and a negative feedback resistance.