JPH0520089A - Assembly system - Google Patents

Abstract

PURPOSE:To prevent a bug from being generated and to shorten the time required for programming by lighting the burden on an operator in assembly processing. CONSTITUTION:On the memory of a processor, real register tables T0 and T1 showing the use states of actual registers used for the assembly processing and virtual register tables T100-T102 showing the use states of virtual registers for the real registers are set and when the register is specified with an assembler instruction, the processor retrieves the virtual register tables T100-T102 to confirm the use states of the real registers according to the information described in the virtual register tables T100-T102; and the processor assigns the real registers to be used and saves and reloads register values which are already set in the real registers.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an assembly system.

[0002]

2. Description of the Related Art In a conventional processing device that executes assembly processing, only registers that can be used during assembly processing (for example, registers that can be used as operands in assembler instructions) are real registers. I had to instruct to allocate and save serial registers.

[0003]

However, the instruction of register allocation and save is a complicated task, and moreover, the use status of the register must be accurately grasped at all times. In the past, which had to be done, the burden on the operator was large, the time required for programming was prolonged, and this was a major factor in the occurrence of bugs.

The present invention has been made in view of the above circumstances, and automates the work such as register allocation and saving during assembly processing to reduce the burden on the operator, prevent the occurrence of bugs, and perform programming. It is an object of the present invention to provide an assembly method that can reduce the time required for the assembly.

[0005]

In the assembly method according to the present invention, a real register table showing the usage status of real registers to be used for assembly processing in the processing device is stored in the memory of the processing device that executes the assembly processing. And a virtual register table indicating the use status of the virtual register with respect to the real register.

Moreover, in the virtual register table,
The real register information column for writing the corresponding real register and the save address information column for writing the address value of the save area are provided, and in the real register table, the virtual register information column for writing the corresponding virtual register and its real It is equipped with a usage frequency information column for writing the usage frequency of the register.

When a register is designated by an assembler instruction, the processing unit is caused to retrieve the virtual register table, and the usage status of the real register is confirmed based on the information described in the virtual register table. The processing device is caused to execute processing such as allocation of a real register to be used, saving and restoration of register values already set in the real register.

[0008]

In the assembly method according to the present invention, when a register is specified by the assembler instruction, the virtual register table set in the memory of the processor is searched by the processor and is written in the virtual register table. In order to confirm the usage status of the real register based on the information that is stored, to allocate the real register to be used, and to save and restore the register value already set in the real register in the processing device, the assembly process is performed. The operator does not need to perform work such as register allocation and saving / restoring register values, which reduces the burden on the operator during assembly processing, prevents bugs from occurring, and shortens programming time. ..

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the assembly method according to the present invention, a virtual register that can be used during assembly processing is set in advance in a processing apparatus for assembly processing, and during assembly processing, the procedure shown in FIG. The virtual register is used to cause the processing device to execute processing such as allocation of real registers and saving and restoring of register values.
On the memory of the processing device, a real register table for representing the usage status of each real register in the processing device and a virtual register table for representing the usage status of each set virtual register are created, respectively. Each real register is associated with a virtual register according to the description in the register table of.

FIG. 2 shows the relationship between the virtual register table and the real register table created in the memory of the processor. Reference numerals T100, T101, T1 in the figure
Reference numeral 02 is a virtual register table for virtual registers R100, R101, and R102, respectively. Further, reference numerals T0 and T1 are real register tables, which correspond to the real registers R0 and R1, respectively.

As shown, the virtual register table T1
00, T101, and T102, the next table information column J1 that indicates the next virtual register table, the virtual register number column J2 that displays the number of the virtual register of this table, and the storage location of the register value in the save area MA Equipped with a save address information column J3 in which is written, and a real register information column J4 in which the corresponding real register number is written. In this embodiment, the first and last ones in the created virtual register table are
When the pointers are designated by the head pointers P1 and P2, respectively, and when it becomes necessary to search the virtual register table, the search is started from the pointer designated by the head pointer P1, and thereafter, the next table information column J1 is searched. It is assumed that the final table is searched in order based on the information.

On the other hand, in the real register tables T0 and T1, the real register number column j1 in which the numbers of the real registers in this table are displayed, the use frequency information column j2 in which the use frequency of this real register is written, and its real register are shown. And a virtual register information column j3 in which the number of the virtual register assigned to is written.

Next, the real register allocating process, which is a feature of the assembly method of the first embodiment, will be described with reference to FIG.

This real register allocation process is a process executed by the processor when a register is specified by the assembler instruction. When the register is specified by the assembler instruction, first, the virtual register table registered in the memory is searched. Then, it is determined whether or not it has been registered. If not registered, a new virtual register table is created and registered (steps S1, S2, S3).

In the case of this embodiment, the virtual register table search method starts from the one pointed by the head pointer P1 as described above, and thereafter the information in the next table information column J1 It is a method to check the final table in order based on the above, but if the number of registers used for assembly is large and the number of virtual register tables to be registered is large, an efficient search using a hash table, etc. Will be done.

Then, it is judged whether or not the corresponding real register is registered in the virtual register table obtained by the search (step S4). If the real register is not registered in the virtual register table, the real register table is searched to select the real register to be used (step S5). The real register selected in step S5 is assumed to be the register specified by the assembler instruction when it is a real register. However, when the register specified by the assembler instruction is a virtual register, each existing real register exists. Based on the description in the table, it is vacant (or least frequently used).

Next, when the real register to be used is selected, it is judged whether or not the virtual register is registered in the real register table, and if it is registered, it is confirmed whether or not it is the designated virtual register ( Step S
6).

When a virtual register other than the designated one is registered, the real register is first released (step S7). Here, release means that a store instruction is output from the real register to the save area MA to store the register value of the virtual register registered in the real register table at a predetermined address of the save area MA, and then the real register. It means removing the virtual register registered in the table. And when released,
The value of the usage frequency information column j2 on the real register table is initialized to 0. The address when the virtual register is saved in the save area MA depends on the save address information column J3 of the virtual register table. When the address value is not registered in this information column, the address value is determined and then released. Perform processing.

In step S6, when the virtual register registered in the selected real register table is the designated one, the description of the virtual register table is confirmed. If the real register is not registered in the virtual register table and the save address is registered, a load instruction is output to the real register selected from the save area based on the save address to restore the register value. Then, the selected real register is registered as a register to be allocated in the virtual register table, and a series of allocation processing is completed.

In the processing in step S9, while registering the real register on the virtual register table, the value of the usage frequency information column j2 on the real register table of the registered real register is incremented by one.

FIG. 3 is a map diagram showing the real register allocation processing according to the above embodiment together with a concrete example of a program. In this specific example, real registers usable on the processing device are R0 and R1, and virtual registers set in the memory are R100 and 101. Also,
In FIG. 3, the left column shows the program instruction, and the right column shows the operation of the real register allocated according to one embodiment. There are five instructions from to, where is a load instruction to the frame pointer value 0 by designating the real register R0, is a load instruction to the frame pointer value 4 at the virtual register R100, and is a virtual A store (save) instruction to the frame pointer value 8 with the register R100 specified, a load instruction to the frame pointer value 12 with the virtual register R101 specified, and a frame pointer to the real register R0 specified It is a store instruction to the value 0.

In this embodiment, by the process of FIG. 1 described above, the real register R0 is allocated to the instruction of, the frame pointer value 0 is loaded, and the real register R1 is loaded to the instruction of. It is allocated and loaded to the address 4 of the frame pointer value, and the real register 1 is allocated to the instruction of and stored (saved) to the address 8 of the frame pointer value. In response to the instruction, first, the register value of the real register R0 is stored in the stack pointer value 0, and then the real register R0 is allocated and loaded to the frame pointer value 12.
For the instruction of, the register value of the real register R0 is first stored in the stack pointer value 12 and then the register value of the stack pointer value 0 saved in the real register R0 is restored. Its real register R
0 is allocated and the frame pointer value 0 is stored.

As described in detail above, in this embodiment, when a register is designated by an assembler instruction,
The virtual register table set in the memory of the processing unit is searched by the processing unit, the usage status of the real register is confirmed based on the information described in the virtual register table, and allocation of the real register to be used and Since the processing unit executes the processing such as saving and restoring the register value already set in the real register, the operator does not need to perform the work such as register allocation and saving or restoring the register value during the assembly processing. It is possible to reduce the burden on the operator, prevent the occurrence of bugs, and shorten the time required for the assembly process.

Needless to say, the assembly method of the present invention can be used not only for the operand analysis but also for the whole assembly processing that requires register allocation.

[0025]

As is apparent from the above description, in the assembly method according to the present invention, when a register is specified by the assembler instruction, the virtual register table set in the memory of the processing device is processed as described above. The device is made to search, the usage status of the real register is confirmed based on the information described in the virtual register table, the real register to be used is allocated, and the processing such as saving and restoring the register value already set in the real register is performed. Since the processing device executes the processing, it is not necessary for the operator to perform work such as register allocation and saving / restoring of register values during assembly processing, which reduces the burden on the operator during assembly processing and prevents the occurrence of bugs. The programming time can be shortened.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of register allocation processing according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a register table according to an embodiment of the present invention.

FIG. 3 is an explanatory view of the operation of one embodiment using a concrete example.

[Explanation of symbols]

 R0 real register R1 real register R100 virtual register R101 virtual register T0 real register table T1 real register table T100 virtual register table T101 virtual register table J1 next table information column J2 virtual register number column J3 save address information column J4 real register information column j1 real Register number column j2 Usage frequency information column j3 Virtual register information column

Claims (1)

Claim: What is claimed is: 1. A memory of a processing device that executes an assembly process, and a real register table that represents a usage state of a real register to be used for the assembly process in the processing device.
A virtual register table indicating the usage status of the virtual register for the real register is set, and further, in the virtual register table, a real register information column for writing the corresponding real register and a save for writing the address value of the save area are saved. The real register table is provided with a virtual register information column for writing the corresponding virtual register and a usage frequency information column for writing the usage frequency of the real register. When a register is specified, the processor is searched for the virtual register table, the usage status of the real register is confirmed based on the information described in the virtual register table, and the allocation of the real register to be used, Processing such as saving and restoring the register values already set in the actual registers can be performed by the processing device. Assembly scheme, characterized in that to the row.