JPH05198529A - Method of forming semiconductor crystal - Google Patents

Abstract

PURPOSE:To junction two layers of metallic layers, half metallic layers, or silicide and get high-quality crystals wherein the metallic layers are caught with semiconductors by heating the metallic layers, the half metallic layers, or silicide at not less than a temperature at which it is confirmed that they construct a stratified lattice by reflected high-speed electron beam diffraction, etc. CONSTITUTION:Crystals are made by sticking two sheets of metallic layers 9 and 14 close to each other in vacuum and heating them. These crystals are taken out into air, and it is shaved off by lapping until an n-type GaAs substrate 10 becomes 30mum or less. The residual GaAs substrate layer is removed by the selective etchant which dissolves GaAs and does not dissolve Al0.3Ga0.7As. Next, an Al0.3Ga0.7As layer 11 is removed by the selective etchant which does not dissolve GaAs. This way, semiconductor crystal catching the metallic crystal layer can be made on semiconductor substrate. That is, the crystal, which has caught both sides of the metallic layer having high-quality layer and interface with semiconductor layers, can be made.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a crystal having a structure in which a metal layer, a metalloid layer, or a silicide is sandwiched between semiconductor layers.

[0002]

2. Description of the Related Art In recent years, hetero-epitaxial growth for growing semiconductor layers having different compositions on a semiconductor substrate has become possible by a highly developed crystal growth technique, and a semiconductor device using this has been put into practical use. .. For example, the emitter, base, and collector of a hetero-bipolar transistor that operates at high speed are made of crystals in which semiconductors having different compositions and conduction types are stacked. Also,
Resonant tunnel diodes and transistors, which are attracting attention as high-speed switching devices, use semiconductors with different compositions and different band-to-band transition energies, with well layers with small band-to-band energy sandwiched by barrier layers with large band-to-band energy. Create with a crystal.

It is the resistance of the base semiconductor and the contact resistance of the electrode in the case of a transistor that limits the operating speed of these devices, and the resistance of the semiconductor in the well layer and the contact resistance of the electrode in a resonance tunneling diode. Is. If it becomes possible to replace these semiconductor layers with a metal having a lower resistance, it is possible to realize a device having a faster operating speed while simultaneously lowering the resistance of the active region and reducing the contact resistance of the electrodes. it can.

For this reason, studies are underway to create a structure in which a metal layer is sandwiched between semiconductor layers by a molecular beam epitaxial crystal growth method in high vacuum (Molecular Beam Epitakxy method, MBE for short). According to conventional research and development, it is possible to epitaxially grow a metal crystal with a close distance between atoms and the underlying semiconductor crystal by aligning the crystal axes, and flattening the interface between the semiconductor crystal and the metal crystal in atomic order. , Has succeeded in producing high quality metal crystals on semiconductor crystals.

[0005]

On the other hand, it is extremely difficult to form a high-quality semiconductor layer on a metal layer, and thus far, it is of sufficient quality to form a practical device. Is not available (references, ZH C
hen, JS Smith, S. Margalit, A. Yariv, LC Chi
u: Japanese Journal of Applied Physics (1984), Pa
rt 2, vol.23, No.4, p.L238-L240.). The main reason for this is that semiconductors and metals are essentially different in the force that binds their constituent atoms. Among the atoms that form the semiconductor, adjacent atoms are linked together through two common electrons, and a so-called covalent bond having a large binding force and a fixed directivity is shown. On the other hand, in metals, the atoms that make up the metals come close to each other, and by expanding the space in which the electrons of each atom can move to the region of other atoms,
Since the constituent atoms are so-called metal bonds that maintain a stable state when they become solid rather than when they are separated, the directionality between adjacent atoms is generally small.

Therefore, when the semiconductor layer is laminated on the metal layer, the underlying metal is easily deformed, which makes it difficult to form a flat and uniform semiconductor layer on the atomic order. Further, in general, the lattice constant of a metal crystal is smaller than that of a semiconductor crystal, and the symmetry of a metal crystal is higher than that of a semiconductor crystal. Property, which makes it difficult to form a uniform semiconductor crystal on the metal crystal.

Therefore, according to the prior art, it was possible to form a good-quality metal crystal on the semiconductor crystal, but if a second semiconductor crystal is further formed on it, it is possible to form a second semiconductor crystal. Poor quality, and the semiconductor / metal / semiconductor structure crystal prepared in this way has not yet been used to make a practical device (Reference, SM Sze, "Physics o
f Semiconductor Devices "(John Wiley & sons, Inc.
New York, 1969), p.587-613.).

An object of the present invention is to overcome the above difficulties and provide a high quality crystal in which a metal layer is sandwiched between semiconductor layers. Still another object of the present invention is to provide a high quality crystal in which not only a metal layer but also a semimetal layer or a silicide is sandwiched between semiconductor layers.

The above and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[0010]

In order to achieve the above object, the present invention firstly deposits a desired semiconductor layer 2 on a crystal substrate 1 by an MBE method as shown in FIG. Then, the metal layer 3 is laminated. By a similar method, as shown in FIG. 1B, the desired semiconductor layer 5 is laminated on the crystal substrate 4, and then the metal layer 6 is laminated. The two crystals thus formed are brought into close contact with each other and heated, whereby the two crystals are joined together to form a crystal as shown in FIG. 2 (a).

As described above, the cause of the force connecting the atoms constituting the metal is that the outer shell electrons of each atom spread into the solid metal. Alternatively, the activity of the bonding is higher than that of the surface of the semiconductor and that of the metal, and the bonding is easy. But,
After growing the metal layer, if it is left in the crystal growth apparatus for a long time, foreign atoms adhere to the metal layer, the bonding between the metals becomes incomplete, and a good quality crystal cannot be obtained.

From tens of seconds required for joining to tens of minutes,
In order to maintain the integrity of the metal surface without deteriorating the quality of the bond, the degree of vacuum at the place where the crystal is held after the growth is set to 1
It is necessary to below 0- ⁹ torr. In particular, it is important to keep the partial pressure due to an element other than the elements forming the metal layer to be equal to or lower than this pressure. Moreover, in order to reduce the disorder of the interface between the two layers of metal to be bonded, it is desirable that the surface of the grown metal be flat and regularly arranged. It can be confirmed by doing.

In general, in such a state (growth plane orientation, temperature, degree of vacuum, etc.), the metal atoms are smoothly moved on the surface, so that the metal layer is lightly adhered under such conditions. The two metal layers attract each other and adhere to each other without significantly disturbing the interface between the two metal layers. This is because, as described above, the atoms that make up the metal have the property of attracting each other, so when a metal having a clean surface is brought into contact in a vacuum, surface tension acts, and some unevenness has a directivity of bonding. This is because the atoms are smoothed by the movement of atoms on the small metal surface.

In the crystal thus produced, both ends of the semiconductor crystal sandwiching the metal layer are substrate crystals. A thick substrate crystal becomes an obstacle when finely processing a metal layer to be an active region of the device and a semiconductor layer grown in contact with the metal layer by photolithography or the like. In order to remove this, the composition or impurity concentration of the semiconductor layer 5 in FIG. 1 is made different from that of the crystal substrate 4. After adhering the two crystal metal layers, the crystal substrate 4 is polished leaving several tens of micrometers from the interface between the crystal substrate 4 and the semiconductor layer 5, and then the crystal substrate 4 is melted and the semiconductor layer 5 is removed. The crystal substrate 4 remaining with the insoluble solution is removed.

Such a solution is well known as a selective etching solution for various semiconductors. As described above, a desired semiconductor crystal as shown in FIG. 2B can be produced.

[0016]

The semiconductor crystal according to the present invention can be used for various purposes as a new type of crystal, and is particularly promising for application to a ballistic type electric element (references, (JM
Poate, RC Dynes, IEEE Spectrum (1986), vol.23,
No.2, p.38-42.).

In this type of element, since the electrons pass through the metal layer sandwiched by the semiconductors without being scattered, an element which operates at a very high speed can be realized. In order to reduce the transit time of electrons, it is desirable that the metal layer be thin, but in order to stabilize the characteristics of the junction formed by the semiconductor and the metal, so-called Schottky junction, the thickness of the metal layer on the semiconductor should be reduced. At least 3 atomic layers (about 0.5 nm)
It is desirable to set it as above.

Further, on the surfaces of the two metal layers to be bonded,
It is desirable to have a deformable metal layer having the property of metal bonding that is not significantly affected by the bond with a directional semiconductor. Therefore, the thickness of the joined metal layers is
When the thickness is 1 nm or more as a whole, a good semiconductor / metal / semiconductor junction can be realized.

On the other hand, in order to realize a device that operates at high speed, it is important that high-speed electrons pass through the metal layer without being scattered. The distance that electrons can move in a metal without being scattered is called the mean free path, and it depends on the type of metal, the concentration of impurities and defects in the metal, the temperature, etc., but it is about 50 nm or less at room temperature. . Therefore,
In the semiconductor crystal according to the present invention, the metal layer has a thickness of 1 nm.
It is practically important that the thickness is 50 nm or less.

What is remarkable in the present invention is that the present invention can be applied even in the case where two semiconductor crystals before being bonded have greatly different lattice constants. In the conventional epitaxial growth technique, it was generally difficult to bond crystals having different lattice constants while maintaining high quality. In the above description, the metal layer 3 and the metal layer 6 form a strong bond even if their lattice constants are different.

This is because, as described above, in the bond between metal atoms, the fact that electrons move around between the adjacent metals is the cause of the bonding force, so that the disorder of the lattice is caused by the rearrangement of atoms. This is because it is easily adjusted. Such disorder of the lattice arrangement in the metal causes electron scattering, but its influence is far less than that in the case of such disorder in the semiconductor.

In semiconductors, the energy that electrons can take has a forbidden band, and the energy level is generated in the forbidden band due to the disorder of the lattice, which causes electrons to be trapped. However, metal has no forbidden band. Grating turbulence does not cause significant scattering. Therefore, by using the technique according to the present invention, two crystals grown on a semiconductor having largely different characteristics such as lattice constants can be bonded via the metal layer while maintaining high quality.

This is very important, for example, in giving the degree of freedom to arbitrarily select the semiconductor for the emitter and the semiconductor for the collector in manufacturing the metal base transistor described above. That is,
On top of the semiconductor, for which a high band-to-band energy for the emitter is desired, is grown a certain metal layer which grows with high quality, while for the collector, a semiconductor with a lower band-to-band energy is desired. On top of that is grown another metal layer which grows on it with high quality. After that, by joining these metal layers, a semiconductor / metal / semiconductor junction crystal having no defects in the semiconductor layer and the semiconductor / metal interface, which become a major factor of electron scattering, can be realized.

In the above description, a structure in which a metal is sandwiched between semiconductors has been described, but the same technique can be applied to the case where the metal is replaced with a semimetal or a silicide. Note that the semimetal here means a substance having free electrons (holes) similar to those of metals, but the density thereof is much smaller than that of ordinary metals.

For example, a high quality NiSi ₂ crystal is formed on a (111) plane Si crystal, and a (100) plane GaAs is formed.
High quality ErAs crystals can be grown on the crystals, but NiSi ₂ and ErAs are known to be materials having high conductivity comparable to metals. In addition, since one of the constituent elements of these semi-metals or silicides is common to the constituent element of the underlying semiconductor, a good interface with the semiconductor can be formed. The technology according to the present invention can be applied to a wider range of applications by applying it to such materials.

The structure of the present invention will be described below together with embodiments.

[0027]

(Embodiment 1) FIGS. 3 and 4 are views for explaining Embodiment 1 and show a method of forming a basic structure of a GaAs-based metal base transistor. First, FIG.
As shown in (a), n-type GaAs with a plane orientation (100)
A 1 μm n-type GaAs layer 8 is laminated on the crystal substrate 7, and then an Al layer 9 of 1 to 20 nm is laminated. On the other hand, as shown in FIG. 3B, 0.5 μm of n-type Al ₀ .. is formed on the n-type GaAs crystal substrate 10 having the plane orientation (100).
₃ Ga _{0. 7} As layers 11 are stacked, 1 [mu] m n-type GaAs of
A layer 12 and a highly doped n-type GaAs layer 13 having a thickness of 1 to 2 nm are stacked, and an Al layer 14 having a thickness of 1 to 20 nm is further stacked.

[0028] is brought into close contact these two metal layers 9 and 14 of the crystal in a vacuum of 10- ⁹ torr to each other, 300
By heating at ~ 400 ° C for 2 minutes, Fig. 4 (a)
Crystals such as those shown in can be formed. This crystal is taken out into the atmosphere and is scraped off by lapping until the n-type GaAs substrate 10 becomes 30 μm or less. The remaining GaAs substrate layer, dissolving GaAs, Al _{0 3} Ga _{0 7} selective etchant that does not dissolve the As.. (Hydrogen peroxide H ₂ O _2: aqueous ammonia NH ₄ OH = 30: 1) by removing. Next, A
l ₀ a. ₃ Ga _{0. 7} As layer 11, dissolved _{Al 0. 3 Ga 0. 7} As, is removed by selective etching solution which does not dissolve the GaAs (hydrofluoric acid HF). Thus, the semiconductor crystal sandwiching the metal crystal layer as shown in FIG. 4B is formed on the semiconductor substrate.

As the metal layer 9 and the metal layer 14 of this example,
Instead of the Al layer, other metals that are epitaxially grown on the GaAs (100) plane can be used. That is, as the metal layers 9 and 14, Al having a thickness of 1 to 20 nm,
NiAl, NiGa, CoAl, CoGa layers can be used.

(Embodiment 2) FIGS. 5 and 6 are views for explaining Embodiment 2 and show a method of forming a basic structure of a Si-based metal base transistor. First, FIG.
As shown in (a), the plane orientation (111) or (10
0) n-type Si crystal substrate 15 is laminated with 1 μm n-type Si layer 16, and then 1-20 nm CoSi ₂ layer 1 is deposited.
7 is laminated. On the other hand, as shown in FIG. 5B, an n-type Si crystal substrate 1 having a plane orientation (111) or (100)
8, a highly doped p-type Si layer 19 of 0.5 μm,
A 1 μm n-type Si layer 20 and a 1-2 nm highly-doped n-type Si layer 21 are stacked, and further 1-20 nm C
The oSi ₂ layer 22 is laminated. Here, the plane orientations of the n-type Si crystal substrates 15 and 18 may be different from each other.

Next, these two metal layers 17 and 22 of the crystal 10- ⁹ torr into close contact with each other in a vacuum below, by heating for 2 minutes at 300 to 400 ° C,
A crystal as shown in FIG. 6A is formed. This crystal is taken out into the atmosphere and is scraped off by lapping until the n-type Si substrate 18 becomes 30 μm or less. The remaining Si substrate layer is
It is removed by a selective etching solution that dissolves n-type Si and does not dissolve highly-doped p-type Si (a mixed solution of 17 ml of ethylenediamine, 3 g of pyrocatechol, and 8 ml of water (EPW), a doping concentration difference etching ratio of ˜50). Next, the highly-doped p-type Si layer 19 is selectively doped with a highly-doped p-type Si but does not dissolve n-type Si (mixed solution of nitric acid HNO ₃ , hydrofluoric acid HF, acetic acid CH ₃ COOH, doping). It is removed by the concentration difference etching ratio ˜50). In this way, the semiconductor crystal sandwiching the metal crystal layer as shown in FIG. 6B is formed on the semiconductor substrate.

As the metal layers 17 and 22 of the present example,
Instead of the CoSi ₂ layer, Si (100) or (1
11) Another metal (metal having a good lattice matching with Si) expected to grow epitaxially on the plane can be used. That is, as the metal layers 17 and 22, 1-2
0 μm CoSi ₂ , NiSi ₂ , Nb ₃ Sn, Nb ₃ Ge
Layers can be used.

(Embodiment 3) FIGS. 7 and 8 are diagrams for explaining Embodiment 3 and show a method of forming a basic structure of a resonant tunneling device using a metal quantum well. First,
As shown in FIG. 7A, an n-type Ga having a plane orientation (100)
A 1 μm n-type GaAs 24 and a 1-2 nm AlAs layer 25 are stacked on the As crystal substrate 23, and then 1 to 3 are stacked.
The Al layer 26 having a thickness of 10 nm is laminated. On the other hand, as shown in FIG. 7B, an n-type GaAs crystal substrate 2 having a plane orientation (100)
N-type Al ₀ of 0.5μm on the _{7. 3} Ga _0. 7 As layer 28,
1 μm n-type GaAs layer 29 and 1-2 nm AlA
The s layer 30 is laminated, and the Al layer 31 having a thickness of 1 to 3 nm is further laminated.

These two crystalline metal layers 26 and 31
Into close contact with each other in a vacuum of 10- ⁹ torr and 30
By heating at 0-400 ° C for 2 minutes, Fig. 8 (a)
Can form crystals. This crystal was taken out to the atmosphere and n-type G
The aAs substrate 27 is scraped off by lapping until it becomes 30 μm or less. The remaining GaAs substrate layer is GaAs
.. Was dissolved, Al _{0 3} Ga _{0 7} selective etchant that does not dissolve the As (hydrogen peroxide H ₂ O _2: aqueous ammonia NH ₄ O
H = 30: 1). _{Then, Al 0. 3 Ga 0.} 7
The As layer 28 was dissolved _{Al 0. 3 Ga 0. 7} As, is removed by selective etching solution which does not dissolve the GaAs (hydrofluoric acid HF). Thus, the semiconductor crystal sandwiching the metal crystal layer as shown in FIG. 8B is formed on the semiconductor substrate.

As the metal layers 26 and 31 of the third embodiment, other metal which is epitaxially grown on the AlAs (100) surface may be used instead of the Al layer. That is, as the metal layers 26 and 31, 1 to 3 nm of Al,
NiAl, NiGa, CoGa layers can be used.

Although the present invention has been specifically described above based on the embodiments, it is needless to say that the present invention is not limited to the above embodiments and various modifications can be made without departing from the scope of the invention.

[0037]

As described above, according to the present invention,
It becomes possible to form a crystal in which both sides of a metal layer having a high quality layer and an interface or a semi-metal layer are sandwiched by semiconductor layers, which opens the way for practical application of an ultrafast electronic device.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a semiconductor layer laminated on a semiconductor substrate for explaining the present invention.

2A and 2B are a cross-sectional view in which the metal layers of FIG. 1 are joined and a cross-sectional view of a desired crystal in which one substrate is removed.

FIG. 3 is a cross-sectional view in which a semiconductor layer is laminated on the semiconductor substrate of Example 1 of the present invention.

4A and 4B are a cross-sectional view in which the metal layers of FIG. 3 are joined and a cross-sectional view of a desired crystal in which one substrate is removed.

FIG. 5 is a cross-sectional view in which a semiconductor layer is laminated on a semiconductor substrate of Example 2 of the present invention.

6A and 6B are a cross-sectional view in which the metal layers of FIG. 5 are joined and a cross-sectional view of a desired crystal in which one substrate is removed.

FIG. 7 is a cross-sectional view in which a semiconductor layer is laminated on a semiconductor substrate of Example 3 of the present invention.

8A and 8B are a cross-sectional view in which the metal layers of FIG. 7 are joined and a cross-sectional view of a desired crystal in which one substrate is removed.

[Explanation of symbols]

1, 4, 7, 10, 15, 18, 23, 27 ... Semiconductor crystal substrate, 2, 5, 8, 11, 12, 13, 16, 19,
20, 21, 24, 25, 28, 29, 30 ... Semiconductor layer, 3, 6, 9, 14, 17, 22, 26, 31 ... Metal layer, metalloid layer or silicide.

Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI Technical indication location H01L 21/28 301 S 7738-4M 29/48 F 7738-4M 21/331 29/73

Claims (3)

[Claims] 1. A metal layer, a semimetal layer, or a silicide is formed on each of two semiconductor crystal substrates, and the two semiconductor crystal substrates are adhered to each other by the metal layer, the semimetal layer, or the silicide. In this state, the metal layer, the semimetal layer, or the silicide is heated in a vacuum of a predetermined value or less at a temperature higher than the temperature at which it is confirmed that the metal layer, the metalloid layer, or the silicide forms a layered lattice by reflection high-energy electron diffraction or the like. A method for producing a semiconductor crystal, which comprises joining a metal layer, a semi-metal layer or a silicide. 2. At least one of the two semiconductor crystal substrates is formed with a semiconductor layer having a different composition or impurity concentration on the semiconductor crystal substrate, and a metal layer, a semi-metal layer or a silicide is further formed thereon. The semiconductor crystal substrate is formed and formed, and after bonding the metal layer, the semimetal layer, or the silicide of the two semiconductor crystal substrates, the semiconductor crystal substrate is formed by utilizing the difference in etching rate between the semiconductor crystal substrate and the semiconductor layer. The method for producing a semiconductor crystal according to claim 1, characterized in that the semiconductor layer is removed and the semiconductor layer is left. 3. A metal or metalloid layer comprising a metal layer, a metalloid layer or a silicide formed on at least one semiconductor substrate, which is composed of at least one element which is the composition of the semiconductor metal layer and another element. 3. The method for producing a semiconductor crystal according to claim 1, wherein the method is a silicide.