JPH05198497A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH05198497A
JPH05198497A JP815692A JP815692A JPH05198497A JP H05198497 A JPH05198497 A JP H05198497A JP 815692 A JP815692 A JP 815692A JP 815692 A JP815692 A JP 815692A JP H05198497 A JPH05198497 A JP H05198497A
Authority
JP
Japan
Prior art keywords
resist film
fine
mask
manufacturing
rough
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP815692A
Other languages
Japanese (ja)
Inventor
Takeo Moriyama
武郎 森山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Priority to JP815692A priority Critical patent/JPH05198497A/en
Publication of JPH05198497A publication Critical patent/JPH05198497A/en
Withdrawn legal-status Critical Current

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  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Drying Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To conduct the formation of a fine resist film having an excellent shape and the formation of a coarse resist film positively by exposing a resist film by using a mask for manufacturing two kinds of diffusion layers having simple constitution and forming the pattern of the fine resist film and the pattern of the coarse resist film through etching. CONSTITUTION:When a mask A, in which a fine pattern section 1a and a coarse pattern section 1b are mixed and shaped, is placed onto the surface of a resist film 3 composed of a positive resist formed onto the surface of a semiconductor substrate 4 and the surface of the resist film 3 is exposed and a fine resist film 3a is developed under conditions under an excellent state, the fine resist film 3a is formed. When a mask B, in which a shielding pattern section 2a and a coarse pattern 2b are mixed and shaped, is placed and the resist film is exposed and a coarse resist film 3b is developed under conditions under the excellent state, the fine resist film 3a is kept under the state left as it is, and the resist film left in the peripheral section of the coarse resist film 3b is etched and removed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置の製造工程
における拡散層製造用のマスクを用いる半導体装置の製
造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device using a mask for manufacturing a diffusion layer in a semiconductor device manufacturing process.

【0002】半導体装置の製造工程において拡散層の製
造に用いるレジスト膜を形成する際に、このレジスト膜
を露光するマスクのパターンが、微細パターン部と粗な
パターン部とが混在する構成を有している場合に、一定
の条件で同時にエッチングを行って微細なレジスト膜も
粗なレジスト膜もともに良好な状態でエッチングにより
形成することが困難である。
When a resist film used for manufacturing a diffusion layer is formed in a semiconductor device manufacturing process, a pattern of a mask for exposing the resist film has a structure in which a fine pattern portion and a rough pattern portion are mixed. In such a case, it is difficult to form a fine resist film and a rough resist film by etching at the same time under a certain condition in good condition.

【0003】以上のような状況から、微細なレジスト膜
も粗なレジスト膜もともに良好な状態でエッチングによ
り形成することが可能な半導体装置の製造方法が要望さ
れている。
Under the circumstances as described above, there is a demand for a method of manufacturing a semiconductor device capable of forming both a fine resist film and a rough resist film by etching in good condition.

【0004】[0004]

【従来の技術】従来の拡散層製造用マスクについて図4
により、このマスクを用いる半導体装置の製造方法につ
いて図5により詳細に説明する。
2. Description of the Related Art A conventional mask for manufacturing a diffusion layer is shown in FIG.
5, a method of manufacturing a semiconductor device using this mask will be described in detail with reference to FIG.

【0005】図4は従来の拡散層製造用マスクを模式的
に示す図、図5は従来の拡散層製造用マスクを用いる半
導体装置の製造方法を示す図である。従来の拡散層製造
用マスクは図4に示すようなガラス基板11c の表面に微
細パターン部11aと粗なパターン部11bとが混在して形成
されているマスク11である。
FIG. 4 is a diagram schematically showing a conventional diffusion layer manufacturing mask, and FIG. 5 is a diagram showing a semiconductor device manufacturing method using the conventional diffusion layer manufacturing mask. The conventional mask for producing a diffusion layer is a mask 11 in which a fine pattern portion 11a and a rough pattern portion 11b are mixedly formed on the surface of a glass substrate 11c as shown in FIG.

【0006】この微細パターン部11a は、図5に示すよ
うに半導体基板14の表面に形成したレジスト膜13をエッ
チングにより形成する微細なレジスト膜13a の形状に相
当する形状を有しており、この粗なパターン11b は半導
体基板14の表面に形成したレジスト膜13をエッチングに
より形成する粗なレジスト膜13b の形状に相当する形状
を有している。
The fine pattern portion 11a has a shape corresponding to the shape of the fine resist film 13a formed by etching the resist film 13 formed on the surface of the semiconductor substrate 14 as shown in FIG. The rough pattern 11b has a shape corresponding to the shape of the rough resist film 13b formed by etching the resist film 13 formed on the surface of the semiconductor substrate 14.

【0007】この拡散層製造用マスクを用いて半導体装
置を製造する場合に、図5に示すように半導体基板14の
表面に形成したポジレジストからなるレジスト膜13の表
面にこの拡散層製造用のマスク11を載置して露光する
と、図5において網かけした部分のレジスト膜13は遮光
され、その他の部分は露光される。
When manufacturing a semiconductor device using this diffusion layer manufacturing mask, as shown in FIG. 5, the surface of a resist film 13 made of a positive resist formed on the surface of a semiconductor substrate 14 is used for manufacturing this diffusion layer. When the mask 11 is placed and exposed, the shaded portion of the resist film 13 in FIG. 5 is shielded from light and the other portion is exposed.

【0008】このレジスト膜13の現像を、微細なレジス
ト膜13a が良好な状態で現像される条件で現像すると、
粗なレジスト膜13b の周辺部が図5に示すように残り良
好な状態では現像されない。
When the resist film 13 is developed under the condition that the fine resist film 13a is developed in a good state,
The peripheral portion of the rough resist film 13b remains as shown in FIG. 5 and is not developed in a good state.

【0009】逆にこのレジスト膜13の現像を、粗なレジ
スト膜13b が良好な状態で現像される条件で現像する
と、微細なレジスト膜13a の現像が進み過ぎて微細なレ
ジスト膜13a がオーバーエッチングされる。
On the contrary, if the resist film 13 is developed under the condition that the rough resist film 13b is developed in a good state, the fine resist film 13a is overdeveloped and the fine resist film 13a is over-etched. To be done.

【0010】[0010]

【発明が解決しようとする課題】以上説明したマスクの
パターンに微細パターン部と粗なパターン部とが混在し
ている従来の拡散層製造用マスクを用いてレジスト膜を
露光し、一定の条件で同時にエッチングを行うと、微細
なレジスト膜か或いは粗なレジスト膜のどちらかが良好
な状態でエッチングにより形成することが困難になると
いう問題点があった。
The resist film is exposed using a conventional diffusion layer manufacturing mask in which a fine pattern portion and a rough pattern portion are mixed in the mask pattern described above, and the resist film is exposed under constant conditions. If etching is performed at the same time, there is a problem that it is difficult to form either a fine resist film or a rough resist film by etching in a good state.

【0011】本発明は以上のような状況から、良好な形
状の微細なレジスト膜の形成と良好な形状の粗なレジス
ト膜の形成とを確実に行うことが可能となる半導体装置
の製造方法の提供を目的としたものである。
Under the circumstances as described above, the present invention provides a method of manufacturing a semiconductor device, which can reliably form a fine resist film having a good shape and a rough resist film having a good shape. It is intended to be provided.

【0012】[0012]

【課題を解決するための手段】本発明の半導体装置の製
造方法は、半導体基板の表面に形成したレジスト膜をエ
ッチングにより形成する粗なレジスト膜の形状に相当す
る形状を有する粗なパターン部と、この粗なパターン部
以外の全領域に微細パターン部を設けた拡散層製造用の
マスクAを用いてこのレジスト膜を露光し、このレジス
ト膜の微細なレジスト膜を形成するエッチング条件によ
りこのレジスト膜をエッチングする工程と、この粗なパ
ターン部と同じ形状の粗なパターン部と、この半導体基
板の表面に形成したレジスト膜をエッチングにより形成
する微細なレジスト膜の領域に相当する形状の遮蔽パタ
ーン部とを設けた拡散層製造用のマスクBを用いてこの
レジスト膜を露光し、このレジスト膜の粗なレジスト膜
を形成するエッチング条件によりこのレジスト膜をエッ
チングする工程とを含むように構成する。
A method of manufacturing a semiconductor device according to the present invention includes a rough pattern portion having a shape corresponding to the shape of a rough resist film formed by etching a resist film formed on a surface of a semiconductor substrate. This resist film is exposed using a mask A for manufacturing a diffusion layer in which a fine pattern portion is provided in the entire area other than the rough pattern portion, and the resist is formed under etching conditions for forming a fine resist film of the resist film. A step of etching the film, a rough pattern portion having the same shape as this rough pattern portion, and a shielding pattern having a shape corresponding to a region of a fine resist film formed by etching the resist film formed on the surface of the semiconductor substrate. Etching for forming a rough resist film of this resist film by exposing this resist film using a mask B for manufacturing a diffusion layer The grayed condition configured to include a step of etching the resist film.

【0013】[0013]

【作用】即ち本発明においては、図3(a) に示すように
マスクAを用いて半導体基板4の表面に形成したレジス
ト膜3を露光し、このレジスト膜3の微細なレジスト膜
3aを良好な形状に形成するエッチング条件によりこのレ
ジスト膜3をエッチングすると、微細なレジスト膜3aを
正確に形成することが可能であり、粗なレジスト膜3bの
周辺部の形状は不安定な形状になるが、図3(b) に示す
ようにマスクBを用いてこのレジスト膜3を露光し、こ
のレジスト膜3の粗なレジスト膜3bを良好な形状に形成
するエッチング条件によりこのレジスト膜3をエッチン
グすると、微細なレジスト膜3aは露光しないでそのまま
にしておいて、粗なレジスト膜3bを正確に形成すること
が可能となる。
That is, in the present invention, the resist film 3 formed on the surface of the semiconductor substrate 4 is exposed by using the mask A as shown in FIG.
If the resist film 3 is etched under the etching conditions for forming the 3a in a good shape, the fine resist film 3a can be accurately formed, and the shape of the peripheral portion of the rough resist film 3b is an unstable shape. However, as shown in FIG. 3B, the resist film 3 is exposed by using the mask B, and the resist film 3 is formed under the etching conditions for forming the rough resist film 3b of the resist film 3 into a good shape. By etching, the fine resist film 3a can be left as it is without being exposed, and the rough resist film 3b can be accurately formed.

【0014】[0014]

【実施例】以下図1〜図3により本発明の一実施例の拡
散層製造用マスクを用いる半導体装置の製造方法につい
て詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a semiconductor device using a diffusion layer manufacturing mask according to an embodiment of the present invention will be described in detail below with reference to FIGS.

【0015】図1は本発明による一実施例の半導体装置
の製造方法に用いる拡散層製造用マスクAを示す図、図
2は本発明による一実施例の半導体装置の製造方法に用
いる拡散層製造用マスクBを示す図、図3は本発明によ
る一実施例の半導体装置の製造方法を工程順に示す図で
ある。
FIG. 1 is a diagram showing a diffusion layer manufacturing mask A used in a semiconductor device manufacturing method according to an embodiment of the present invention, and FIG. 2 is a diffusion layer manufacturing mask used in a semiconductor device manufacturing method according to an embodiment of the present invention. FIG. 3 is a diagram showing a mask B for manufacturing, and FIG. 3 is a diagram showing a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps.

【0016】本発明による一実施例の半導体装置の製造
方法に用いる拡散層製造用マスクは、図1に示すような
ガラス基板1cの表面に微細パターン部1aと粗なパターン
部1bとが混在して形成されているマスクA1と、図2に
示すようなガラス基板2cの表面に遮蔽パターン部2aと粗
なパターン2bとが混在して形成されているマスクB2と
からなる拡散層製造用マスクである。
The diffusion layer manufacturing mask used in the method of manufacturing a semiconductor device according to one embodiment of the present invention has a fine pattern portion 1a and a rough pattern portion 1b mixed on the surface of a glass substrate 1c as shown in FIG. And a mask B2 formed by mixing a shielding pattern portion 2a and a rough pattern 2b on the surface of a glass substrate 2c as shown in FIG. is there.

【0017】図1の粗なパターン部1bと図2の粗なパタ
ーン部2bとは従来のマスクの粗なパターン部と同一のパ
ターンであり、図1の微細パターン部1aは従来のマスク
の微細パターン部と同じパターンであるが、形成されて
いる領域は広範囲に及んでおり、図2の遮蔽パターン部
2aは従来のマスクの微細パターン部11a の領域を被覆す
るパターンである。
The rough pattern portion 1b of FIG. 1 and the rough pattern portion 2b of FIG. 2 are the same patterns as the rough pattern portion of the conventional mask, and the fine pattern portion 1a of FIG. 1 is the fine pattern of the conventional mask. The pattern is the same as that of the pattern portion, but the formed area extends over a wide area.
2a is a pattern for covering the area of the fine pattern portion 11a of the conventional mask.

【0018】図1の微細パターン部1aは、図3に示す半
導体基板4の表面に形成したレジスト膜3をエッチング
により形成する微細なレジスト膜3aの形状に相当する形
状を有しており、図1の粗なパターン1bは、図3に示す
半導体基板4の表面に形成したレジスト膜3をエッチン
グにより形成する粗なレジスト膜3bの形状に相当する形
状を有している。
The fine pattern portion 1a of FIG. 1 has a shape corresponding to the shape of the fine resist film 3a formed by etching the resist film 3 formed on the surface of the semiconductor substrate 4 shown in FIG. The rough pattern 1b of No. 1 has a shape corresponding to the shape of the rough resist film 3b formed by etching the resist film 3 formed on the surface of the semiconductor substrate 4 shown in FIG.

【0019】この拡散層製造用マスクを用いて半導体装
置を製造する場合に、まず図3(a)に示すように半導体
基板4の表面に形成したポジレジストからなるレジスト
膜3の表面にこの拡散層製造用のマスクA1を載置して
露光すると、図3(a) において網かけした部分のレジス
ト膜3は遮光され、その他の部分は露光される。
When a semiconductor device is manufactured using this diffusion layer manufacturing mask, first, as shown in FIG. 3A, this diffusion is performed on the surface of the resist film 3 made of a positive resist formed on the surface of the semiconductor substrate 4. When the mask A1 for layer production is placed and exposed, the shaded portion of the resist film 3 in FIG. 3 (a) is shielded from light and the other portion is exposed.

【0020】このレジスト膜3の現像を、微細なレジス
ト膜3aが良好な状態で現像される条件で現像すると微細
なレジスト膜3aは良好な形状に形成されるが、粗なレジ
スト膜3bの周辺部が図3(a) に示すように残り良好な状
態では現像されない。
When the development of the resist film 3 is performed under the condition that the fine resist film 3a is developed in a good state, the fine resist film 3a is formed in a good shape, but around the rough resist film 3b. As shown in FIG. 3 (a), the part remains and is not developed in a good condition.

【0021】つぎに図3(b) に示すように半導体基板4
の表面に形成したレジスト膜3の表面にこの拡散層製造
用のマスクB2を載置して露光すると、図3(b) におい
て網かけした部分のレジスト膜3は遮光され、その他の
部分は露光される。
Next, as shown in FIG. 3B, the semiconductor substrate 4
When the mask B2 for manufacturing the diffusion layer is placed on the surface of the resist film 3 formed on the surface of the substrate and exposed, the shaded portion of the resist film 3 in FIG. 3B is shielded from light and the other portion is exposed. To be done.

【0022】このレジスト膜3の現像を、粗なレジスト
膜3bが良好な状態で現像される条件で現像すると、微細
なレジスト膜3aは露光されていないので現像されずその
ままの状態に保たれ、粗なレジスト膜3bの周辺部に残っ
ていたレジスト膜が図に示すようにエッチングされて除
去され、粗なレジスト膜3bを良好な形状に形成すること
が可能となる。
When the development of the resist film 3 is carried out under the condition that the rough resist film 3b is developed in a good state, the fine resist film 3a is not exposed and is kept undeveloped. The resist film remaining on the peripheral portion of the rough resist film 3b is etched and removed as shown in the figure, so that the rough resist film 3b can be formed in a good shape.

【0023】[0023]

【発明の効果】以上の説明から明らかなように、本発明
によれば極めて簡単な構成の二種類のマスクを用いるこ
とにより、レジスト膜の微細なレジスト膜のパターンも
粗なレジスト膜のパターンもともに良好な状態でエッチ
ングにより形成することが可能となる利点があり、著し
い品質向上の効果が期待できる拡散層製造用マスク及び
半導体装置の製造方法の提供が可能である。
As is apparent from the above description, according to the present invention, by using two kinds of masks having an extremely simple structure, both a fine resist film pattern of a resist film and a rough resist film pattern can be obtained. Both have the advantage that they can be formed by etching in a good state, and it is possible to provide a mask for manufacturing a diffusion layer and a method for manufacturing a semiconductor device, which can be expected to significantly improve quality.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明による一実施例の半導体装置の製造方
法に用いる拡散層製造用マスクAを模式的に示す図、
FIG. 1 is a diagram schematically showing a diffusion layer manufacturing mask A used in a semiconductor device manufacturing method according to an embodiment of the present invention;

【図2】 本発明による一実施例の半導体装置の製造方
法に用いる拡散層製造用マスクBを模式的に示す図、
FIG. 2 is a diagram schematically showing a diffusion layer manufacturing mask B used in a method of manufacturing a semiconductor device according to an embodiment of the present invention;

【図3】 本発明による一実施例の拡散層製造用マスク
を用いる半導体装置の製造方法を工程順に示す図
FIG. 3 is a diagram showing, in the order of steps, a method of manufacturing a semiconductor device using the diffusion layer manufacturing mask of one embodiment according to the present invention.

【図4】 従来の拡散層製造用マスクを模式的に示す図FIG. 4 is a diagram schematically showing a conventional mask for manufacturing a diffusion layer.

【図5】 従来の拡散層製造用マスクを用いる半導体装
置の製造方法を示す図
FIG. 5 is a diagram showing a method of manufacturing a semiconductor device using a conventional mask for manufacturing a diffusion layer.

【符号の説明】[Explanation of symbols]

1はマスクA、1aは微細パターン部、1bは粗なパターン
部、2はマスクB、2aは遮蔽パターン部、2bは粗なパタ
ーン部、3はレジスト膜、3aは微細なレジスト膜、3bは
粗なレジスト膜、4は半導体基板、
1 is a mask A, 1a is a fine pattern portion, 1b is a rough pattern portion, 2 is a mask B, 2a is a shield pattern portion, 2b is a rough pattern portion, 3 is a resist film, 3a is a fine resist film, and 3b is Rough resist film, 4 is a semiconductor substrate,

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/22 T 9278−4M 21/302 J 7353−4M 21/312 M 8518−4M ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI Technical indication H01L 21/22 T 9278-4M 21/302 J 7353-4M 21/312 M 8518-4M

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板(4) の表面に形成したレジス
ト膜(3) をエッチングにより形成する粗なレジスト膜(3
b)の形状に相当する形状を有する粗なパターン部(1b)
と、該粗なパターン部(1b)以外の全領域に微細パターン
部(1a)を設けた拡散層製造用のマスクA(1) を用いて前
記レジスト膜(3) を露光し、前記レジスト膜(3) の微細
なレジスト膜(3a)を形成するエッチング条件により前記
レジスト膜(3) をエッチングする工程と、 前記粗なパターン部(1b)と同じ形状の粗なパターン部(2
b)と、前記半導体基板(4) の表面に形成したレジスト膜
(3) をエッチングにより形成する微細なレジスト膜(3a)
の領域に相当する形状の遮蔽パターン部(2a)とを設けた
拡散層製造用のマスクB(2) を用いて前記レジスト膜
(3) を露光し、前記レジスト膜(3) の粗なレジスト膜(3
b)を形成するエッチング条件により前記レジスト膜(3)
をエッチングする工程と、 を含むことを特徴とする半導体装置の製造方法。
1. A rough resist film (3) formed by etching a resist film (3) formed on a surface of a semiconductor substrate (4).
Rough pattern part (1b) having a shape corresponding to that of b)
And the resist film (3) is exposed by using the mask A (1) for manufacturing a diffusion layer in which the fine pattern part (1a) is provided in the entire area other than the rough pattern part (1b). (3) etching the resist film (3) under the etching conditions for forming the fine resist film (3a), and a rough pattern portion (2) having the same shape as the rough pattern portion (1b).
b) and a resist film formed on the surface of the semiconductor substrate (4)
Fine resist film (3a) formed by etching (3)
Using the mask B (2) for manufacturing the diffusion layer provided with the shielding pattern portion (2a) having a shape corresponding to the area
(3) is exposed to light and the rough resist film (3
The resist film (3) depending on the etching conditions for forming b)
A method of manufacturing a semiconductor device, comprising:
JP815692A 1992-01-21 1992-01-21 Manufacture of semiconductor device Withdrawn JPH05198497A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP815692A JPH05198497A (en) 1992-01-21 1992-01-21 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP815692A JPH05198497A (en) 1992-01-21 1992-01-21 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH05198497A true JPH05198497A (en) 1993-08-06

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Family Applications (1)

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JP815692A Withdrawn JPH05198497A (en) 1992-01-21 1992-01-21 Manufacture of semiconductor device

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Country Link
JP (1) JPH05198497A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997046914A1 (en) * 1996-06-05 1997-12-11 Hitachi, Ltd. Method of manufacturing semiconductor integrated circuit device, photomask, and methods of manufacturing photomask
EP0999472A2 (en) * 1998-10-29 2000-05-10 Mitsubishi Denki Kabushiki Kaisha Method and apparatus for dry-etching half-tone phase-shift films, half-tone phase-shift photomasks and method for the preparation thereof, and semiconductor circuits and method for the fabrication thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997046914A1 (en) * 1996-06-05 1997-12-11 Hitachi, Ltd. Method of manufacturing semiconductor integrated circuit device, photomask, and methods of manufacturing photomask
EP0999472A2 (en) * 1998-10-29 2000-05-10 Mitsubishi Denki Kabushiki Kaisha Method and apparatus for dry-etching half-tone phase-shift films, half-tone phase-shift photomasks and method for the preparation thereof, and semiconductor circuits and method for the fabrication thereof
EP0999472A3 (en) * 1998-10-29 2001-01-31 Mitsubishi Denki Kabushiki Kaisha Method and apparatus for dry-etching half-tone phase-shift films, half-tone phase-shift photomasks and method for the preparation thereof, and semiconductor circuits and method for the fabrication thereof

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