JPH05197528A - Linking method and loading method for computer program - Google Patents

Abstract

PURPOSE:To provide a linker loader which generate logical addresses for processes so that a logical cache is used without partiality. CONSTITUTION:A random number generation part 13 generates a value by using a method for obtaining a different value as much as possible for each load module of each process. An offset address calculation part 14 applies a simple mathematical function to this value to determines an offset address for arranging the program. The linker 15 links an object program so that load modules are arranged according to the address and the generated load modules are stored in a storage part 16. When the loader 18 loads the modules onto a main storage 19, the addresses where the load modules in a logical address space are different, process by process, and decentralized uniformly on the cache, which is uniformly used, so that the hit rate of the cache is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a program linking method and a program loading method in a computer adopting a logical cache method.

[0002]

2. Description of the Related Art In a cache memory system of a computer which adopts a virtual address system, a cache memory 62 is arranged between a CPU 61 and a memory management unit 63 (hereinafter referred to as MMU) and a cache entry is accessed by a logical address. There are two types: a logical cache method (see FIG. 6) that performs the cache entry, and a physical cache method that arranges a cache memory between the MMU and the main memory and accesses the cache entry by the physical address that is the result of conversion by the MMU.

The logical cache method is an MMU at the time of access.
It has the advantage of shorter access time compared to the physical cache method because it does not require the processing of. However, in many processes, the frequently used parts of logical addresses match, and cache entries that are rarely used are On the other hand, there is a drawback that the cache cannot be effectively used because an entry is frequently rewritten every time the process is switched. This problem is particularly noticeable when performing multiprocessing in a system in which the cache memory capacity is larger than the program capacity of one process.

[0004]

As described above, in a computer which employs a logical cache and does not invalidate the entire cache each time a process is switched, a cache entry may cause a portion to be used frequently and a portion to be rarely used. Appears. Frequently used parts are used well by any process, and rarely used parts are hard to be used by many processes as well. Since it is frequently rewritten each time it is switched, there is a problem that valid data does not remain in the cache for a long time.

Such a problem is caused by the fact that frequently used cache entries match in all processes, which means that all processes use almost the same part of the logical address. By doing.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a linking method and a loading method capable of distributing the areas of the logical address space used by each process in order to solve the above-mentioned problems of the logical cache. ..

[0007]

The first invention of the present invention is as follows:
A plurality of processes each have a logical address space, and a load module to be read is stored in advance in a computer in which each process executes a load module read in this logical address space by controlling a common cache memory. A method of linking a computer program for linking a plurality of programs to generate a different value for each load module corresponding to each process, and using the generated value in the logical address space. An area in which a load module is arranged is determined, and the load module is generated by linking the program so as to be arranged in the determined area.

According to a second aspect of the present invention, a plurality of processes each have a logical address space, and each process executes a load module read in this logical address space by controlling a common cache memory. A method of loading a computer program for loading a load module into main memory in a computer, capable of determining the area on the main memory occupied by this load module when reading the load module stored in auxiliary memory into main memory When a load module is created by linking a program in the format and the load module is read into the main memory, a different value is generated for each load module corresponding to each process, and the generated value is generated. To determine the area where the load module is placed in the logical address space And it is characterized in that reading the load module in the area of the main memory corresponding to the determined area.

[0009]

According to the present invention, a value is derived using a method in which each program returns a different value as much as possible, and this value is appropriately converted when determining the area where the program is arranged in the logical address space. By generating the logical address at the beginning of each area of the program and creating the load module so that each area of the program starts from the logical address thus generated, the addresses of the logical address space accessed by each program are distributed. Was
The cache will be used evenly. As shown in FIG. 7, in the conventional case where no arrangement is made for the area where the program is arranged, the cache 71 has portions 72 and 73 that are used intensively and a portion 74 that is not used at all. According to the present invention, as shown in FIG. 3, when the differences 36 and 37 are provided at the start positions of the respective regions of the logical address space 38 of the first process and the address space 39 of the second process, the cache 31 is stored. The portion 32 that is used intensively is reduced, the portion that is not used at all is eliminated, and the entire cache is used almost uniformly.

[0010]

【Example】

Embodiment 1 FIG. 1 is a block diagram showing a system configuration for performing a link method according to Embodiment 1 of the present invention, and FIG. 2 is a diagram conceptually showing this.

The random number generator 13 includes a load module 16
Object programs 110 to 11 that should constitute 0
A value obtained by adding the size of 2 (the number of bytes) (these are detected by the detection unit 12) is set as a random number, and the random number is passed to the program placement area determination unit (offset address calculation unit) 14. The object program is stored in the storage unit 11. In the program allocation area determination unit (offset address calculation unit) 14, for the given random number x, offset address A (21) = a ₁ x% c offset address B (22) = a ₂ x% c (M% N represents obtaining a remainder when a is divided by M by N) a _1, a _2: by applying the expression constants, offset a, B is calculated, the value in the program coupling portion (linker) 15 hand over. In the program combining unit (linker) 15, this offset A (2
The object programs 110 to 112 are combined so that the text area 23 and the data area 24 of the load module are arranged from the position 1) and the stack area 25 is arranged from the position of the offset B (22), and the load module is stored. It is stored in the section 16. The stored load module is read into the main memory 19 by the normal loader 18 as shown by 38 in FIG.

According to this embodiment, the positions of the text, data, and stack area in the virtual address space can be changed for each program, so that the virtual address used in the entire process in the system is changed. The positions of are distributed, and the entire logical cache is used evenly.

In this embodiment, since the arrangement positions of the areas of a plurality of processes executing the same program are the same, it is possible to deal with the case of improving the fault tolerance by the process duplication. The random number generated by the random number generation unit 13 is not limited to the above example and may be different for each load module. Therefore, the current time (information that does not depend on the object program) or the load module is used as the random number. It is possible to use the process ID of the process to be generated or the total sum of object files.

Further, the calculation method in the offset address calculation unit 14 is not limited to the above formula, and any random number conversion may be performed as long as it is within the range of the capacity of the cache memory. You may make it generate | occur | produce so that a random number may be in this range from the beginning. Second Embodiment: FIG. 4 is a block diagram showing a system configuration for carrying out a loading method according to a second embodiment of the present invention, and FIG. 5 is a diagram conceptually showing this.

In the program coupling unit (linker) 42, the object programs 410 to 4 stored in the storage unit 41.
12 is linked to a relocatable format to create a load module 56, which is stored in the storage unit 43. At the time when the loader 47 loads this load module onto the memory 48, the random number generation unit 45 generates the current time detected by the current time detection unit 490 as a random number, and the placement area determination unit (offset address calculation unit) 46. Pass this value. The placement area determination unit (offset address calculation unit) 46, for the given random number x, offset address A (51) = a ₁ x% c offset address B (52) = a ₂ x% c (% is the previous Operator for obtaining the remainder when the number of is divided by the subsequent number) a ₁ , a ₂ : constant c: cache size, offset addresses A and B are calculated, and this value is used as placement area information as loader 47 Pass to. The loader 47 stores the text area 53 and the data area 54 of the load module from the position of the offset A (51) and the stack area 55 from the position of the offset B (52) in the memory 4.
8 is arranged as shown by 38 in FIG.

In this embodiment, the virtual address space is arranged differently each time the same program is executed. Therefore, even when a plurality of processes execute the same program at the same time, the addresses of the virtual spaces accessed by the respective processes are the same. It will be distributed and the logical cache will be used evenly. As the random number generated by the random number generation unit 45, the process ID of the process generated by the process ID generation unit 49 may be used instead of the current time.

Third Embodiment: Arrangement area determining section 46 of the second embodiment.
At, the OS checks which portion of the cache is not currently being accessed and determines the offset address to load the load module into the portion of the virtual address corresponding to the less used portion of the cache. In the present embodiment, the random number generator 45 is unnecessary, and the cache can be reliably and effectively used without accidental reliance.

[0018]

According to the present invention, since the areas of the logical address space used by the processes in the system can be dispersed, the logical cache can be used on average without waste, and the cache entry The number of times of rewriting is reduced, and the average speed of memory access is improved.

[Brief description of drawings]

FIG. 1 is a diagram showing a system configuration for performing a link method according to a first embodiment of the present invention.

FIG. 2 is a diagram conceptually showing a link method according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a usage state of a logical address space and a cache according to the present invention.

FIG. 4 is a diagram showing a system configuration for performing a loading method according to a second embodiment of the present invention.

FIG. 5 is a diagram conceptually showing a loading method according to a second embodiment of the present invention.

FIG. 6 is a diagram showing the configuration of a conventional logical cache type computer.

FIG. 7 is a diagram showing a usage state of a logical address space and a cache according to a conventional method.

[Explanation of symbols]

11, 41, 68 ... Object program storage unit 16, 43, 69 ... Load module storage unit 17, 44, 67 ... Storage unit 13, 45 ... Random number generation unit 14, 46 ... Program placement position determination unit (offset address calculation unit) 15, 42 ... Program combining unit (linker) 110, 111, 112, 410, 411, 412 ... Object program 18, 47, 65 ... Loader 19, 48, 64 ... Main memory 12 ... Program size detecting unit 49 ... Process ID generation unit 490 ... Current time detection unit 21, 36, 51 ... Start address of text area 22, 37, 52 ... Start position of stack area 23, 53 ... Text area 24, 54 ... Data area 25, 55 ... Stack area 38 , 39 ... Virtual address space 31, 62, 71 ... Logical cache 32, 72, 73 ... Part used intensively 74 ... Unused part 56 ... Relocatable load module 160 ... Load module 61 ... CPU 63 ... MMU

Claims (2)

[Claims] 1. A computer in which a plurality of processes each have a logical address space, and each process executes a load module read in this logical address space by controlling a common cache memory,
A method of linking a computer program for generating a load module to be read by linking a plurality of prestored programs, wherein a different value is appropriately generated for each load module corresponding to each process, and the generated value Is used to determine the area in which the load module is arranged in the logical address space, and the program is linked so as to be arranged in the determined area to generate the load module. Method. 2. A computer in which a plurality of processes each have a logical address space, and each process executes a load module read into the logical address space by controlling a common cache memory,
A method of loading a computer program for loading a load module into main memory, wherein the program occupies an area in main memory occupied by this load module when loading the load module stored in auxiliary memory into main memory. Link module to generate a load module, and when the load module is read into the main memory, an appropriately different value is generated for each load module corresponding to each process, and the generated value is used. A method for loading a computer program, comprising: determining an area in which a load module is arranged in the logical address space, and loading the load module into an area on a main memory corresponding to the determined area.