JPH05191158A - Amplifier - Google Patents

Abstract

PURPOSE:To perform amplification in a wide band by using a feedback resistance as the load in the output stage of an amplifier to form a feedback amplifier circuit. CONSTITUTION:An FET Q13 is an n-channel CMOS field effect transistor and has the gate connected to an input terminal TIN and has the source connected to a line of an earth potential VSS. The drain is connected to an output terminal through an amplifier 1 including a load R2. At this time, the feedback amplifier circuit is formed with the load R2 in the output stage of the amplifier 1 as the feedback resistance to reduce the impedance of the load by the gain of the feedback amplifier circuit. Since the cut-off frequency of the amplifier is inversely proportional to the impedance of the load, the impedance of the load is reduced to extend the cut-off frequency, and consequently, the band of the amplifier is extended.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION This invention relates to amplifiers, and more particularly to C
The present invention relates to an amplifier formed by using a MOS process.

As a main amplifier used for signal reproduction of high speed data transmission, a band of about a bit rate is required.

On the other hand, the CMOS process can be used for an amplifier or the like because a circuit can be formed at a low cost, but the amplifier formed by the CMOS process has a cutoff frequency determined by parasitic capacitance or the like, and thus is used as a wide band amplifier. It is difficult to use.

Therefore, in order to inexpensively construct a main amplifier used for signal reproduction of high speed data transmission, it is required to widen the band of the amplifier using the CMOS process.

[0005]

2. Description of the Related Art FIG. 6 shows a circuit configuration of an example of a conventional amplifier.

In the figure, Q ₁ is a CMOS type field effect transistor (FET), which causes a signal current corresponding to the input signal voltage input to the gate to flow to the drain. The drain is connected to the power supply voltage V _DD via the load resistor R1.

The load resistor R1 converts the current flowing in the drain into a voltage and outputs it from the output terminal T _OUT .

Such a cutoff frequency f of the amplifier
c is fc = (1 / (2π
It was decided by CsR1)).

FIG. 7 shows a circuit diagram of an example of a wide band differential amplifier circuit using a conventional CMOS process.

CMOS type FETs Q ₂ and Q ₃ are input FETs
The input signal voltage is input to the gate at.

The sources of the FETs Q ₂ and Q ₃ are connected to the constant voltage source V _DD via the constant current supply FET Q ₄ .

The drain of the input FET Q ₂ is a constant current FE
The connection point between TQ ₅ and Q ₆ and the drain of the input FET Q ₃ are connected to the connection point between the constant current FETs Q ₇ and Q ₈ .

The FETs Q ₉ and Q ₁₀ and the FETs Q ₁₁ and Q ₁₂ each constitute a current mirror circuit and try to flow a current according to an input signal.

The connection point between the drain of the FET Q _{12 and} the drain of the FET Q ₇ serves as the output.

The amplifier having the above structure is called a folded cascode type operational amplifier, and is used as a wide band amplifier using a CMOS process.

FIG. 8 is a frequency characteristic diagram of the folded cascode type operational amplifier.

Since this amplifier is intended to be used with feedback, it is attenuated at 6 dB / oct from the primary pole where the flat gain begins to fall to the secondary pole, and 2
The next pole is designed to stay below OdB.

[0018]

However, the conventional CM
In the wide band amplifier using the OS process, the secondary pole is determined by the FETs Q _{5 to} Q ₈ , which is the current CMOS.
In the process, it is difficult to raise the frequency above 200 MHz, and even if the gain is reduced to about 40 dB,
The primary pole is determined by fc = (1 / (2πR _L C _L )) depending on the load impedance R _L of the output stage and the load capacitance C _L, so there is a problem that it can be increased to only a few MHz. It was

The present invention has been made in view of the above points, and an object of the present invention is to provide an amplifier capable of amplifying in a wide band.

[0020]

According to the present invention, there is provided an amplifier including a voltage-current conversion element for converting an input signal voltage into a current signal and a load for converting a current signal converted by the voltage-current conversion phase into a signal voltage. The circuit includes a feedback amplifier circuit having a feedback resistance corresponding to the load and outputting an output signal according to the input signal.

[0021]

By forming the feedback amplifier circuit using the load of the amplifier output stage as the feedback resistor, the impedance of the load can be reduced by the gain of the feedback amplifier circuit.

Since the cutoff frequency of the amplifier is inversely proportional to the impedance of the load, it is possible to extend the cutoff frequency by lowering the impedance of the load, thus increasing the bandwidth of the amplifier.

[0023]

1 is a circuit diagram of an embodiment of the present invention. same
Q in the figure₁₃Is an n-channel CM which is a voltage-current conversion element
1 shows an OS type field effect transistor (FET). FET
Q ₁₃Is the input terminal T_INConnected to, source is grounded
Potential V_SSConnected to the line.

The drain is connected to the output terminal T _OUT via the amplifier section 1.

FIG. 2 shows a circuit configuration diagram of the amplifier section. The amplifier unit 1 includes n-channel CMOS type field effect transistors (FET) Q ₁₄ and Q ₁₅ , P-channel CMOS type field effect transistor (FET) Q ₁₆ and a feedback resistor R as a load.
_{Consists of 2} .

The gate of FET Q ₁₄ serves as an input terminal, and F
Connected to the drain of ETQ ₁₃ . The source of the FET Q ₁₄ is connected to the ground potential V _SS , and the drain is connected to the drain of the P-channel CMOS type FET Q ₁₆ which constitutes a constant current source. Further, the source of the FET Q ₁₆ is connected to the power supply voltage V _DD , and a constant voltage V _B3 is applied to the gate.

Further, FETQ₁₄Drain and FETQ₁₆
The connection point with the drain of the output terminal T _OUTBecomes

The FET Q ₁₅ is connected between the output terminal T _OUT and the ground potential V _SS to protect the output. Further, the output terminal T _OUT and the gate of the FET Q ₁₄ are negatively fed back by the feedback resistor R ₂ .

The gain of the amplifier section 1 at this time is (-A), for example.

The input signal flowing into the input terminal T _IN is FE
The signal is converted into a signal current according to the input signal by TQ ₁₃ .
The signal current converted by the FET Q _{13 is} converted into a voltage by the resistor R ₂ which is the impedance (load) of the load and is output as an output signal from the output terminal T _OUT .

At this time, since the gain is set to −A times by the amplifier, the load impedance becomes (R ₂ / A), so that the cutoff frequency fc of the band determined by the load impedance and the parasitic amount is fc = A / (2πR ₂ Cs), and the cutoff frequency fc can be expanded A times.

FIG. 3 shows a circuit configuration diagram of a second embodiment of the present invention. In the figure, Q ₁₇ and Q ₁₈ are differential input FETs, the gates of which are connected to the input terminals T _IN1 and T _IN2, and input signal voltages are applied.

FET Q for differential input₁₇, Q₁₈The source of
It is connected to the current source 2. In addition, differential input FETQ₁₇，
Q₁₈Drain is output terminal via amplifiers 3 and 4
T_OUT1, T _OUT2Connected with.

The amplifier sections 3 and 4 have the same structure as that of FIG. 2, and are configured such that the amplifiers 3a and 4a having a gain of −A are fed back by resistors R ₃ and R ₄ .

As a result, the resistance R serving as a load resistance₃, R
_FourImpedance is R₃/ A, R _Four/ A.

Therefore, as for the frequency characteristic, the cutoff frequency becomes A times, and the band is several 10M as shown in FIG.
It can be extended to the flat band of Hz.

FIG. 5 shows a circuit configuration diagram of the third embodiment of the present invention. In the figure, Q ₁₉ and Q ₂₀ indicate FETs for differential input.

The sources of FETs Q _19, Q ₂₀ is connected to the constant current source 5, a gate connected to the input terminal T _IN1, T _IN2, the signal current corresponding to the input signal voltage from the input terminal T _IN1, T _IN2 Supplied to the drain.

The drains of the FETs Q ₁₉ and Q ₂₀ are connected to the cascode-connected FETs Q _{21 to} Q _24.
A current corresponding to the drain current of Q ₁₉ flows through the FETs Q ₂₁ and Q ₂₂ and is supplied to the amplifier section 6.

Further current corresponding to the drain current of FETs Q ₂₀ is supplied to the flow amplifier unit 7 to FETQ _23, Q _24.

The amplifier sections 6 and 7 are amplifiers 6a and 7 having a gain A.
It is composed of a and feedback resistors R ₅ and R ₆ which are load resistors.

In this embodiment, Q _{21 to} Q cascode-connected are used.
_The current is supplied to the amplifiers 6 and 7 according to the input signal voltage by ₂₄ .

Therefore, the gains of the amplifiers 6a and 7a are set to A
By setting the output impedance to R ₅ / A, R ₆
It can be / A.

As a result, the cutoff frequency can be increased by A times, and the band of the amplifier can be expanded.

[0045]

As described above, according to the present invention, since the load feedback of the output stage is used as the feedback section of the amplifier circuit, the impedance of the load of the output stage can be reduced by the gain of the feedback amplifier circuit. , The cutoff frequency inversely proportional to the impedance of the load can be increased, and therefore the band can be extended.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of a first embodiment of the present invention.

FIG. 2 is a circuit configuration diagram of a main part of the first embodiment of the present invention.

FIG. 3 is a circuit configuration diagram of a second embodiment of the present invention.

FIG. 4 is a frequency characteristic diagram of the second embodiment of the present invention.

FIG. 5 is a circuit diagram of a third embodiment of the present invention.

FIG. 6 is a circuit configuration diagram of an example of a conventional simple amplifier.

FIG. 7 is a circuit configuration diagram of an example of a conventional differential amplifier.

FIG. 8 is a frequency characteristic diagram of an example of a conventional differential amplifier.

[Explanation of symbols]

Q ₁₃ CMOS type FET R ₂ Load resistance 1 Amplifier section T _IN input terminal T _OUT output terminal

Claims (2)

[Claims] 1. A voltage for converting an input signal voltage into a current signal
-Current conversion element (Q ₁₃) And the voltage-current conversion element (Q
₁₃) Convert the current signal converted by
Load (R₂), The load (R₂) Has a feedback resistance equivalent to
Feedback amplifier circuit that outputs an output signal according to the signal (1)
An amplifier characterized by having. 2. Two for converting an input signal voltage into a current signal
Voltage-current conversion element (Q₁₇, Q₁₈; Q₁₉, Q₂₀) One
Two constant current sources (2, 5) are connected, and the constant current sources (2, 5) are connected.
5) The constant current is applied to the two voltages depending on the input signal voltage.
-Current conversion element (Q₁₇, Q₁₈; Q₁₉, Q₂₀) Distributed by
The distributed signal currents of the two systems to the two voltage-currents.
Conversion element (Q₁₇, Q₁₈; Q₁₉, Q₂₀) Provided for each
Load (R ₃, R_Four; R_Five, R₆) To a voltage,
Amplifier that outputs a differential output signal according to the input signal voltage
Where the load (R₃, R_Four; R_Five, R₆) Equivalent to
To output an output signal according to the input signal.
The return amplifier circuit (3, 4; 6, 7) is connected to the two voltage-electric circuits.
Flow conversion element (Q₁₇, Q₁₈; Q₁₉, Q₂₀) Output respectively
An amplifier characterized by the fact that it has been removed.