JPH05190471A - Treatment apparatus for forming film - Google Patents

Treatment apparatus for forming film

Info

Publication number
JPH05190471A
JPH05190471A JP2568692A JP2568692A JPH05190471A JP H05190471 A JPH05190471 A JP H05190471A JP 2568692 A JP2568692 A JP 2568692A JP 2568692 A JP2568692 A JP 2568692A JP H05190471 A JPH05190471 A JP H05190471A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
etching gas
guide plate
gas
gap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2568692A
Other languages
Japanese (ja)
Other versions
JP2990551B2 (en
Inventor
Tomihiro Yonenaga
富廣 米永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP4025686A priority Critical patent/JP2990551B2/en
Publication of JPH05190471A publication Critical patent/JPH05190471A/en
Application granted granted Critical
Publication of JP2990551B2 publication Critical patent/JP2990551B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To eliminate a source of occurrence of particles by preventing films from being formed on an undesired part of a treated substrate or removing the films. CONSTITUTION:A guide plate 30 for etching gas is fixed on the inner circumference of a ring support plate 32 having a sectional L shape. The guide plate 30 for etching gas extends along the outer circumference of a semiconductor wafer 12 and is not in contact with the semiconductor wafer 12, and a predetermined gap G between the guide plate 30 and the outer circumference of the semiconductor wafer 12 is formed. A gas pipe or a tube 34 for introducing an etching gas is piped in the lower part of a treating chamber 10 and a discharge vent 34a for the etching gas is located inside a shading plate 20. The etching gas out of the discharge vent 34a rises, and goes toward the outer circumference of the semiconductor wafer 12 along the rear of the semiconductor wafer 12. Then, the etching gas passes through the gap G while the gas is guided by the guide plate 30, and flows out of the surface side of the semiconductor wafer 12, and is fed to an exhaust vent 26.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体ウエハ等の被処
理基板に被膜を堆積させて成膜する装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for depositing a film on a substrate to be processed such as a semiconductor wafer to form a film.

【0002】[0002]

【従来の技術】成膜処理は、大別して、被処理基板を直
接酸化または窒化して該被処理基板の表面を酸化膜また
は窒化膜に変質させる処理と、外部から被処理基板上に
化学的または物理的に被膜を堆積させる処理とに分類さ
れる。CVD (Chemical VaporDoposition)やPVD (P
hysical Vapor Doposition)等の成膜技術は後者の処理
を行うためのものである。たとえば、CVD装置では、
適当なヒータによって被処理基板を加熱しながら所定の
反応ガスを供給し、そのガスの反応生成物または分解生
成物を半導体ウエハ上に堆積させる。また、PVD装置
として代表的なスパッタ装置では、相対向する一対の電
極間にプラズマを発生させ、陰極上に置いたターゲット
をプラズマ中のイオンではじき飛ばし、陽極上に置いた
被処理基板上に被膜を堆積させる。
2. Description of the Related Art A film forming process is roughly classified into a process of directly oxidizing or nitriding a substrate to be processed to change the surface of the substrate to an oxide film or a nitride film, and a process of externally chemically treating the substrate. Alternatively, it is classified as a process of physically depositing a film. CVD (Chemical Vapor Doposition) and PVD (P
The film forming technique such as hysical vapor deposition is for performing the latter process. For example, in a CVD system,
A predetermined reaction gas is supplied while heating the substrate to be processed by an appropriate heater, and a reaction product or a decomposition product of the gas is deposited on the semiconductor wafer. Further, in a typical sputtering apparatus as a PVD apparatus, plasma is generated between a pair of electrodes facing each other, a target placed on the cathode is repelled by ions in the plasma, and a film is formed on a substrate to be treated placed on the anode. Deposit.

【0003】[0003]

【発明が解決しようとする課題】ところで、歩留まり向
上の観点から、成膜は被処理基板の予め定められた部分
にだけ行われ、他の部分には行われないほうが望まし
い。たとえば、被処理基板が半導体ウエハの場合は、ウ
エハの表面(片面)だけが成膜され、ウエハの端側面や
裏面は成膜されないほうがよい。
From the viewpoint of improving the yield, it is desirable that the film formation is performed only on a predetermined portion of the substrate to be processed and not on other portions. For example, when the substrate to be processed is a semiconductor wafer, it is preferable that only the front surface (one surface) of the wafer is film-formed and not the end side surface or the back surface of the wafer.

【0004】しかしながら、上記のようなCVD装置、
PVD装置等の成膜処理装置では、ガス分子またはスパ
ッタされた原子はどうしても半導体ウエハの端側面や裏
面に入射または侵入するため、そこにも被膜が形成され
る。このように半導体ウエハの端側面や裏面に形成され
た被膜は、半導体ウエハのアンローディング時あるいは
搬送時に接触・衝撃等によって剥れ落ちることがあり、
剥がれ落ちた被膜片は大きなパーティクル源となって歩
留まりを低下させる。
However, the above CVD apparatus,
In a film forming apparatus such as a PVD apparatus, gas molecules or sputtered atoms inevitably enter or enter the end side surface or the back surface of a semiconductor wafer, so that a film is also formed there. The coating film thus formed on the end side surface and the back surface of the semiconductor wafer may come off due to contact, impact, etc. during unloading or transportation of the semiconductor wafer.
The peeled off film pieces become a large particle source and reduce the yield.

【0005】そこで、従来は、半導体ウエハの外周縁部
をリング状のカバーで押さえ付けることにより、ウエハ
の側面や裏面にガス分子等が侵入するのを防止して、そ
れらの部分に被膜が堆積しないようにしていた。しか
し、この方法は、強い押圧力で半導体ウエハをステージ
等に押し付ける手法であるために、その接触および擦れ
によってウエハ自体およびリングステージ表面が削れ
て、そこからパーティクルが発生するという不具合があ
り、根本的な解決法とはいえなかった。
Therefore, conventionally, by pressing the outer peripheral edge of the semiconductor wafer with a ring-shaped cover, gas molecules and the like are prevented from entering the side surface and the back surface of the wafer, and a film is deposited on those portions. I was trying not to. However, since this method is a method of pressing a semiconductor wafer against a stage or the like with a strong pressing force, there is a problem that the wafer itself and the ring stage surface are scraped due to the contact and rubbing, and particles are generated from there. It was not an effective solution.

【0006】本発明は、かかる問題点に鑑みてなされた
もので、非接触方式により被処理基板の不所望な部分へ
の成膜を防止または除去して、パーティクルを発生させ
ないようにした成膜処理装置を提供することを目的とす
る。
The present invention has been made in view of the above problems, and a non-contact method is used to prevent or remove film formation on an undesired portion of a substrate to be processed so that particles are not generated. An object is to provide a processing device.

【0007】[0007]

【課題を解決するための手段】上記の目的を達成するた
めに、本発明の成膜処理装置は、被処理基板上に化学的
または物理的な方法によって被膜を堆積せしめる成膜処
理装置において、前記被処理基板の所定の部分と間隙を
あけて対向するように配設されたエッチングガス案内手
段と、前記間隙にエッチングガスを流すエッチングガス
供給手段とを具備する構成とした。
In order to achieve the above object, the film forming apparatus of the present invention is a film forming apparatus for depositing a film on a substrate to be processed by a chemical or physical method. An etching gas guide means is disposed so as to face a predetermined portion of the substrate to be processed with a gap therebetween, and an etching gas supply means for causing an etching gas to flow through the gap.

【0008】[0008]

【作用】成膜中、前記間隙にエッチングガスが流れるこ
とによって、反応ガス等が前記間隙に侵入したり、ある
いは前記間隙を通ることができなくなり、間隙内の被処
理基板部分およびその先の被処理基板部分で被膜が堆積
しにくく、たとえ堆積してもエッチングガスによってす
ぐに除去され、被膜形成までには至らない。また成膜後
に、前記間隙にエッチングガスを流すことも可能であ
り、間隙付近に形成された不要な被膜はエッチングガス
によって除去される。このように、本発明では、リング
カバーのような被処理基板に直接接触する部材を使わず
に、不所望な部分への成膜を防止する。
When the etching gas flows into the gap during the film formation, the reaction gas or the like cannot enter the gap or cannot pass through the gap, so that the substrate portion to be processed in the gap and the portion beyond It is difficult for the coating film to be deposited on the treated substrate portion, and even if it is deposited, it is immediately removed by the etching gas and does not lead to the formation of the coating film. It is also possible to flow an etching gas into the gap after the film formation, and the unnecessary film formed near the gap is removed by the etching gas. As described above, in the present invention, film formation on an undesired portion is prevented without using a member such as a ring cover that directly contacts the substrate to be processed.

【0009】[0009]

【実施例】以下、添付図を参照して本発明の実施例を説
明する。図1は一実施例による枚葉式CVD装置の全体
構成を示す断面図、図2はウエハ支持部の構成を示す平
面図、および図3〜図6はエッチング案内部の種々の構
成例を示す断面図である。
Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing the overall structure of a single-wafer CVD apparatus according to an embodiment, FIG. 2 is a plan view showing the structure of a wafer supporting section, and FIGS. 3 to 6 show various structural examples of an etching guide section. FIG.

【0010】図1において、この実施例のCVD装置の
処理室10はたとえばAl(アルミニウム)からなる円
筒状のチャンバで、処理室10の中央部に被処理体であ
る半導体ウエハ12が配置される。このCVD装置で
は、サセプタ(基板設置台)を使用せず、後述するよう
に、120゜間隔で配設した3本のピンで半導体ウエハ
12を平行に三点支持するようにしている。
In FIG. 1, the processing chamber 10 of the CVD apparatus according to this embodiment is a cylindrical chamber made of, for example, Al (aluminum), and a semiconductor wafer 12 as an object to be processed is arranged at the center of the processing chamber 10. .. This CVD apparatus does not use a susceptor (substrate installation table) but supports the semiconductor wafer 12 at three points in parallel with three pins arranged at 120 ° intervals, as will be described later.

【0011】処理室10の底面中央部には石英板14が
取り付つけられ、この石英板14の下に加熱用のハロゲ
ンランプ16が配設されている。成膜時には、ハロゲン
ランプ16からの光が石英板14を介して半導体ウエハ
12の裏面に照射することにより、半導体ウエハ12が
加熱される。石英板14の周縁部に隣接してリング状の
支持部材18が処理室10に固着され、この支持部材1
8の内周縁上に筒状の遮光板20が立設されている。ま
た、処理室10の底面にはハロゲンランプ16を囲むよ
うに有底筒状の遮光板22が取付されている。これらの
遮光板20,22により、ハロゲンランプ16の光は半
導体ウエハ12に効率的に供給されると同時に、温度測
定装置等の周囲の装置から隔離されている。
A quartz plate 14 is attached to the center of the bottom surface of the processing chamber 10, and a halogen lamp 16 for heating is arranged below the quartz plate 14. During film formation, the semiconductor wafer 12 is heated by irradiating the back surface of the semiconductor wafer 12 with light from the halogen lamp 16 through the quartz plate 14. A ring-shaped support member 18 is fixed to the processing chamber 10 adjacent to the peripheral edge of the quartz plate 14.
A light-shielding plate 20 having a cylindrical shape is erected on the inner peripheral edge of 8. Further, a bottomed cylindrical light shielding plate 22 is attached to the bottom surface of the processing chamber 10 so as to surround the halogen lamp 16. The light of the halogen lamp 16 is efficiently supplied to the semiconductor wafer 12 by these light shielding plates 20 and 22, and at the same time, it is isolated from surrounding devices such as a temperature measuring device.

【0012】処理室10の上面中央部にはガス導入口2
4が設けられ、このガス導入口24から反応ガスが導入
され、導入された反応ガスは真下の半導体ウエハ12の
表面に供給される。そして、成膜のプロセスで発生した
ガスや余った反応ガス等は処理室側壁に設けられた排気
口26より外部へ排出される。
A gas inlet 2 is provided at the center of the upper surface of the processing chamber 10.
4 is provided, a reaction gas is introduced from the gas introduction port 24, and the introduced reaction gas is supplied to the surface of the semiconductor wafer 12 immediately below. Then, the gas generated in the film forming process, the remaining reaction gas, and the like are exhausted to the outside through the exhaust port 26 provided on the side wall of the processing chamber.

【0013】排気口26と対向する処理室10の側壁に
はゲートバルブ28が設けられ、このゲートバルブ28
を介してロボットアーム等のウエハ搬送機構が半導体ウ
エハ12をローディングまたはアンローディングするよ
うになっている。
A gate valve 28 is provided on the side wall of the processing chamber 10 facing the exhaust port 26.
A wafer transfer mechanism such as a robot arm loads or unloads the semiconductor wafer 12 via the.

【0014】半導体ウエハ12の外周側には、たとえば
石英からなるリング状のエッチングガス案内板30が断
面L形の環状支持板32の内周縁部に取付固定されてい
る。このエッチングガス案内板30は、半導体ウエハ1
2の外周に沿って延び、半導体ウエハ12とは接触せ
ず、半導体ウエハ12の外周縁部との間に所定の間隙G
を形成している。また、エッチングガスを導入するため
のガス管またはチューブ34が処理室10の下部に引か
れ、そのガス吐出口34aが遮光板20の内側に位置し
ている。
On the outer peripheral side of the semiconductor wafer 12, a ring-shaped etching gas guide plate 30 made of, for example, quartz is attached and fixed to the inner peripheral edge of an annular support plate 32 having an L-shaped cross section. This etching gas guide plate 30 is used for the semiconductor wafer 1
2 extends along the outer periphery of the semiconductor wafer 12, does not contact the semiconductor wafer 12, and has a predetermined gap G between the outer peripheral edge of the semiconductor wafer 12 and the semiconductor wafer 12.
Is formed. Further, a gas pipe or tube 34 for introducing the etching gas is drawn to the lower part of the processing chamber 10, and the gas discharge port 34 a is located inside the light shielding plate 20.

【0015】ガス管34はエッチングガス供給部(図示
せず)に接続されており、成膜中または成膜後に該エッ
チングガス供給部よりエッチングガスが所定の流量で供
給される。このエッチングガスは、半導体ウエハ12上
に形成される被膜をエッチングできるようなものであ
る。たとえば、被膜がタングステン系の場合、ClF3
ガスがそのままエッチングガスとして、あるいはClF
3 ガスをN2 ガスもしくはArガス等で所定の濃度に希
釈したものがエッチングガスとして供給される。
The gas pipe 34 is connected to an etching gas supply unit (not shown), and the etching gas is supplied at a predetermined flow rate from the etching gas supply unit during or after film formation. This etching gas is such as to be able to etch the film formed on the semiconductor wafer 12. For example, if the coating is tungsten based, ClF3
Gas is used as etching gas or ClF
3 gas diluted with N2 gas or Ar gas to a predetermined concentration is supplied as an etching gas.

【0016】ガス吐出口34aより出たエッチングガス
は上昇して、半導体ウエハ12の裏面に沿って半導体ウ
エハ12の外周端側へ周り、エッチングガス案内板30
で案内されながら上記間隙Gを通って半導体ウエハ12
の表面側へ出て、排気口26へ送られる。その際、間隙
Gにおいて、エッチングガスは逆方向からくる反応ガス
の侵入を妨げ、半導体ウエハ12の表面部分に被膜が堆
積しているときは、その被膜をエッチングして除去す
る。
The etching gas discharged from the gas discharge port 34a rises and travels along the back surface of the semiconductor wafer 12 toward the outer peripheral edge side of the semiconductor wafer 12 and the etching gas guide plate 30.
Through the gap G while being guided by the semiconductor wafer 12
To the exhaust port 26. At that time, in the gap G, the etching gas prevents the reaction gas coming from the opposite direction from entering, and when the film is deposited on the surface portion of the semiconductor wafer 12, the film is etched and removed.

【0017】なお、図1では、半導体ウエハ12に向け
て1つのガス吐出口34aからエッチングガスを供給す
るように示しているが、半導体ウエハ12の円周方向で
エッチングガスの供給を均一化するように、たとえば1
20゜間隔で3つのガス吐出口を設けてもよい。
Although FIG. 1 shows that the etching gas is supplied to the semiconductor wafer 12 from one gas discharge port 34a, the supply of the etching gas is made uniform in the circumferential direction of the semiconductor wafer 12. Like, for example, 1
You may provide three gas discharge ports at intervals of 20 degrees.

【0018】筒状遮光板20の外側には環状の支持板3
6が配設され、この支持板36に、図2に示すように9
0゜間隔で配設された4本のプッシャピン38の基端部
が固着されている。半導体ウエハ12をローディングま
たはアンローディングする時は、図示しない昇降機構に
よって支持板36が点線36’の位置まで上昇すること
により、各プッシャピン38が点線位置38’まで上昇
し、ウエハ搬送機構との間で半導体ウエハ12の受け渡
しを行うようになっている。
An annular support plate 3 is provided outside the cylindrical light shield plate 20.
6 is provided, and as shown in FIG.
The base end portions of four pusher pins 38 arranged at 0 ° intervals are fixed. When loading or unloading the semiconductor wafer 12, the supporting plate 36 is moved up to the position indicated by the dotted line 36 'by an elevating mechanism (not shown), so that each pusher pin 38 is moved up to the position indicated by the dotted line 38', and the pusher pins 38 are moved to and from the wafer transfer mechanism. The semiconductor wafer 12 is handed over.

【0019】また、底部の環状支持部材18の上面に
は、図2に示すように120゜間隔で3本の支持ピン4
0が垂直に立設されており、半導体ウエハ12はこれら
3本の支持ピン40によって水平に支持される。これら
3本の支持ピン40の中の少なくとも1本を熱電対のプ
ローブピンで構成してよく、そうすることによって半導
体ウエハ12の温度測定を行うことができる。なお、図
2において、円筒状の遮光板20は、各プッシャピン3
8および各支持ピン40が位置するところで局所的に内
側に凹んでいる。
Further, on the upper surface of the annular support member 18 at the bottom, as shown in FIG. 2, three support pins 4 are arranged at 120 ° intervals.
0 is erected vertically, and the semiconductor wafer 12 is horizontally supported by these three support pins 40. At least one of these three support pins 40 may be constituted by a thermocouple probe pin, and by doing so, the temperature of the semiconductor wafer 12 can be measured. It should be noted that in FIG. 2, the cylindrical light-shielding plate 20 corresponds to each pusher pin 3
8 and each support pin 40 are locally recessed inward.

【0020】次に、図3〜図6につきエッチングガス案
内板30のいくつかの構成例を説明する。図中、図解を
容易にするため、遮光板20、プッシャピン38、支持
ピン40等を省略している。
Next, some structural examples of the etching gas guide plate 30 will be described with reference to FIGS. In the figure, the light shielding plate 20, the pusher pin 38, the support pin 40, and the like are omitted for ease of illustration.

【0021】まず、図3の例は、半導体ウエハ12の端
側面12aに間隙Gをあけて対向するようにエッチング
ガス案内板30の内径をウエハ12の外径よりもわずか
に大きくしたものである。この構成によれば、下方から
送られてきたエッチングガスは、エッチングガス案内板
30の内側面30aに案内されながら狭い間隙Gを高い
圧力で通って、半導体ウエハ12の表面側に抜け出る。
これにより、反応ガスは半導体ウエハ12の端側面12
aないし裏面側には回れ込めなくなり、それらの部分に
堆積しにくくなる。また、たとえ堆積してもエッチング
ガスによってすぐに除去される。この構成例は、半導体
ウエハ12の端側面12aへの成膜を防止するのに特に
効果的である。
First, in the example of FIG. 3, the inner diameter of the etching gas guide plate 30 is slightly larger than the outer diameter of the wafer 12 so as to face the end side surface 12a of the semiconductor wafer 12 with a gap G therebetween. .. According to this configuration, the etching gas sent from below passes through the narrow gap G with high pressure while being guided by the inner side surface 30a of the etching gas guide plate 30, and escapes to the front surface side of the semiconductor wafer 12.
As a result, the reaction gas is transferred to the end side surface 12 of the semiconductor wafer 12.
It cannot be turned to a or the back surface side, and it becomes difficult to deposit on those portions. Further, even if it is deposited, it is immediately removed by the etching gas. This configuration example is particularly effective in preventing film formation on the end side surface 12a of the semiconductor wafer 12.

【0022】図4の例は、半導体ウエハ12の裏面の周
縁部12bに間隙Gをあけて対向するようにエッチング
ガス案内板30をウエハ12の下側に配設したものであ
る。この構成例によれば、エッチングガスは、エッチン
グガス案内板30の上面の内周縁部30bに案内されな
がら狭い間隙Gを高い圧力で通って、半導体ウエハ12
の表面側に抜け出る。これにより、反応ガスは半導体ウ
エハ12の裏面側には回れ込めなくなり、裏面側に被膜
が堆積しにくくなる。また、たとえ堆積してもエッチン
グガスにすぐに除去される。この構成例は、半導体ウエ
ハ12の裏面への成膜を防止するのに好適である。
In the example of FIG. 4, the etching gas guide plate 30 is arranged below the wafer 12 so as to face the peripheral edge portion 12b of the back surface of the semiconductor wafer 12 with a gap G therebetween. According to this configuration example, the etching gas passes through the narrow gap G with high pressure while being guided by the inner peripheral edge portion 30b of the upper surface of the etching gas guide plate 30, and the semiconductor wafer 12
Escape to the surface side of. As a result, the reaction gas cannot flow to the back surface side of the semiconductor wafer 12, and the film is less likely to be deposited on the back surface side. Even if it is deposited, it is immediately removed by the etching gas. This configuration example is suitable for preventing film formation on the back surface of the semiconductor wafer 12.

【0023】図5の例は、半導体ウエハ12の端側面1
2aおよび裏面の周縁部12bにそれぞれ間隙G1,G2
をあけて対向するようにエッチング案内板30の内側面
を段状に構成したものである。この構成例によれば、エ
ッチングガスは、エッチングガス案内板30の段部30
cに案内されながら間隙Gを通って、半導体ウエハ12
の表面側に抜け出る。これによって、反応ガスは半導体
ウエハ12の端側面への侵入および裏面側への回れ込み
を妨げられる。また、たとえそこに堆積してもエッチン
グガスによってすぐに除去される。この構成例は、半導
体ウエハ12の端側面12aおよび裏面への成膜を同時
に防止するのに効果的である。
In the example of FIG. 5, the end side surface 1 of the semiconductor wafer 12 is shown.
2a and the back surface peripheral portion 12b have gaps G1 and G2, respectively.
The inner surface of the etching guide plate 30 is formed in a step shape so as to face each other. According to this configuration example, the etching gas is the step portion 30 of the etching gas guide plate 30.
The semiconductor wafer 12 passes through the gap G while being guided by c.
Escape to the surface side of. As a result, the reaction gas is prevented from entering the end side surface of the semiconductor wafer 12 and flowing into the back surface side. Even if it is deposited there, it is immediately removed by the etching gas. This configuration example is effective in simultaneously preventing film formation on the end side surface 12a and the back surface of the semiconductor wafer 12.

【0024】図6の例は、半導体ウエハ12の端側面1
2aおよび表面の周縁部12cにそれぞれ間隙G1,G3
をあけて対向するようにエッチング案内板30の内側面
を段状に構成したものである。この構成例によれば、エ
ッチングガスはエッチングガス案内板30の段部30d
に案内されながら間隙Gを通って半導体ウエハ12の表
面側に抜け出るので、反応ガスは半導体ウエハ12の表
面の周縁部12cへの侵入も妨げられ、たとえそこに堆
積してもエッチングガスによってすぐに除去される。こ
の構成例は、半導体ウエハ12の表面の周縁部12cお
よび端側面12aへの成膜を同時に防止するのに効果的
である。
In the example of FIG. 6, the end side surface 1 of the semiconductor wafer 12 is shown.
2a and the peripheral portion 12c of the surface have gaps G1 and G3, respectively.
The inner surface of the etching guide plate 30 is formed in a stepped shape so as to face each other with a gap. According to this configuration example, the etching gas is the step portion 30d of the etching gas guide plate 30.
Since the reaction gas escapes to the surface side of the semiconductor wafer 12 through the gap G while being guided to, the reaction gas is prevented from entering the peripheral portion 12c of the surface of the semiconductor wafer 12, and even if the reaction gas is deposited there, it is immediately removed by the etching gas. To be removed. This configuration example is effective in simultaneously preventing film formation on the peripheral edge portion 12c and the end side surface 12a of the surface of the semiconductor wafer 12.

【0025】このように、本実施例のCVD装置におい
ては、成膜中または成膜後に半導体ウエハ12の外周縁
部とエッチングガス案内板30との間隙Gにエッチング
ガスを流すようにしたので、半導体ウエハ12の外周縁
部ないし裏面への成膜を効果的に除去することができ
る。そして、従来のリングカバーのように半導体ウエハ
12に直接接触する成膜防止部材を使用しないので、接
触に起因するパーティクルはいっさい発生しない。
As described above, in the CVD apparatus of this embodiment, the etching gas is caused to flow in the gap G between the outer peripheral edge of the semiconductor wafer 12 and the etching gas guide plate 30 during or after the film formation. The film formation on the outer peripheral edge portion or the back surface of the semiconductor wafer 12 can be effectively removed. Since no film formation preventing member that directly contacts the semiconductor wafer 12 unlike the conventional ring cover is used, no particles caused by the contact are generated.

【0026】上記した図3〜図6の構成例の外にも種々
の変形が可能である。たとえば、上記した実施例では、
エッチングガス案内板を半導体ウエハ12の外周縁部に
対して間隙をあけて対向するように構成したが、それに
限定されるものではなく、被処理基板の任意の部分に対
して間隙をあけて対向するように構成することも可能で
ある。
Various modifications can be made in addition to the above-mentioned configuration examples shown in FIGS. For example, in the above embodiment,
Although the etching gas guide plate is configured to face the outer peripheral edge portion of the semiconductor wafer 12 with a gap, the present invention is not limited to this, and faces the arbitrary portion of the substrate to be processed with a gap. It can also be configured to do so.

【0027】また、上記実施例では、半導体ウエハ12
を3本の支持ピン40によって三点支持し、ハロゲンラ
ンプ16からの光を石英板14を介して半導体ウエハ1
2に照射して加熱したが、サセプタを使用することも可
能である。その場合、半導体ウエハをサセプタに直接載
置するよりもリングまたはピン等を介して離間させて支
持し、サセプタからの熱を輻射によって半導体ウエハに
伝えるように構成したほうが、エッチングガス案内板の
配置構成を簡単にすることができる。
Further, in the above embodiment, the semiconductor wafer 12
Is supported at three points by three support pins 40, and light from the halogen lamp 16 is transmitted through the quartz plate 14 to the semiconductor wafer 1.
2 was irradiated and heated, but it is also possible to use a susceptor. In that case, rather than placing the semiconductor wafer directly on the susceptor, it is better to support the semiconductor wafer by separating it via a ring or a pin and to transfer the heat from the susceptor to the semiconductor wafer by radiating the etching gas guide plate. The configuration can be simplified.

【0028】また、上記実施例はCVD装置に係るもの
であったが、スパッタ装置等の他の成膜処理装置にも本
発明は適用可能である。
Although the above embodiment relates to the CVD apparatus, the present invention can be applied to other film forming processing apparatuses such as a sputtering apparatus.

【0029】[0029]

【発明の効果】以上説明したように、本発明の成膜処理
装置によれば、被処理基板の所定の部分と間隙をあけて
対向するようにエッチングガス案内手段を配置し、その
間隙にエッチングガスを流すことにより、非接触方式
で、被処理基板の不所望な部分への成膜を防止するよう
にしたので、パーティクルの発生するおそれがなくな
り、歩留まりの向上をはかることができる。
As described above, according to the film formation processing apparatus of the present invention, the etching gas guide means is arranged so as to face a predetermined portion of the substrate to be processed with a gap, and the etching gas is guided into the gap. By flowing the gas, it is possible to prevent film formation on an undesired portion of the substrate to be processed by a non-contact method, so that there is no possibility of generation of particles and the yield can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例による枚葉式CVD装置の全
体構成を示す断面図である。
FIG. 1 is a sectional view showing the overall configuration of a single-wafer CVD apparatus according to an embodiment of the present invention.

【図2】実施例装置内のウエハ支持部の構成を示す平面
図である。
FIG. 2 is a plan view showing the configuration of a wafer support section in the apparatus of the embodiment.

【図3】実施例におけるエッチングガス案内板の第1の
構成例を示す断面図である。
FIG. 3 is a cross-sectional view showing a first configuration example of the etching gas guide plate in the example.

【図4】実施例におけるエッチングガス案内板の第2の
構成例を示す断面図である。
FIG. 4 is a cross-sectional view showing a second configuration example of the etching gas guide plate in the example.

【図5】実施例におけるエッチングガス案内板の第3の
構成例を示す断面図である。
FIG. 5 is a cross-sectional view showing a third configuration example of the etching gas guide plate in the example.

【図6】実施例におけるエッチングガス案内板の第4の
構成例を示す断面図である。
FIG. 6 is a cross-sectional view showing a fourth configuration example of the etching gas guide plate in the example.

【符号の説明】[Explanation of symbols]

10 処理室 12 半導体ウエハ 14 石英板 16 ハロゲンランプ 20 遮光板 30 エッチングガス案内板 32 支持板 34 エッチングガス導入用のガス管 38 プッシャピン 40 支持ピン 10 Processing Chamber 12 Semiconductor Wafer 14 Quartz Plate 16 Halogen Lamp 20 Light-Shielding Plate 30 Etching Gas Guide Plate 32 Support Plate 34 Gas Pipe for Introducing Etching Gas 38 Pusher Pin 40 Support Pin

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 被処理基板上に化学的または物理的な方
法によって被膜を堆積せしめる成膜処理装置において、 前記被処理基板の所定の部分と間隙をあけて対向するよ
うに配置されたエッチングガス案内手段と、前記間隙に
エッチングガスを流すエッチングガス供給手段とを具備
したことを特徴とする成膜処理装置。
1. A film forming apparatus for depositing a coating film on a substrate to be processed by a chemical or physical method, wherein an etching gas is arranged so as to face a predetermined portion of the substrate to be processed with a gap therebetween. A film forming apparatus comprising: a guide means and an etching gas supply means for supplying an etching gas to the gap.
JP4025686A 1992-01-16 1992-01-16 Film processing equipment Expired - Fee Related JP2990551B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4025686A JP2990551B2 (en) 1992-01-16 1992-01-16 Film processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4025686A JP2990551B2 (en) 1992-01-16 1992-01-16 Film processing equipment

Publications (2)

Publication Number Publication Date
JPH05190471A true JPH05190471A (en) 1993-07-30
JP2990551B2 JP2990551B2 (en) 1999-12-13

Family

ID=12172676

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4025686A Expired - Fee Related JP2990551B2 (en) 1992-01-16 1992-01-16 Film processing equipment

Country Status (1)

Country Link
JP (1) JP2990551B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6045862A (en) * 1997-07-16 2000-04-04 Tokyo Electron Limited CVD film forming method in which a film formation preventing gas is supplied in a direction from a rear surface of an object to be processed
JP2002362998A (en) * 2001-06-06 2002-12-18 Toyota Central Res & Dev Lab Inc Method and device for producing silicon carbide single crystal
JP2004172392A (en) * 2002-11-20 2004-06-17 Komatsu Electronic Metals Co Ltd Apparatus for manufacturing semiconductor epitaxial wafer, susceptor, and apparatus for supporting susceptor
KR100445814B1 (en) * 2001-11-23 2004-08-30 주성엔지니어링(주) Apparatus for Chemical Vapor Deposition
US20070000614A1 (en) * 2003-03-21 2007-01-04 Tokyo Electron Limited Method and apparatus for reducing substrate backside deposition during processing
JP2008235585A (en) * 2007-03-20 2008-10-02 Nuflare Technology Inc Vapor-phase growth device and vapor-phase growth method
JP2009135158A (en) * 2007-11-29 2009-06-18 Nuflare Technology Inc Vapor phase growth apparatus and vapor phase growth method
JP2013098271A (en) * 2011-10-31 2013-05-20 Nuflare Technology Inc Film formation method and film formation method

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6045862A (en) * 1997-07-16 2000-04-04 Tokyo Electron Limited CVD film forming method in which a film formation preventing gas is supplied in a direction from a rear surface of an object to be processed
US6210486B1 (en) 1997-07-16 2001-04-03 Tokyo Electron Limited CVD film forming method in which a film formation preventing gas is supplied in a direction from a rear surface of an object to be processed
JP2002362998A (en) * 2001-06-06 2002-12-18 Toyota Central Res & Dev Lab Inc Method and device for producing silicon carbide single crystal
JP4742448B2 (en) * 2001-06-06 2011-08-10 株式会社デンソー Method and apparatus for producing silicon carbide single crystal
KR100445814B1 (en) * 2001-11-23 2004-08-30 주성엔지니어링(주) Apparatus for Chemical Vapor Deposition
JP2004172392A (en) * 2002-11-20 2004-06-17 Komatsu Electronic Metals Co Ltd Apparatus for manufacturing semiconductor epitaxial wafer, susceptor, and apparatus for supporting susceptor
US20070000614A1 (en) * 2003-03-21 2007-01-04 Tokyo Electron Limited Method and apparatus for reducing substrate backside deposition during processing
US8382942B2 (en) * 2003-03-21 2013-02-26 Tokyo Electron Limited Method and apparatus for reducing substrate backside deposition during processing
JP2008235585A (en) * 2007-03-20 2008-10-02 Nuflare Technology Inc Vapor-phase growth device and vapor-phase growth method
JP2009135158A (en) * 2007-11-29 2009-06-18 Nuflare Technology Inc Vapor phase growth apparatus and vapor phase growth method
JP2013098271A (en) * 2011-10-31 2013-05-20 Nuflare Technology Inc Film formation method and film formation method

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