JPH05189259A - External register setting system - Google Patents

Abstract

PURPOSE:To evade erroneous setting in whatever personal computer a fault occurs. CONSTITUTION:In external register of a line interface receiving device for receiving a line to a private branch communication network the common part of whose nodes connected to a transmission line is of duplex structure, an information setting register 50a provided with two systems of a 0-th setting register 51 and a first setting register 52 to write in setting information from the personal computer, a comparator 53 to compare both of the setting information of the 0-th setting register 51 and the first setting register 52, and an executing register 55 to consider the setting information of both the systems to be effective only when these coincide with each other, and update the inputted setting information is provided so as to update the setting of the line.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to line setting for a private network, and more particularly to line setting in the event of a failure.

[0002]

2. Description of the Related Art In recent years, fault tolerant (mainly duplex) transmission lines such as computers and local communication networks have been emphasized in terms of reliability.

Particularly in a local area communication network, in a line interface accommodating device that cannot be duplicated (hereinafter referred to as a line set (LS)), it is required to solve a communication failure due to a single failure of a common part in a failure of a control system as well as a hardware failure. Has been.

A conventional line setting system will be described below with reference to FIG. In FIG. 4, 1 is the 0th of the 0 system
The transmission line 2 is a first transmission line of the 1-system, and the 0th transmission line 1
The first transmission line 2 has a dual structure including a working system of 0 system and a standby system of 1 system.

Reference numeral 3 is a node connected to the 0th transmission line 1 and the 1st transmission line 2. No. 0 personal computer in the node 3
0th common section 31 having 31a and selector 33a for switching selection
And a first common unit 32 having a first personal computer 32a, and a common line for line setting of lines 1 to 3 connected to the 0th common unit 31 and the first common unit 32 via a selector 33a. Three first LS4a which are a set (hereinafter referred to as LS)
The third LS4c is provided.

As shown in FIG. 4, in the conventional example, the 0th transmission line 1
And the node 3 of the redundant configuration connected to the first transmission line 2
Determines either the 0th personal computer 31a or the 1st personal computer 32a as the primary (main) or the secondary (subordinate) with respect to the 1st LS4a, and switches the selector 33 by the selection signal to select the 0th personal computer 31a or the 2nd personal computer. One of the personal computers 32a is selected to set the line in the external register 41 provided in the first LS4a, and when a failure occurs in the operating system, the line 1 is switched to the standby system.

[0007]

Therefore, in the line setting method of the conventional example, the switching from the active system to the standby system is performed after a failure occurs, and the LS is erroneously set during this switching period. There is a problem that there is a risk that

It is an object of the present invention to avoid erroneous setting even if any personal computer fails.

[0009]

In order to achieve the above object, according to the present invention, an external register of a line interface accommodating device for accommodating a line to a private communication network in which a common part of nodes connected to a transmission line has a duplex structure. Inside, there are two lines of 0th setting register 51 and 1st setting register 52 for writing setting information from an external personal computer, and a comparator 53 for comparing both setting information of the 0th setting register 51 and the 1st setting register 52. An information setting register 50a provided with an execution register 55 for updating the setting information to be input is regarded as valid only when the setting information of both systems match, and the line setting is updated.

Further, in the external register 41, an ID pattern generator 63 for generating an identifier pattern, two-system ID monitors 61, 62 for displaying the identifier pattern, and two-system personal computer control are performed for a predetermined time. The 0th setting register 65 and the 1st setting register 66 of two systems for setting the same identifier pattern as the output of the ID pattern generator 63, the one-sided system forced control information and the operating system information in the 0th setting register
A comparator 67 for comparing the setting information of 65 with the identifier from the ID pattern generator 63; and a comparator 68 for comparing the setting information of the first setting register 66 with the identification signal from the ID pattern generator 63. , The one-sided system forced control information and operation to be considered as valid only when the identifier pattern set in either the 0th setting register 65 or the 1st setting register 66 and the output of the ID pattern generator 63 match. A one-sided system forced control register 60 having an execution register 70 for updating system information is provided, and the information setting register 50a is controlled by the output of the one-sided system forced control register 60 so that operation can be continued only in a normal system. To configure.

[0011]

In the present invention, as shown in FIGS. 1 and 2, the information setting register 50a has a 0th setting register 51 and a 1st setting register 52 which can be set by a two-system personal computer, and is normally operated by an external personal computer. The 0th setting register 51 and the 1st setting register 52 are written asynchronously, and the setting contents of the 0th setting register 51 and the 1st setting register 52 are compared.

Therefore, when both systems are normal, the setting information can be updated by recognizing only the case of coincidence as valid information. On the other hand, when attempting to update the external register 41 when a one-system failure occurs, the one-system forced control register 60
Identifier from the ID pattern generator 63 (hereinafter referred to as I
(D) (a) and ID timing from each personal computer (b)
The IDs are compared.

Therefore, even when a failure occurs in one system, the setting information of the one-sided forced system and the operating system is set only when the comparisons match, so that the operation can be continued by the one-side system of only the normal system.

[0014]

Embodiments of the present invention will be described below with reference to FIGS. FIG. 1 is a diagram showing a circuit of an embodiment of the present invention, and is a diagram showing the inside of an external register 41. FIG. 2 is a diagram showing the setting timing of the one-sided forced control register.

In FIG. 1, 50a to 50c and 60 are circuits constituting the external register 41. Reference numerals 50a to 50c are information setting registers having a 0th setting register 51, a first setting register 52, a comparator 53, a selector 54, and an execution register 55, and circuits for outputting setting information 1 to setting information 3 for line setting. Is.

Further, 60 is an ID monitor 61, 62, an ID pattern generator 63, a timer 64, a 0th setting register 65 and a 1st setting register.
It is a one-sided forced control register having a setting register 66, comparators 67 and 68, a selector 69 and an execution register 70, and sends a one-sided forced control signal to the comparator 53 and the selector 54 to add it.

1 and 2, (a) is an ID pattern output from the ID pattern generator 63, and (b) is
This is the ID monitor timing for reading out and displaying the ID pattern of the ID monitors 61, 62 from a personal computer (not shown) via the 0th control bus and the 1st control bus. Further, (c) is the ID setting timing of the 0th setting register 65 and the 1st setting register 66 by the personal computer.

The operation of the information setting register 50a will be described with reference to FIG. The setting information input from the two-system personal computer via the 0th control bus and the 1st control bus is held in the 0th setting register 51 and the 1st setting register 52 by the write operation.

The comparator 53 includes a first setting register 51 and a first setting register 51.
The contents held in the setting register 52 are compared with each other, and a write signal is generated to the execution register 55 at the time when the contents held in both registers match. Further, the comparator 53 can forcibly set the comparator 53 in a matched state by a control signal from the one-sided forced control register 60.

The selector 54 follows the operation instruction of the control signal from the one-sided forced control register 60 to set the 0th setting register.
After selecting the contents held in 51 and the first setting register 52,
The selection result is added to the execution register 55.

When both systems which are not controlled by the one-system control forcing register 60 are normal, the selector 54 recognizes only the case where both systems match as valid information and executes the setting information of the recognition result. Add to register 55.

The execution register 55 holds the setting information selected by the selector 54 by the write signal from the comparator 53, and uses the holding result as the setting information 1 for setting the line 1. Similarly, the information setting register 50b sends setting information 2 to set the line 2, and the information setting register 50c sends setting information 3 to set the line 3.

Next, the operation of the one-sided forced control register 60 will be described with reference to FIGS. The ID pattern generator 63 generates an ID pattern (a) which is randomly updated at a constant cycle, and the timer 64 reads out, for example, the pattern E at the timing when each personal computer accesses the ID monitors 61 and 62, and the timer 64 When the timer value T to be set ends, the pattern E is updated to the next pattern F.

ID pattern from ID pattern generator 63
(a) is supplied to the ID monitors 61, 62 and the comparators 67, 68, and the ID patterns are read from the two systems of personal computers at the ID monitor timing (b).
Displayed in 2.

A personal computer that is normal to either the 0th setting register 65 or the 1st setting register 66 monitors the ID monitor 61 or the ID monitor 62 and sends the ID sent at the set ID timing (c), In addition, three pieces of information, that is, one-sided compulsory and operational setting information, are added and held via the normal control bus.

The setting information from the normal personal computer held in either the 0th setting register 65 or the 1st setting register 66 is the ID pattern from the ID pattern generator 63.
In addition to (a), the comparator 67 or the comparator 68 is added to perform comparison, and if the comparison results match, a write signal is generated at the matched timing and added to the selector 69 and the execution register 70. Further, if they do not match (timing), it is considered that the setting is made by an abnormal personal computer, and the execution register 70 is not updated.

The selector 69 switches to the setting information from the system for which the ID match (timing) is obtained, and inputs two pieces of information, the one-sided system forced control and the setting information of the operating system, which are input.
70, and holds the holding result in each information setting register 50a, 50b,
It is sent as a control signal to 50c.

As described above, normally, each personal computer asynchronously operates the 0th setting register 51 and the 1st setting register.
The comparator 53 compares the setting contents written in 52, recognizes only the coincidence as valid information, and updates the setting information.

Further, when one-sided failure occurs, the external register 41
When updating the ID, the ID from the ID pattern generator 63
I in (a) and ID timing from each personal computer (b)
By comparing D with each other and setting the setting information of the one-sided forced system and the operating system only when the comparison matches, it is possible to continue the operation only with the normal system.

The operation of the node of the present invention will be described with reference to FIG. The external register 41 of the present invention is provided in the internal circuit of the first LS4a to the third LS4c which accommodates the line only for the duplicated 0th transmission line 1 and 1st transmission line 2 and 0th common section 31 and 1st common section 32. Used, 2 system 0 PC 31a
1st personal computer 32a and 0th personal computer bus 31b and 1st
It is connected to the external register 41 via the personal computer bus 32b.

The setting information from the external register 41 is sent to the transmission line control unit 42 and the line termination unit 43 in the first LS4a to the third LS4c, and the 0th data is transmitted from the 0th transmission line 1 and the 1st transmission line 2. It is used for setting the data system to the lines 1, 2 and 3 of the information sent via the bus 1a and the first data bus 2a.

[0032]

As is apparent from the above description, according to the present invention, it is possible to prevent the influence of the single failure of the duplicated common part on the line and to construct a more reliable transmission path. Has the effect.

[Brief description of drawings]

FIG. 1 is a diagram showing a circuit of an embodiment of the present invention.

FIG. 2 is a diagram showing a setting timing in the one-sided forced control register of the present invention.

FIG. 3 is a diagram showing a configuration of a node according to the present invention.

FIG. 4 is a diagram showing a circuit of a conventional example.

[Explanation of symbols]

41 is an external register 50a is an information setting register 51 is a 0th setting register 52 is a first setting register 53 is a comparator 54 is a selector 55 is an execution register 60 is a one-sided forced control register 61, 62 is an ID monitor 63 is an ID pattern generation Unit 64 is timer 65 is 0th setting register 66 is 1st setting register 67, 68 is comparator 69 is selector 70 is execution register

Claims (2)

[Claims] 1. A two-system system for writing setting information from an external personal computer in an external register of a line interface accommodating device for accommodating a line to a local area communication network in which a common part of nodes connected to a transmission line is duplicated. 0 setting register (51) and first setting register (52), comparator (53) for comparing both setting information of the 0th setting register (51) and first setting register (52), and setting of both systems Only when the information matches is considered valid,
An external register setting method characterized in that an information setting register (50a) having an execution register (55) for updating input setting information is provided to update the line setting. 2. An ID pattern generator (63) for generating an identifier pattern and two-system ID monitors (61, 6) for displaying the identifier pattern in the external register (41).
2) With the control of the two systems of personal computer,
Two lines of 0th setting register (65) and 1st setting register (66) for setting the same identifier pattern as the output of the pattern generator (63), single system forced control information and operating system information, and the 0th setting From the comparator (67) for comparing the setting information of the register (65) with the identifier from the ID pattern generator (63) and the setting information of the first setting register (66) and the ID pattern generator (63) Of the ID pattern generator (63) and a comparator (68) for comparing the identification signals of the ID pattern generator, and the identifier pattern set in either the 0th setting register (65) or the 1st setting register (66). Is considered valid only when and match,
One-sided forced control register (60) with execution register (70) that updates the one-sided forced control information and operating system information to be input
The external register setting method according to claim 1, characterized in that the information setting register (50a) is controlled by the output of the one-sided forced control register (60) so that the operation can be continued only in the normal system. ..