JPH05183344A - Fm detection circuit - Google Patents

Abstract

PURPOSE:To provide the FM detection circuit employing a phase shift circuit which requires no adjustment and which is used for easily realizing a semiconductor integrated circuit. CONSTITUTION:The detection circuit consists of a phase shift circuit 3 using a variable integral circuit comprising a trans-conductance amplifier A1 and a capacitance multiplier circuit 31 and shifting a phase of a limiter signal at the center frequency by 90 deg., a multiplier circuit 4 receiving respectively an output of a limiter circuit and the phase shift circuit 3 and applying phase detection to the limiter signal, and an error amplifier 6 leading out the detection output from the multiplier circuit 6 and receiving the smoothed detection output, and an output of the error amplifier 6 is fed to the trans-conductance amplifier A1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an FM which can be easily integrated into a semiconductor integrated circuit and uses a phase-shifting circuit having a non-tuned phase.
It relates to a detection circuit.

[0002]

2. Description of the Related Art FIG. 5 is a circuit diagram showing an example of an FM detection circuit composed of a conventional quadrature detection circuit. A phase shift circuit 20 for shifting the phase of a limiter signal by 90 degrees at the center frequency and a limiter output are directly connected to each other. It is composed of a multiplication circuit 21 to which the output from the phase shift circuit 20 is supplied. One input terminal of the multiplication circuit 21 has
The limiter signal is directly input from the limiter circuit path, and the limiter signal phase-shifted by 90 degrees is supplied to the other input terminal through the phase shift circuit 20, and the limiter signal (IF signal) is supplied to the multiplication circuit 21. Phase detect F
M detection output is obtained. The quadrature detection circuit is an FM detection circuit that is relatively suitable for forming a semiconductor integrated circuit, but normally, the phase shift circuit 20 is composed of a capacitor and a coil, and the multiplication circuit 21 is a semiconductor integrated circuit. However, this phase shift circuit is an external component and is mounted on the printed circuit board. In addition, the phase shift circuit 20
By adjusting the resonance frequency of the phase shift circuit 20 by moving the magnetic core of the coil to change the inductance value, the adjustment work for obtaining the limiter signal with the phase shifted by 90 degrees at the frequency corresponding to the center frequency is performed. ing.

[0003]

In the FM detection circuit of FIG. 5, the multiplication circuit 21 is a semiconductor integrated circuit, but the phase shift circuit 20 is composed of a capacitor and a coil and is mounted on a printed circuit board. Since it is an externally attached component, the number of components is increased, and there is a drawback that the manufacturing cost is increased. Further, in the phase shift circuit 20, there is an adjustment work for adjusting the inductance value by moving the magnetic core of the coil to change the inductance value, which is troublesome. The present invention is intended to solve the above-mentioned drawbacks, and an object of the present invention is to provide an FM detection circuit including a phase shift circuit which has no adjustment of the phase shift circuit and which can be easily integrated into a semiconductor integrated circuit. To do.

[0004]

An FM detection circuit according to the present invention is provided with a phase shift circuit including a capacitance multiplication circuit which is supplied with a limiter signal from a limiter circuit and outputs an output obtained by shifting a phase at a center frequency by 90 degrees. , The outputs of the limiter circuit and the phase shift circuit are respectively supplied, and a multiplication circuit for phase-detecting the limiter signal and an error amplifier to which the detection output from the multiplication circuit is smoothed and supplied are provided. An error current is supplied to the phase shift circuit.

[0005]

In the FM detection circuit of the present invention, the phase shift circuit is composed of a variable integration circuit including a capacitance multiplication circuit for multiplying the integration capacitance,
A signal obtained by shifting the phase of the limiter signal by 90 degrees at the center frequency is supplied to the multiplying circuit via the limiter signal and the phase shift circuit, the limiter signal is phase-detected, and a direct current corresponding to the detection output from the multiplying circuit is applied. The output is supplied to the error amplifier and the phase shift circuit is controlled by the error current to obtain the FM detection output.

[0006]

1 is a block diagram showing an embodiment of an FM detection circuit of the present invention, and FIG. 2 is a circuit diagram showing a more concrete embodiment thereof. In FIG. 1, the limiter signal input from the input terminal 1 is supplied to a phase shift circuit 3 and a multiplication circuit 4 which shift the phase of the limiter signal by 90 degrees at the center frequency. Further, the signal from the phase shift circuit 3 is supplied to the multiplication circuit 4, the limiter signal is phase-detected by the multiplication circuit 4, and the FM detection output is obtained from the output terminal 2. The detection output is supplied to an error amplifier 6 to which a reference voltage source 7 is connected via a smoothing circuit 5 composed of a capacitor and a resistance, and the error voltage is supplied to a phase shift circuit 3 with a limiter at a frequency corresponding to the center frequency. The phase circuit 3 is adjusted so that the phase of the signal is shifted by 90 degrees.

Next, description will be made with reference to FIG. 2, which is a more specific embodiment of FIG. The same parts as those in FIG. 1 are designated by the same reference numerals. The phase shift circuit 3 is composed of a variable integrator circuit composed of a trans-conductance amplifier A ₁ and a capacitance multiplication circuit 3 _1, and a reference voltage source 8 is connected to an inverting input terminal of the trans-conductance amplifier A ₁ and a transformer.・ Resistor R at the output terminal of the conductance amplifier A _1
3 is connected. Further, the other end of the resistor R ₃ is connected to the non-inverting input terminal of the self-negative feedback type differential amplifier A ₂ , and the capacitor C ₁ is connected between the other end of the resistor R ₃ and the ground. The output terminal of the differential amplifier A ₂ is connected to the output terminal of the trans-conductance amplifier A ₁ via a resistor R ₅ to form a capacitance multiplication circuit 3 ₁ . Smoothing circuit 5
Is composed of a resistor R ₁₀ and a capacitor C _{2, an} FM detection output is supplied from the multiplication circuit 3, and a DC output corresponding to the detection output is supplied to the non-inversion input terminal of the error amplifier 7 by the smoothing circuit 5. The error current corresponding to the FM detection output is transmitted through the error amplifier 6 to the transformer / conductance amplifier A.
₁ , the gain is controlled, and a limiter signal whose phase is shifted by 90 degrees according to the center frequency is output from the phase shift circuit 3.

Next, a concrete embodiment of the phase shift circuit will be described with reference to FIG. In FIG. 3, the trans-conductance amplifier A ₁ is a differential pair transistor Q _1, Q
₂ and their emitter resistance R _1, R ₂ are connected, the other ends thereof is commonly connected, is connected to the current source circuit I _1, the current source circuit I ₂ to the collector of the transistor Q ₂ is connected At the same time, the resistor R ₃ is connected. A capacitor C ₁ is connected between the other end of the resistor R ₃ and the ground, and constitutes an integrating circuit 3 ₁ together with the differential pair transistors Q _{1 and} Q ₂ . A limiter signal is supplied to the base of the transistor Q ₁ , and a reference voltage is supplied from the reference voltage source 8 to the base of the transistor Q ₂ . The output terminal of the integrating circuit 3 ₁ has a resistor R
It is connected via ₃ to the base of the transistor Q ₃ . The differential amplifier A ₂ is composed of the differential pair transistors Q _{3 and} Q ₄ , the current source circuit I ₃ connected to the commonly connected emitters thereof, the diode D ₁ and the active load circuit including the transistor Q _5. , The collectors of the transistors Q _{4 and} Q ₅ are commonly connected to the base of the transistor Q ₆ for positive feedback, the emitter of the transistor Q ₆ is connected to the current source circuit I _4, and the emitter and the transistor Q ₆ are connected to each other. _A resistor R ₄ is connected between the bases of ₄ and
The emitter of the transistor Q ₆ is connected to the connection point of the resistor R ₃ and the collector of the transistor Q ₂ via the resistor R ₅ , and the differential amplifier A ₂ is negatively fed back. Current source circuit I ₁ of the transconductance amplifier A ₁ is
Controlled by the error amplifier 6, the emitter of the transistor Q ₆ is connected to the multiplication circuit 4.

The transfer function T (s) of the variable integrator circuit composed of the trans-conductance amplifier A ₁ and the capacitance multiplication circuit 3 ₁ shown in FIG. 3 will be described below. The relation of the current at the output terminal P ₁ point of the trans-conductance amplifier A ₁ is expressed as follows. _{gmV 1 + (V 3 -V 2} ) / R 5 + (V 3 -V 2) / R 3 = 0 gmV 1 = (R 3 + R 5) / R 1 R 2 (V 2 -V 3) ......... (1) (However, gm is the transconductance amplifier A ₁
, V ₁ is the input voltage of the trans-conductance amplifier A ₁ , V ₂ is its output voltage,
V ₃ represents the input / output voltage of the differential amplifier A ₂ , and R _{3 and} R ₅ represent resistance values. ) The relation of the current at the input terminal P ₂ point of the differential amplifier A ₂ is expressed as follows. (V ₃ −V ₂ ) / R ₁ + V ₃ sC _P = 0 V ₂ = V ₃ (1 + sC _p R ₁ ) ... (2) Substituting equation (2) into equation (2), V Ask for ₁ . gmV ₁ = [(R ₃ + R ₅ ) / R ₃ R ₅ ] (1 + sC _P R ₃ −1) V ₃ V ₁ = (R ₃ + R ₅ ) · sC _P · V ₃ / gmR ₅ (however, sC _P is represents the capacitance of the capacitor C _1.) Therefore, the transfer function T of the variable integrating circuit (s) is determined by the following equation. T (s) = V ₃ / V ₁ = gmR ₅ / sC _P (R ₃ + R ₅ ) = 1 / [sC _P・ (1 + R ₃ / R ₅ ) ・ 1 / gm] ………… (3) (3 ), The capacitance of the variable integrator circuit can be artificially varied by varying the transconductance gm of the trans-conductance amplifier A ₁ , so that the phase of the limiter signal is 90 degrees at the center frequency. It is shifting.

FIG. 4 shows another embodiment of the FM detection circuit of the present invention. The same parts as those in FIG. 2 are designated by the same reference numerals. 3 ₂ is a phase shift circuit, and a capacitance multiplier circuit similar to the embodiment of FIG. This phase shift circuit 3
_{In 2} , the error current is applied to the output stage of the capacitance multiplication circuit. Differential amplifier A ₃ is connected to the resistor R ₃ to the output terminal, the capacitor C ₁ between ground and the other end connected, the other end of the resistor R ₃ is forward input of the differential amplifier A ₄ It is connected to the terminal. The output terminal of the differential amplifier A ₄ is
Is connected to the base of the transistor Q _7, Q ₈ is an emitter follower connected. The emitter of the transistor Q _7, Q _8, the transistors Q _9, together with the collector of Q ₁₀ are connected, respectively resistor R _4, the inverting input terminal and the differential amplifier A ₃ of the differential amplifier A ₄ through R ₅ Is connected to the output terminal of. Transistors Q _9, Q ₁₀ is a current mirror circuit formed by the diode D _2, diode D ₂
Is supplied with an error current via the error amplifier 6. If the error current supplied to the diode D ₂ increases, the output current is controlled so as to be attenuated so that the phase is shifted by 90 degrees at the center frequency, and the direct current level of the detection output is controlled to be constant. ing.

[0011]

In the FM detection circuit of the present invention, the phase shift circuit is composed of an integrator circuit composed of a trans-conductance amplifier and a capacitance multiplication circuit, the FM detection output is smoothed, and an error voltage is obtained through the error amplifier. By controlling the transconductance amplifier of the phase shift circuit by the error voltage, there is no need for adjustment of the phase shift circuit, and no adjustment is required, which is extremely effective. Further, according to the FM detection circuit of the present invention, the phase shift circuit which has conventionally been composed of the coil, the capacitor and the like can be formed by the semiconductor integrated circuit. Therefore, all the FM detection circuits can be integrated into the semiconductor integrated circuit. It is extremely effective. Further, according to the FM detection circuit of the present invention, the phase shift circuit can be made unadjusted, and the number of components of the FM detection circuit can be reduced, so that the cost can be reduced. Is.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an FM detection circuit of the present invention.

FIG. 2 is a circuit diagram showing an embodiment of an FM detection circuit of the present invention.

FIG. 3 is a circuit diagram showing an example of a phase shift circuit of the FM detection circuit of the present invention.

FIG. 4 is a block diagram for explaining another embodiment of the FM detection circuit of the present invention.

FIG. 5 is a circuit diagram showing an example of a conventional FM detection circuit.

[Explanation of symbols]

1 Input Terminal 2 Output Terminal 3, 3 ₂ Phase Shift Circuit 3 ₁ Capacitance Multiplier Circuit 4 Multiplier Circuit 5 Smoothing Circuit 6 Error Amplifier 7, 8 Reference Voltage Source 9 Capacitance Multiplier Circuit A ₁ Trans Conductance Amplifier A _{2 to} A ₄ differential amplifier C _1, C ₂ capacitors Q ₁ to Q ₆ transistor R ₁ to R ₅ resistance

Claims (3)

[Claims] 1. A phase integrator circuit which comprises a variable integrator circuit including a capacitance multiplier circuit and which shifts the phase of a limiter signal by 90 degrees at a center frequency, and the limiter circuit and the output of the phase shift circuit are respectively supplied to the limiter signal. A multiplication circuit for phase-detecting, and a smoothing circuit for smoothing the detection output from the multiplication circuit,
An error amplifier to which the DC output from the smoothing circuit is supplied, and by supplying the output from the error amplifier to the phase shift circuit, the DC level of the detection output is made substantially constant at a predetermined center frequency. Characteristic FM detection circuit. 2. The variable integrator circuit has a trans-conductance amplifier and a first resistor connected to its output terminal,
The other end of the first resistor is connected to a capacitor whose other end is grounded, and is also connected to the non-inverting input terminal of a self-negative feedback type differential amplifier, and the output terminal of the differential amplifier is connected to the multiplication circuit. A phase shift circuit including a capacitance multiplication circuit connected to one input terminal and connected to an output terminal of the trans-conductance amplifier via a second resistor. The FM detection circuit according to item 1. 3. The variable integrator circuit includes a first differential amplifier, a first resistor connected to an output terminal thereof, and a capacitor having the other end grounded between the other end of the first resistor and the ground. At the same time, it is connected to the non-inverting input terminal of the self-negative feedback type second differential amplifier, and to the output terminal of the second differential amplifier, to the first and second transistors that are emitter-follower connected, An emitter of the first transistor is connected to an inverting input terminal of the second differential amplifier via a second resistor,
The emitter of the second transistor is connected to the output terminal of the first differential amplifier through the third resistor, and the error current of the error amplifier controls the collector currents of the first and second transistors. The FM detection circuit according to claim 1, wherein the FM detection circuit is configured as described above.