JPH0518306B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a horizontal AFC circuit suitable as a component of a video signal discrimination circuit. The video signal discrimination circuit detects the presence or absence of a video signal in the input signal, and determines when there is no video signal or when the input signal is not a regular video signal.For example, it cuts off the audio signal when this input signal is present. It is used for the purpose of

Conventional configuration and its problems The easiest way to determine the presence or absence of a video signal is to directly detect the video signal, but it is difficult to distinguish between a normal video signal and noise, so it is difficult to use this method for practical purposes. That is impossible. On the other hand, in devices equipped with flyback pulses such as television receivers, this flyback pulse has a phase that matches the synchronization signal, and it is relatively easy to perform a logical product of both pulses using an AND circuit or a NAND circuit. A circuit for determining the presence or absence of a video signal can be configured. However, in devices without flyback pulses, such as VTRs, this arrangement is not possible and a corresponding signal must be generated.

OBJECT OF THE INVENTION The present invention does not include a flyback pulse.
The present invention aims to provide a horizontal AFC circuit capable of stably supplying a signal corresponding to a flyback pulse in order to configure a video signal discrimination circuit in a VTR.

Structure of the Invention The horizontal AFC circuit of the present invention includes a series circuit of a variable resistor 19 and an oscillation capacitor 18 connected between a power supply terminal 20 and a ground point, and an input signal supplied from one end of the oscillation capacitor 18. The oscillation capacitor 18 is charged and discharged in response to the output pulse, and the charging time or the discharging time is equal to the horizontal synchronizing signal. A level switch type CR that generates sawtooth waves of approximately the same duration at one end of the oscillation capacitor 18.
Oscillators 18 to 33 and the oscillation capacitor 18
One input terminal is connected to one end, the other input terminal is biased to the midpoint potential _V37 of the amplitude of the sawtooth wave, and the collector is connected to the first active load 38~
The first differential pair transistors 34 and 35 are connected to each other at 40, and the collectors are connected to each other at second active loads 9 to 11, one input terminal is biased to a predetermined potential _V6 , and the collectors are coupled to each other by a second active load 9 to 11. a second differential pair transistor 4 whose other input terminal is connected to the output terminal (collector of 38) of the first active load that drives the biased resistor 6;
5, a transistor 2 that generates a current pulse according to the input of a horizontal synchronizing signal and applies the current pulse to a common emitter connection point e of the second differential pair transistors, and an output current of the second active load. ΔI _AFC is smoothed and the oscillation capacitor 1
Smoothing circuits 14 to 17 that feed back bias current to 8
With this configuration, the first differential pair transistor whose operating point is the midpoint potential of the oscillation amplitude of the level switch type CR oscillator outputs an output pulse with an output duty of 50:50. Since the output pulse is applied to the input terminal (base of transistor 4) of the second differential pair transistor (phase comparator) and the phase of the output pulse and horizontal synchronization signal is compared, the oscillation frequency pull-in range is wide. Even if the horizontal synchronization signal is temporarily lost and the oscillation frequency shifts, the oscillation state synchronized with the horizontal synchronization signal can be quickly restored.

DESCRIPTION OF EMBODIMENTS FIG. 1 shows a circuit diagram of a horizontal AFC circuit of the present invention. In the figure, 1 is the horizontal synchronization signal input signal, 8 and 37 are DC voltage terminals, and 12 is the horizontal AFC
Output terminals, 13 is a horizontal oscillation input terminal, 20 is a power supply voltage terminal, 41 is an output pulse output terminal, 2 is a transistor that generates a current pulse synchronized with the horizontal synchronization signal, 4, 5, 9, 10, 11, 22 ,2
4, 25, 31, 33-35, 38-40 are transistors, 3, 6, 7, 16, 17, 19, 2
1, 23, 27, 28, 29, 30, 32 are resistors, 14, 15, 18 are capacitors, 26, 36
is a constant current source.

The operation of the circuit of FIG. 1 is as follows.
That is, a charging potential charged to the horizontal oscillation capacitor 18 is added to the potential of the horizontal oscillation input terminal 13. A DC voltage applied to a terminal 20 is applied to this capacitor 18 via a horizontal hold variable resistor 19. This charging potential is the transistor 24
is added as the base potential of the transistor 24
The transistor 25 whose emitter is connected is charged to the initial base potential _VH . _VH is resistance 28,
It is given by the following equation using 29, 30 and the power supply voltage V _CC .

V _H = R29 + R30 / R28 + R29 + R30 × V _CC ... (1) Here, R28, R29, and R30 are the resistances 2 in Figure 1.
The resistance values are 8, 29, and 30, and V _CC is the voltage value applied to the power supply terminal 20. transistor 2
When the base potential of transistor 4 reaches _VH , transistor 2
4 is turned on, transistor 25 is turned off, and current I ₂₆ from current source 26 flows through resistor 27 to the collector of transistor 24 . As a result, transistor 33 is turned on, transistors 31 and 22 are turned on, and the collector potential of transistor 31 becomes the collector saturation voltage value. Assuming that this saturation voltage is approximately zero volts, the base potential V _L of the transistor 25 at this time is given by the following equation.

V _L = R29/R28 + R29V _CC ...(2) On the other hand, when the transistor 22 is turned on, the charge charged in the horizontal oscillation input terminal 13 is discharged through the resistor 21 and the transistor 22 to the potential of V _L shown in the above two equations. . When the horizontal oscillation input terminal 13, that is, the base potential of the transistor 24 reaches V _L , the transistor 25 turns on, and the transistor 24
is turned off, and transistors 33, 31 and 2
The on/off operations of 2 are reversed, and the horizontal oscillation capacitor 18 is charged again. By repeating the above operations, a sawtooth wave is generated at the horizontal oscillation input terminal 13. Figure 2a shows this waveform.

The charging time tc and charging time td of this sawtooth wave are approximately given by the following equations.

tc=R19C18lnV _CC −V _L /V _CC −V _H …(3) td=R21C18lnV _H /V _L …(4) Here, R19 is the horizontal hold variable resistor 19
, R21 is the resistance value of the resistor 21, and C18 is the capacitance of the horizontal oscillation capacitor 18.

A pulse shown in FIG. 2b is output to the collector of the transistor 33. This pulse corresponds to the charging period of the sawtooth wave. This charging period, that is, the pulse width output to the base of the transistor 33 is determined by the resistance of the resistor 21 and the capacitor 1, as shown in equation 4 above.
It is proportional to the value of 8. Therefore, if this resistor 21 is constructed of, for example, a semiconductor integrated circuit, a desired horizontal oscillation pulse width can be selected by changing the capacitance of the capacitor 18. FIG. 2c shows the waveform of the horizontal oscillation pulse output terminal 41.

The sawtooth wave generated at horizontal oscillation input terminal 13 is applied to the base of transistor 34. At this time, if a DC potential V37 is applied to the base of the transistor 35, the transistor 34
The transistor 34 is turned on at the part of the sawtooth waveform where the base potential of V37 is higher than V37;
The transistor 35 is turned on at the lower part.

Therefore, the rectangular wave shown in FIG. 2d is output to the collector of the transistor 35, and this rectangular wave is applied to the base of the transistor 4. At this time, the potential V8 of the DC voltage terminal 8 is applied to the bases of the transistors 4 and 5 via the resistors 6 and 7, and the base potential of the transistor 4 becomes lower than the base potential of the transistor 5 due to the rectangular wave. When this happens, transistor 5 turns on. now,
When a positive pulse horizontal synchronizing signal is applied from horizontal synchronizing signal input signal 1, transistor 2 turns on and draws current from transistors 4 and 5. This is shown in Figure 2e. When the phase and frequency of the horizontal oscillation pulse and the horizontal oscillation synchronization signal match, the current ΔI _AFC shown in Fig. 2 f is applied to the horizontal AFC output terminal 12.
is output. This output current is smoothed by smoothing capacitors 14 and 15 and smoothing resistor 16, and is applied to horizontal oscillation capacitor 18 via resistor 17. As shown in FIG. 2f, when the horizontal oscillation pulse and the horizontal synchronizing signal match in phase and frequency, the sum of ΔI _AFC in one cycle I _AFC becomes zero, and the charging time of the horizontal oscillation capacitor remains unchanged. now,
If the frequency of the horizontal oscillation pulse increases, the rectangular wave (second wave) applied to the base of capacitor 4 increases.
The cycle in figure d) becomes shorter and the negative ΔI _AFC becomes larger. Here, the polarity of ΔI _AFC is positive in the direction in which it flows out from the horizontal AFC output terminal 12. Therefore, I _AFC becomes negative and draws the charging current of the horizontal oscillation capacitor 18 through the resistor 17. As a result, the charging time of the horizontal oscillation capacitor 18 becomes longer and the oscillation frequency becomes lower. On the other hand, when the frequency of the horizontal oscillation pulse becomes lower than the frequency of the horizontal synchronizing signal, the period of the rectangular wave applied to the base of the transistor 4 becomes longer, and the positive ΔI _AFC becomes larger.
Therefore, I _AFC becomes positive and is applied to the horizontal oscillation capacitor 18 via the resistor 17, so that the oscillation frequency becomes higher. In this way, the oscillation pulse of the horizontal oscillator can be correctly matched to the horizontal synchronization signal.

Effects of the Invention As explained above, in the horizontal AFC circuit of the present invention, the first differential pair transistor whose operating point is the midpoint potential of the oscillation amplitude of the level switch type CR oscillator outputs an output with an output date of 50:50. A pulse is output, the output pulse is applied to the input terminal (base of transistor 4) of the second differential pair transistor (phase comparator), and the phase of the output pulse and the horizontal synchronization signal is compared. A horizontal AFC circuit with a wide oscillation frequency pull-in range can be realized with a small number of elements and without the need for a oscillator. Even if the horizontal synchronization signal is temporarily lost and the oscillation frequency shifts, the oscillation state synchronized with the horizontal synchronization signal can be quickly restored. Further, by making the free run frequency match the frequency of the horizontal synchronization signal using a variable resistor, the oscillation frequency can be further stabilized.

[Brief explanation of the drawing]

Fig. 1 is a horizontal AFC circuit diagram according to the present invention, Fig. 2 is a horizontal AFC circuit diagram according to the present invention;
The figure is a waveform diagram of each part of FIG. 1. 1...Horizontal synchronization signal input terminal, 8, 37...DC voltage terminal, 12...Horizontal AFC output terminal, 13
... Horizontal oscillation input terminal, 14, 15 ... Smoothing capacitor, 16 ... Smoothing resistor, 17 ... Resistor,
18...Horizontal oscillation capacitor, 19...Horizontal hold variable resistor, 20...Power supply terminal, 26,3
6... Constant current source, 41... Horizontal oscillation pulse output terminal.

Claims (1)

[Claims] 1. A series circuit of a variable resistor and an oscillation capacitor connected between a power supply terminal and a ground point, a comparator to which an input signal is applied from one end of the oscillation capacitor, and an output of the comparator. The oscillation capacitor is charged and discharged in response to the output pulse, and a sawtooth wave whose charging time or discharging time is approximately the same as that of the horizontal synchronization signal is output to the oscillation capacitor. A level switch type CR oscillator is generated at one end, one input end is connected to one end of the oscillation capacitor, the other input end is biased to the midpoint potential of the amplitude of the sawtooth wave, and the collector is connected to the first end. a first differential pair of transistors whose collectors are coupled to each other by an active load, whose collectors are coupled to each other by a second active load, one input end of which is biased to a predetermined potential, and drives a resistor biased to the predetermined potential; a second differential pair transistor whose other input terminal is connected to the output terminal of the first active load; A horizontal AFC circuit comprising: a transistor that applies the current pulse to a common emitter connection point; and a smoothing circuit that smoothes the output current of the second active load and returns a bias current to the oscillation capacitor.