JPH05180899A - Electrostatic breakdown test device for semiconductor device - Google Patents

Abstract

PURPOSE:To realize a device having good reproducibility by adopting a new structure especially in a probe unit or the like in an electrostatic breakdown test device using a device charging method. CONSTITUTION:An electrostatic breakdown test device comprises a means for moving a probe unit 33 in response to the pin position of a semiconductor device as a sample, a means for lowering the probe unit 33 to be brought in contact with the pin of a sample 35, a means for closing a first switch in the probe unit 33 so as to charge a device, and a means for closing a second switch so as to discharge the device, wherein the switches are separated from a switch driving means.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrostatic breakdown test apparatus for conducting an electrostatic breakdown test on a semiconductor device, particularly a semiconductor integrated circuit (IC), and more particularly to a device charging model (C).
DM) electrostatic discharge test apparatus.

[0002]

2. Description of the Related Art A so-called capacitor charging / discharging method has been used for a long time as a method of simulating an electrostatic discharge that causes an actual electrostatic breakdown phenomenon occurring in a semiconductor device, particularly a semiconductor integrated circuit. In this method, a capacitor is charged at a high voltage and then rapidly discharged to a semiconductor device under test. In this method, the following 2
Types of models are typical.

(1) Human Body Modeling Method A basic circuit is a method of modeling electrostatic discharge generated when a human body charged with static electricity touches a semiconductor device.
R charge / discharge circuit. In this case C = 100 pf, R = 1.
5kΩ is used.

(2) Machine model method This is a method of modeling electrostatic discharge from a machine used in an assembly process, an inspection process, a transfer process, etc. instead of the human body. C = 200 pf and R = 0Ω are common.

This capacitor charging / discharging method is a general test method, and most of the conventional electrostatic breakdown tests employ this method. In this capacitor charging / discharging method, a stress of electrostatic discharge is externally applied to a semiconductor device, and the strength against which the device is destroyed or deteriorated is measured.

On the other hand, even if the semiconductor device itself is charged with static electricity and its electric charges are rapidly discharged to the outside, if the amount of electric charges is large, the semiconductor device will be destroyed or deteriorated. The capacity of a semiconductor device is orders of magnitude smaller than the above-mentioned electrostatic discharge capacity of 100 to 200 pf (usually 20 pf or less, depending on the degree of integration of the semiconductor device). It is different from the mechanical model. That is, the insulating film (oxide film) of the semiconductor device is broken or the insulation is lowered. The test method that models this phenomenon is the device charging method. Regarding the device charging method, JP-A-59-2
Japanese Patent No. 31458 discloses the basic test method. However, conventionally, there has not been a practical and reproducible test apparatus based on this test method. The present invention relates to a practical test apparatus for automating the test by the device charging method.

FIG. 21 shows a circuit diagram of a conventional test apparatus using the device charging method. FIG. 21A is a circuit diagram showing the principle of the electrostatic breakdown test method for semiconductor devices by the device charging method. The sample semiconductor device 88 is charged by a switch 87 via a high resistance R ₁ 82 and a resistance R ₂ 83 from a high voltage power supply 81. The high resistance R ₁ 82 is, for example, 10
The resistance is about 0 MΩ, and an extremely high resistance is used to prevent the semiconductor device 88 from being destroyed by being charged rapidly. The resistor R ₂ 83 is used to separate the high resistor R ₁ 82 and the high voltage power supply 81 side from the switch 87 and the semiconductor device 88 in a high frequency manner. This resistance R
_In order to simplify the structure of the electrostatic breakdown test apparatus, reference numeral 283 is a configuration in which the pin of the semiconductor device 88, the high-voltage power supply 81, and the high resistance R ₁ 82 are connected, and the pin is grounded to discharge the charge. Has a great meaning because it does not affect the discharge waveform.

When the switch 87 is switched to the ground side, the electric charge charged as described above is discharged. The charging voltage (charging voltage) when the semiconductor device is destroyed by this discharge is measured.

Since the discharge phenomenon of the device charging model occurs toward the outer conductive metal from the pin of the semiconductor device, it is extremely fast and the current of several amperes is 1 ns (10 ns).
^-9 seconds) or less. Also, the impedance present in the discharge path is extremely low in this current pulse band.

Therefore, in order to realize the principle diagram of FIG. 21A as an electrostatic breakdown test apparatus, the following points are important. -When charging electric charge, do not change the inherent stray capacitance of the semiconductor device, -When discharging electric charge, the impedance to ground of the discharge path is as close as possible to the impedance in the actual breakdown phenomenon, especially discharge The peak value of the current is close to the ideal value, -The switch that controls charging and discharging operates for a long time and maintenance-free many times, -The waveform of the discharge current can be observed.

The problems associated with the conventional discharge breakdown test apparatus using the device charging method will be described below, taking these four items into consideration. The conventional test devices are roughly classified into the following two types.

(1) Equipment for testing semiconductor devices by mounting them in sockets The majority of electrostatic discharge tests by the device charging method have conventionally adopted this method. However, − Because the socket is used, the inherent stray capacitance of the semiconductor device changes. -The impedance of the discharge path is large due to the socket and the connection wiring between the socket and the charge / discharge circuit, and the deviation of the discharge current from the ideal waveform is large. Therefore, there are large variations in the measurement results, and the absolute values also deviate significantly from the original measurement results.

(2) Device for testing by directly contacting probe with pin of semiconductor device FIG. 21B shows the circuit configuration of this device. In this device, the charging / discharging probe unit is moved to the pins of the semiconductor device of the sample, aligned and brought into contact with each other, as in the present invention described later. Simultaneously with the contact, R ₁ 82 from the high voltage power source 81,
Charging begins via R ₂ 83. When the charging / discharging probe is further pushed down after waiting until it seems that charging is completed, the switch 89 is connected to the ground side and discharging occurs. Since this discharge occurs in the atmosphere due to the structure of the mechanical switch, oxidation and contamination of the contacts occur, and reproducible measurement is difficult unless the contacts are regularly cleaned. However, since the change of the charging capacity is small and the impedance of the discharge path is extremely low, it is possible to obtain highly reliable measurement results by regularly cleaning the contacts. The discharge waveform has not been observed. Further, in this device, it is important not to use wires, relays, switches, etc. in the discharge path.

[0014]

SUMMARY OF THE INVENTION It is an object of the present invention to realize a practical and reproducible electrostatic breakdown test apparatus by the device charging method. The most important thing in this electrostatic breakdown test equipment by the device charging method is that the capacitance of the test device itself is small, so the stray capacitance on the test equipment side should be made as small as possible to bring the charge amount of the test device closer to the actual environment. And assuming that the sample terminal is directly grounded to the ground, the stray inductance of the discharge circuit should be reduced. For this reason, it is necessary to devise new methods for fixing the sample and the structure of the probe part for charging and discharging.

[0015]

The electrostatic breakdown test apparatus for semiconductor devices according to the present invention is arranged so that X corresponding to the pin position of the sample.
Means for mechanically moving the probe part in the directions of the axes, Y-axis and Z-axis, means for moving the probe part up and down to control contact between the sample pin and the probe part, and closing the first switch in the probe part. By means of which a charge is charged between the pin of the sample and the ground, and a means for discharging the charged charge by closing the second switch in the probe section, the switch being separated from the means for controlling the opening and closing of the switch. It is configured so as to be positioned.

[0016]

According to the present invention, the probe portion corresponding to the pin position of the sample is provided, the switch for switching between charging and discharging is provided in the probe portion, and the means for driving the switch is provided at a position separated from the switch. As a result, the stray capacitance on the test equipment side and the inductance of the discharge circuit can be significantly reduced, and a practical electrostatic charging test device with good reproducibility has been realized.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram of an electrostatic breakdown test apparatus for a semiconductor device according to an embodiment of the present invention by a device charging method.

The controller 1 is a personal computer 5, a CRT 3,
The printer 7 and the like control the entire testing apparatus. It sets the test conditions for the electrostatic breakdown test, controls the execution of the test, and processes the test result data. The control bus 9 connects the controller 1 and each control unit. The position control of the probe unit 33 with respect to the X axis, the Y axis, and the Z axis is performed by the motor control 11 and the motor control 12. The motor control 11 drives the driver 17 and turns the stepping motor 27 to cause X
Control the position of the axis. Similarly, the driver 18 moves the stepping motor 28 to control the position on the Y axis. Z
As for the axis, the driver 19 from the motor control 12
By controlling the stepping motor 29 from Z
Control the position of the axis.

When the position control of the X-axis, Y-axis and Z-axis is completed, the operation of lowering the probe unit 33 to the pin to be tested is performed. In other words, the motor control 12
When the stepping motor 30 is rotated by 0, the probe portion 33 descends and the contact pin comes into contact with the pin of the semiconductor device (IC) of the sample 35 to be tested. The high voltage control 13 supplies the high voltage generator 22 with a power source for setting a high voltage for charging, and the set high voltage is high resistance 2
4. It is transmitted to the pins of the semiconductor device of the sample 35 to be tested through the probe section. In the semiconductor device of Sample 35, a high voltage is charged between the pin and GND 37. The timing control 14 generates a switch opening / closing signal inside the probe and a control signal for the high voltage generator. Probe part 3
3 contacts the pin of the semiconductor device of the sample 35, applies a high voltage to charge it, and then discharges the charge of the sample.

The above procedure is performed by a command from the controller 1 under the program control of a computer. That is,
First, information (test pin number, pin arrangement, charging voltage value, and other test conditions) necessary for the test is set in the controller 1.
Next, the controller 1 transfers this test condition to each control unit via the control bus 9. The designated pin is tested according to the above procedure according to the test conditions. Then, the operation under the set test condition is repeated until the operation is completed.

When performing a destructive test of a semiconductor device by electrostatic discharge, it is necessary to measure whether or not the semiconductor device is broken after a series of charge / discharge operations. Therefore, the sample is removed from the test equipment and measured with another measuring device. In some of the embodiments, the measuring function for detecting the breakdown depends on an external device, but the high voltage source connected to the probe unit is replaced with another switch as in the embodiment shown in FIG. 15 described later. By switching with and connecting the measuring device, it is also possible to self-store the measuring function for detecting the destruction inside the device. However, at this time, the measurement reference terminal (usually the ground pin of the sample in many cases) must be connected to the ground terminal of the measuring device.

The general test sequence is as follows. That is, a sample 35 of a semiconductor device to be tested is fixed on a ground electrode (GND) made of metal, a high voltage is applied to a pin to be tested for charging, and then rapid discharge is performed.
This charging / discharging is repeated a specified number of times. Next, the presence or absence of breakage is measured, and if it is broken, the test of the pin ends here, and the test is performed by moving to the next test target pin. If no breakdown is detected, increase the charging voltage and repeat the same test to search for a breakdown voltage.

When measuring the presence or absence of breakage with an external measuring device, it takes time to move the sample.
Instead of testing each pin individually, after discharging all the pins to be tested, similarly measure the presence or absence of destruction of all the pins to be tested. A sequence may be adopted in which the charging voltage is increased only for the pins that are not destroyed.

The position control of the probe portion with respect to the pin of the sample is performed by mechanically moving in the X-axis, Y-axis and Z-axis directions. The movement is performed using a ball screw and a stepping motor. The pin position of the sample is specified in advance in the operation area on the X-axis, Y-axis, and Z-axis, and the stop position of the probe unit is determined. When the pin position to be tested is detected, the probe is brought into contact with the terminal of the sample by the driver 20 and the stepping motor PROBE30.

FIG. 2 is an explanatory view of the probe section according to the first embodiment of the present invention. (A) is an explanatory view of the probe as seen from the front, and (B) is an explanatory view as seen from the side. A pseudo ground metal body 49 is mounted on the substrate 41. The pseudo ground metal body 49 has a sufficient volume to obtain the same effect as when the electric charge charged on the sample is discharged to the ground, and is a pseudo ground for making the size easy to move. A probe head 48 is mounted on the tip of the substrate 41 and contacts the pins of the sample of the semiconductor device to be tested. The high voltage enters the probe through the intake port 55 and the switch S ₂ 44 is closed to cause the probe head 4 to
Applied to the pins of the sample via 8. Charges on the semiconductor device of the sample is rapidly discharged against pseudo ground metal 49 by the switch S ₁ 43 is closed. The S ₂ relay coil 47 is for opening and closing the switch S ₂ , and similarly, the S ₁ relay coil 46 is for opening and closing the switch S ₁ .

The opening and closing control coil 53 according to the illustration as viewed from the side (B) as is clear switch S ₁ 51 is placed at a position spaced apart from the switch S ₁ 51. The switch S ₁ 51 is supported by the supports 57 and 58 and keeps the separated positions, and the switch S ₁ 51 is connected to the pseudo ground metal body 49 at the shortest distance. Switch S
_{The 1} is closed by the flow of current through the relay coil 53, while it is released by the disconnection of the current in the relay coil. Further, the same effect can be obtained by opening and closing the switch S ₁ by moving the permanent magnet closer to or further from the permanent magnet.

A mercury switch is used as the switch S ₁ . This is because when high voltage charging or discharging is carried out by mechanically contacting the sample terminal, spark discharge occurs at the time of contact and the contact portion is oxidized. In addition, the way of discharging varies depending on the ambient humidity and temperature. A mercury switch with high stability is used to avoid such effects. Further, in the case of the mercury switch, the opening / closing timing can be controlled electrically more easily than mechanical contact, and there is no chattering operation unlike the dry switch. The mercury switch is also an optimal switch for handling fast discharge current pulses of 1 ns or less. However, the invention is not limited to the use of mercury switches alone as these switches. Switch 5
1 is separated from the relay coil 53 which is the control means thereof in order to reduce the stray capacitance. Pseudo earth metal body 4
9 is arranged in the vicinity of the switch S ₁ in order to reduce the inductance of the discharge path. When a normal reed relay is used, the coil and switch are integrated, and the stray capacitance between contact grounds, contact coils, contact boards, etc. is large, and extremely small stray capacitance is required as in this device charging method. It is not practical for a device that does.

The pseudo ground metal body 49 is connected to the switch S ₁ via the low resistance body 39 in the immediate vicinity thereof. Both ends of the low resistance body are connected to a coaxial cable 40 for measuring the voltage. The resistance value of the low resistance body 39 is about 1Ω, and the coaxial cable having an impedance of 50Ω is used. The cable is connected to a waveform observing device such as an oscilloscope. By these means, it becomes possible to observe the current waveform when the sample is discharged.

FIG. 3 is an explanatory diagram of a probe head according to an embodiment of the present invention. A contact sensor section 66 is mounted on the tip of the probe head 65, and a contactor (contact pin) 67 is further mounted on the tip. A contact 67 and an electrode in the probe head 65 are brought into contact with each other inside the contact sensor section 66 by a spring. After the contactor 67 descends and contacts the pin 62 of the semiconductor device 61 of the sample, it further descends and the spring in the contactor contracts, and the contactor 67 makes electrical contact with the electrode inside the probe head 65. At that time, the sensor plate 69 moves upward and blocks the light of the optical sensor 68 to detect the contact. Such a structure is important for confirming the contact between the sample pin and the probe when the probe is brought into contact with the sample pin. This is because the sample pin actually changes its shape, and if a voltage is not applied after detecting whether or not the sample pin is contacted in the test, it is strong against electrostatic damage by applying a voltage even if it is not actually contacted. The result may be obtained. The position of the probe can be adjusted by the spring by appropriately determining the amount of movement of the Z axis according to the sample.

However, in the electrostatic breakdown test apparatus of the first embodiment described above, there is room for further improvement in order to accurately simulate the discharge phenomenon when the actual charged sample IC comes into contact with the metal conductor. There is. That is, since the electrostatic breakdown tester based on the device charging model handles the discharge phenomenon of the pulse in the microwave region, the path from the pin of the sample to the pseudo ground metal body that discharges the electric charge is shortened, and the inductance and capacitance can be obtained. It is necessary to reduce as much as possible.

That is, a contact sensor is attached to the tip of the probe of the test apparatus of the first embodiment in order to confirm the contact with the pin of the sample. This contact sensor has a problem that the discharge path from the sample pin to the pseudo ground metal body is lengthened. Also, a switch is used in the discharge path, and a coil is arranged in parallel with the switch as a means for driving the switch to form a magnetic circuit. In the actual discharge phenomenon, a phenomenon in which the charged sample IC comes into contact with a metal conductor or the like to cause discharge is considered. Therefore, the discharge path length and its stray capacitance must be made as small as possible.

Further, a low resistance body is provided between the pseudo ground metal body and the switch, and the voltage at both ends is taken out by the coaxial cable to observe the waveform during the electrostatic breakdown test. However, there is a problem in that when a pulse current in the Mylok wave region flows through the coaxial cable, the coaxial cable acts as if it were an antenna, a strong electromagnetic field is generated outside, and the surrounding circuits are adversely affected by noise.

In order to solve the problem of the first embodiment described above, in the electrostatic breakdown test apparatus for a semiconductor device of the second embodiment of the present invention, a pseudo ground metal body, a switch,
A probe head equipped with a pin socket accommodating a contact pin that comes into contact with the sample was attached to the device arm so as to be vertically movable with respect to the device arm, and a contact sensor was attached to the upper part of the device arm.
Further, the coil that drives the switch is arranged orthogonal to the switch, and the wiring board that supplies current to the coil is configured separately from the wiring board on which the switch is mounted. Furthermore, the coaxial cable for waveform observation, which is drawn out from both ends of the low resistance body, has an outer conductor embedded in the pseudo ground metal body. Also, the probe is
The device arm is equipped with a pulling means so that the weight of the pseudo-ground metal body does not overload the contact pin with the sample, and the pin socket mounted on the probe can replace the contact pin that contacts the sample. The configuration is as follows.

According to the second embodiment, since the contact sensor for detecting the contact with the sample pin is provided on the upper part of the apparatus arm, the conventional contact sensor is provided between the contact pin and the pseudo ground metal body. Compared with the conventional structure, the discharge path becomes shorter and the inductance decreases.
In addition, the coil that drives the switch is arranged in a direction orthogonal to the conventional coil that was arranged in parallel, so the wiring length around the switch is shortened, the inductance is reduced, and the discharge Moving the coil away from the path reduces the capacitance.
Further, by embedding the outer conductor of the coaxial cable drawn out from both ends of the low resistance body in the pseudo ground metal body, the electromagnetic wave emission from the coaxial cable is reduced and the noise exerted on the peripheral circuits is significantly reduced. Therefore, an electrostatic breakdown test apparatus based on a device charging model with high reproducibility and stability, which is closer to an actual discharge phenomenon, has been realized.

A second embodiment of a semiconductor device electrostatic breakdown test apparatus according to the present invention will be described below with reference to the accompanying drawings. FIG. 4 is an explanatory diagram of the probe section of the electrostatic breakdown test apparatus according to the second embodiment of the present invention. A probe unit 102 is attached to the device arm 101 so as to be movable up and down, and a pseudo ground metal body 103, a switch 104,
A low resistance body 112 and the like are mounted. A pin socket 105 is attached to the lower portion of the switch 104, and a contact pin 106 is attached to the tip of the pin socket 105. The contact pin 106 is for contacting a pin of a sample semiconductor device (IC). The electric charge charged on the sample IC passes from the contact pin 106 through the pin socket 105, the switch 104, and the low resistance body 112, and the pseudo ground metal body 1
Is discharged to 03.

The probe section 102 is provided with a movable body 108, and the guide rail 11 provided on the apparatus arm 101.
By 1, it can be moved up and down. In addition, the probe unit 10
In No. 2, the device arm 101 is pulled by the spring 109, the self-weight of the probe portion of about 300 g is pulled by the spring pressure of about 250 g, and a weight of about 50 g is applied to the pin of the sample IC. This is due to contact of the contact pin 106 of the probe section 102 with the pin of the sample IC,
This is effective for preventing the shape deformation of the pins of the sample IC due to excessive weight. A contact sensor 107 is provided on the upper part of the apparatus arm 101, and when the probe section 102 moves upward, the sensor plate detects the contact of the contact pin 106 with the sample IC by an optical sensor.

Next, this operation will be described. First, the device arm 101 moves to a predetermined pin position of the sample IC. The device arm 101 is connected to the probe unit 10.
When the contact pin 106 comes into contact with the pin of the sample IC, the probe unit 102 stops at that position, and the device arm 101 further lowers, so that the probe unit 102 moves up relative to the device arm 101. In the probe unit 102, the sensor plate of the contact sensor 107 detects the contact of the contact pin 106 with the pin of the sample IC by the photo sensor. With this structure, it is not necessary to insert a contact sensor in the discharge path of the probe tip of the first embodiment, and the length of the discharge path from the contact pin to the pseudo ground metal body can be shortened by 1 cm to 2 cm. ..

After the contact is detected, the sample IC is first charged by applying a high voltage to the pin of the sample IC as in the first embodiment. Next, the switch 104
Is closed, and the electric charge charged in the sample IC is discharged to the pseudo ground metal body 103.

The contact pin 106 is required to have various shapes due to the difference in the terminal structure of the sample IC. FIG. 7 is a perspective view showing the shapes of various contact pins. The test apparatus of the present embodiment employs a socket system in which these contact pins can be easily exchanged, so that the work of aligning the sample IC and the contact pin, which occurs when the pins are changed, becomes easy. Moreover, by using pins of the same length, the influence of the contact pin shape on the measurement data disappeared.

FIG. 5 is an illustration of the arrangement of relay coils. (A) is the first embodiment, and (B) is the second embodiment. In (A), the coil 113 is mounted on the probe wiring board 114, and the switch is the support 1
18 is fixed to the probe wiring board 114,
The coil 113 is arranged in parallel with the switch 104. The iron cores on both ends of the coil 113 are close to the leads on both ends of the switch, forming a closed magnetic circuit. On the other hand, in the second embodiment (B), the switch 1
The coil 113 is arranged orthogonal to 04.
Then, one end of the iron core of the coil 113 comes close to the switch 104 to open / close the switch 104. Also the coil 113
Is supported by the coil wiring board 115, and the wiring to the coil 113 is made on the coil wiring board 115 and separated from the wiring of the discharge path on the probe wiring board 114.

With this structure, the coupling of the magnetic circuit seen from the coil 113 is weakened, but the portions of the conventional switch facing the iron core of the electromagnet are omitted, and the wiring length is shortened. Further, the capacitance of the coil as seen from the switch side, which is the discharge path, is reduced. This improvement shortened the discharge path from the contact pin to the pseudo ground metal body by 1 cm to 2 cm. Furthermore, by separating the wiring board of the discharge path and the wiring board of the coil,
The influence of the pulse current in the microwave region flowing in the discharge path on the coil system was eliminated, and the stability of the test equipment was improved.

FIG. 6 is an explanatory view of the method of connecting and mounting the waveform monitoring coaxial cable of the second embodiment. From the pin of the sample IC via the switch 104 to the pseudo ground metal body 1
The discharge current discharged to 03 is observed by the voltage across the low resistor 112. Both ends of the low resistance body 112 are connected to the waveform observing coaxial cable 119, and the waveform of the discharge current can be measured by an oscilloscope or the like, which is an important point for the electrostatic breakdown test apparatus by the device charging model (CDM). However, simply connecting the waveform observation coaxial cable to both ends of the low resistance body 112, the vicinity of the entrance of the cable acts as an antenna and emits electromagnetic waves to the periphery, impairing the stability of the test apparatus. ..

As shown in FIG. 6, the outer conductor 120 of the waveform observing coaxial cable is embedded from the connection portion of the low resistance body 112 into the groove provided in the pseudo ground metal body 103 in advance. Further, a through hole may be provided in the ground metal body, and the outer conductor 120 of the coaxial cable may be embedded so as to penetrate the hole. By adopting this structure, the emission of electromagnetic waves from the vicinity of the entrance of the conventional cable is eliminated, noise is not given to the surroundings, and the stability of the test apparatus is improved. In addition, the outer conductor of the coaxial cable is a pseudo earth metal body 10.
Contacting 3 improved the distortion of the pulse waveform.

FIG. 8A is a perspective view of the test board of the second embodiment. The test (DUT) board is used to position the pins of the sample IC face up, fix the sample IC upside down, and position the pins of the sample IC. FIG. 8 (B) shows
It is sectional drawing of the principal part. The test board 130 has an insulating material 142 fixed to a metal frame 141.
42 is a back portion (front side) 132 of the sample semiconductor IC.
Is provided with a groove 135.

Abdominal part (back side) 133 of the sample semiconductor IC
Are fixed by the latch means 136. Latch means 1
36 is a sample I in which the pawl 137 is pulled by the spring 138 about the rotating shaft 139.
The belly part 133 of C is suppressed. The belly portion 133 of the sample IC is held down by the pawl 137, so that the sample IC is fixed to the test board 130 and its pins are positioned. The latch means 136 opens the latch by turning the knob 144, removes the sample IC from the groove 135,
Alternatively, it can be newly mounted in the groove 135. That is, when the knob 144 is turned, the pawl 137 rotates about the rotation shaft 139, and the tip of the pawl 137 is the sample I.
By pushing the knob 144 away from the belly portion 133 of C, the pawl 137 is moved inward and is fixed by the rotation shaft stopper stopper. Therefore, the sample IC can be freely removed from the groove 135 or newly inserted into the groove 135.

Test board alignment pinhole 143
Is for accurately positioning the pins of the sample IC with respect to the test apparatus. That is, in order to accurately move the probe unit in the X-axis, Y-axis, and Z-axis corresponding to the pin position of the sample IC, the absolute coordinates of the pin position of the sample IC in the test apparatus are necessary. The absolute coordinate of the pin position in the test apparatus is the absolute coordinate of the pin position of the sample IC with respect to the alignment pinhole 143 of the test board, and the absolute coordinate of the pin position of the guide pin of the test apparatus in which the pinhole 143 of the test board fits. Is required.

FIG. 9A is a plan view of the test board of the QFP type package, and FIG. 9B is a sectional view of the main part. Q
In the FP type package, pins are arranged in four directions, and the pins 131 are bent and extended obliquely as shown in FIG. 9B. The pin width is as narrow as 0.2 mm, the pin pitch is as small as 0.5 mm, and the pin density is very high. Therefore, it is impossible to directly fix the belly portion 133 of the sample IC with the pawl 137 as shown in FIG.

Therefore, in the latch mechanism of the QFP type package, the pressing plate 14 having the through hole 147 made of a transparent insulating material is used.
The pin 131 of the sample IC is fixed by 6 and the pressing plate 14
It is an indirect means for fixing 6 by a pawl 137.
The through hole 147 is for receiving the contact pin of the probe portion which comes into contact with the pin 131 of the sample and for preventing the contact pin from escaping.

The width of the pin 131 is TQFP type or TSOP type.
Type package has a pitch of 0.2 mm and a pitch of 0.2 mm.
The diameter of the contact pin is 0.2mm because it is as small as 5mm.
There is no choice but to use φ. Therefore, when the probe portion is lowered and the contact pin comes into contact with the pin 131 of the sample IC, the contact pin slides on the surface of the pin 131 of the sample IC and tries to escape. However, the contact pin is prevented from escaping due to the through hole 147 having a diameter of about 0.3 mm, and it is possible to accurately contact the pin 131 of the sample.

The pawl 137 is supported by a rotatable latch mechanism, and the tab 144 of the test board 130 is used.
The pawl 137 is opened by rotating the
46 can be removed and the sample IC can be taken out or newly inserted. In addition, the back portion 132 of the sample IC has a groove 135.
The fact that they are fitted and fixed by is similar to the embodiment shown in FIG.

As described above, the groove is formed by QFP, SOJ, PLC.
It is manufactured according to the package shape of various ICs such as C and PGA. By fixing the sample IC in this way, it is possible to accurately align the sample socket without using a socket for measurement. Therefore, an electrostatic breakdown test using a device charging model is performed on-site for sample ICs having various shapes. It is possible to measure under conditions that are close to typical conditions.

FIG. 10 shows a flow chart of the pin alignment of the sample IC by this test apparatus. First test (DU
T) The back part 132 with the pins of the sample IC facing upward on the board
Is fitted in the groove 135, and the belly portion 133 of the sample IC is held by the claw 137 by the locking means to fix (mount) the sample IC. Next, the test board is inserted into the test apparatus, and the alignment pin holes 143 are fitted with the pins provided on the test apparatus, whereby the test board is accurately aligned with the test apparatus.

Next, the pin position of the sample IC is mechanically fixed (X, Y, Z axes). The coordinates of the pin position of the sample IC to be tested are specified. The mechanism that mechanically moves the probe unit in the X-axis and Y-axis directions corresponding to the pin position of the sample registers the pin position of the sample fixed on the test board in the computer program, and the program of this computer Driven.

The computer program for registering the pin position of the sample IC is XY of the pin position of the arbitrary sample IC.
A numerical input program capable of numerically inputting the absolute value of the coordinate, and inputting the absolute value of the XY coordinate of the pin position by moving the contact pin of the probe unit and aligning it with the pin position of the sample IC. It is possible to provide a probe movement type program and a library of pin positions according to the presumed shape of the sample IC, and read and use the relative value of the XY coordinates of the pin position of the sample IC to be tested. And a library type program.

FIG. 11 shows a screen display example of the numerical input type program on the CRT 3 of FIG. The input of the relative position of each pin with respect to one pin which is a reference pin is registered by the computer 5 by specifying the coordinates of the pin position in the test device, that is, the mechanical position, in the program of the computer.
For the position of pin 1 which is the reference pin, the position expected from the position on the test board is input in advance. If the position of pin 1 does not match in the actual test, it is possible to re-input.

FIG. 13 shows a screen display example of the CRT 3 of the library type program. (A) is a case of a DIP type IC, and (B) is a case of a QUAD type IC. Since the shape, the number of pins, and the pin positions of the sample IC to be tested by this test apparatus are various, it is difficult to input the pin position numerically for each test. Therefore, a standard sample IC
A library-type program that numerically inputs the pin position of the shape and the number of bins is provided. The user can use the pin position information by selecting the sample IC registered in the library type program from the library type program. Unregistered sample ICs can be registered by the above-mentioned numerical value input program and added to the library type program. This library type program is stored on a floppy disk or hard disk.
It can be easily used for another test.

Returning to the flowchart of FIG. 10, the sample IC
When the pin position is specified, the probe unit of the test apparatus is driven in the X, Y, and Z directions according to the registered program, and the position is detected at the pin position registered in the program. This position detection is performed visually and by an electric means described later.

When the pin of the sample IC is bent, the pin position differs from the pin position calculated from the standard table or the like. In such a case, the contact pin of the probe portion may not come into contact with the pin of the sample IC. Such a non-contact pin is detected and displayed on the CRT 3. Then, the correct pin position is manually determined and registered in the program.

A probe movement type program is used in such "manual position determination and registration". FIG. 12 shows a CRT screen display example of the probe movement type program. The pin position read from the library type program or registered in the numerical input type program is displayed in the table column, and the probe automatically moves to the registered pin position. When the position of the sample pin and the position of the contact pin of the probe are not aligned, the arrow keys of the personal computer 5 are used to move the probe by a small distance in the X, Y, and Z directions. The probe position is displayed on the screen, and when the pin of the sample and the contact pin of the probe unit match, the coordinate of the probe position is registered in the coordinate of the table. By performing this operation for each pin, the actual pin position for a bent pin or the like can be registered in the program. In this probe movement type program, since the pin position of the sample IC is actually indefinite due to bending, twisting, etc., the sample I of any shape can be used.
It is applicable to C, has high versatility, and is practical.

According to the flow chart of FIG. 10, the sample IC
When the setting of the pin position of the test device to the test device is completed, the probe part of the test device moves to each designated pin, and the probe part is lowered to bring the contact probe into direct contact with the pin of the sample IC, so that the sample IC A test based on a device charging model (CDM) for charging and discharging is performed.

A portion of the test board comprises means for grounding any pin of the sample IC. This means is shown in FIG.
One end of a metal grounding rod is pressed against the side surface of the pin of the sample IC on the test board shown in FIG.
When not in use, it is stored in the insulating material 142.

FIG. 14 is a circuit diagram for confirming contact of the probe portion with the sample IC pin. First, the metal grounding rod 150 is pressed against the Vcc pin or Vss pin serving as the measurement reference pin to ground. The contact pin of the probe part is lowered and brought into contact with the pin of the sample IC to be tested. Then, the clamp voltage value and the positive and negative constant current values are set and output. The voltage of the contact pin is measured, compared with the reference voltage, and the output signal of the comparator is latched by the strobe signal, GO / NG
To detect. That is, if the contact pins are in proper contact, the potential of the contact pin is P when a constant current is applied.
The value becomes a predetermined low value due to the N-junction, and if not properly contacted, a resistance component is generated and the potential of the contact pin becomes high. It is possible to electrically confirm the contact of the contact pin of the probe section with the sample IC pin by making a comparison using a comparator with a constant threshold.

Further, by providing the test board with means for grounding an arbitrary pin of the sample IC, it is possible to judge the destruction in the state where the sample IC is mounted on the test board. FIG. 15 is a circuit diagram for determining the destruction of the sample IC. First, turn on the switches k ₁ and k ₄ with the metal ground rod 150 removed.
Then, a high voltage is applied to the sample IC to charge it. Then k
Turn on ₅ to discharge the electric charge. Thereafter, the ground rods 150 of the metal push addressed grounded to pin metric, k ₂ or k _3, and k ₄ is ON perform fracture determination. Destruction judgment is k
_{When 2} is turned on, it is determined by a DC measuring device, for example, by applying a DC voltage and the presence or absence of a DC current, and when k ₃ is turned on, it is determined by a curve tracer monitor.

FIG. 16 is an explanatory diagram of the charging voltage measurement.
A part of the test board has a charging voltage measuring function to confirm whether the sample IC is properly charged.
The test board includes a probe 161 connected to the surface electrometer 160, and the probe 161 is supported by a holding jig 162 at a certain distance from a pin of the sample without contact. Therefore, when the probe unit 102 descends and comes into contact with the sample IC, the switch in the probe unit is closed, and the sample IC is charged, the charging voltage can be monitored by the surface electrometer 160 without contact. In this test apparatus in which the movement and contact of the probe unit and the charging and discharging of the sample IC are automatically performed, it is useful to be able to monitor that the sample IC is correctly charged.

FIG. 17 is a circuit diagram for confirming the discharge waveform. In the embodiment of the test apparatus, the discharge waveform of the sample IC can be confirmed without monitoring with an oscilloscope. That is, the high speed comparator 1 is connected to the coaxial cable drawn from both ends of the low resistance body 112 of the probe unit 102.
The high-speed comparator 164 detects the discharge pulse current flowing through the low resistance body 112.

The operation of confirming the discharge waveform will be described below. First, the probe unit 102 contacts a pin of the sample IC to be tested, and a high voltage is applied to the sample IC to charge it. Next, the sample IC is discharged by closing the switch of the probe unit 102, and a pulse discharge current of about 1 nS flows through the low resistance body (1Ω) 112. The coaxial cable drawn from both ends of the low resistance body 112 is connected to an ultra-high speed comparator 164 operable for an ultra-high speed pulse of about 1 nS, and the discharge pulse is compared with a reference voltage. If the discharge pulse is equal to or higher than the reference voltage, it is determined that the discharge pulse is correct, after latching, the LED lamp is turned on and the discharge pulse is confirmed.
With such a circuit, the discharge waveform can be confirmed without using an expensive ultra-high-speed oscilloscope capable of observing a waveform of about 1 nS.

FIG. 18 is an explanatory diagram of contact confirmation by a fiberscope. A fiberscope 166 is attached to an apparatus arm of the test apparatus, and one end of the fiberscope 166 is supported by a support 168 so that a contact pin of the probe unit 102 is directed to a portion in contact with the pin of the sample IC. An objective lens is provided at the tip of the fiberscope 166, and the contact portion is enlarged to enter the visual field. The other end of the fiberscope is connected to the CCD sensor 167, and the video signal converter 169 outputs the image signal to the TV monitor.

Therefore, the state in which the contact pin of the probe section 102 comes into contact with the pin of the sample IC is enlarged through the fiberscope 166 and is projected on the TV monitor. On the other hand, the shape and pin position of the sample IC to be tested are also displayed on the TV monitor in accordance with the above-mentioned library type program. Therefore, the user of this test equipment is
On the V monitor screen, the pin position during the test and the contact state of the contact pin can be visually confirmed on the enlarged screen.

FIG. 19 is an explanatory diagram of a test board provided with an intermediate ground for observing the discharge waveform. The test board includes
A metal body 151 serving as an intermediate ground is fixed to an insulator 142 that contacts the back portion 132 of the sample IC. The back surface of the metal body 151 has a plurality of (for example, four) low resistance bodies 1.
It is connected to the ground metal plate 153 which is a GND plane via 52. The resistance value of the plurality of low resistance bodies is about 1Ω as a whole. The low resistance body is connected to a coaxial cable 154 such as a semi-rigid cable that measures the voltage across the low resistance body, and the waveform of the discharge current flowing through the low resistance body is observed with an oscilloscope or the like. The center conductor of the coaxial cable is fixed to the back surface of the center of the back portion of the sample IC of the metal body 151, and the low resistance bodies 152 are arranged at equal intervals around the center conductor of the coaxial cable.

FIG. 20 is an explanatory view of another embodiment in which an intermediate earth for observing the discharge waveform is provided. The test board includes
The metal body 151, which serves as an intermediate ground, and the ground metal plate, which is a GND plane, are connected by a conductor 163, and the discharge current flowing through the conductor 163 is detected by a current probe 170 coupled to the conductor 163. The waveform of the discharge current detected by the current probe is observed by an oscilloscope or the like connected to the coaxial cable 154.

In the case where the capacitance of the sample IC becomes extremely small, the above-mentioned probe section is provided with a low resistance element, and the discharge current of the electric charges charged in the sample IC flowing through the low resistance element of the probe section is observed. The floating capacitance of the probe part becomes a problem. The test board provided with the intermediate ground shown in FIG. 19 and FIG. 20 makes it possible to observe a more accurate discharge waveform of the charges charged in the sample IC, which eliminates the problem of the stray capacitance of the probe unit described above.

Although the above description is about the electrostatic breakdown test apparatus using the device charging model (CDM), the test including means for grounding an arbitrary pin of the sample IC shown in FIGS. 14 and 15. By using the board in combination with the test apparatus of this embodiment, it is possible to reduce the size and performance of the capacitor charge / discharge type electrostatic breakdown test apparatus described in the prior art.

For example, when a sample IC having several hundred pins is mounted in a socket and a capacitor charging / discharging type test pulse is applied to each pin, conventionally, charging / discharging is performed from each pin in order to select each pin to be tested. It was necessary to make a test device with about 1,000 relays connected in series and parallel between the capacitors for use.
Such connection of about 1,000 relays makes the test apparatus large and expensive.

However, according to this test apparatus, the sample I
Selection of the C pin is performed by the probe unit that is spatially movable in the X, Y, and Z directions. Therefore, as shown in FIG. 22, by connecting a charging / discharging capacitor C _O and charging / discharging resistance R ₁ and R ₂ circuits to the probe unit, the present test apparatus is of the capacitor charging / discharging type described in the prior art. It can be an electrostatic breakdown test device. Since such a capacitor charge / discharge type electrostatic breakdown test device does not require a huge relay circuit for selecting each pin, it contributes to downsizing, cost reduction and high reliability of the device. Further, since the discharge pulse signal can be applied to the pin of the sample IC at the shortest distance, the test performance is improved.

[0075]

As described above in detail, according to the present invention, a practical electrostatic breakdown test apparatus having high reproducibility by the device charging method was realized.

Although the performance of semiconductor devices is improving more and more, semiconductors are extremely vulnerable to electrostatic stress and cause internal damage or deterioration. The present apparatus can evaluate such a semiconductor electrostatic breakdown phenomenon with high reproducibility.

As automation progresses in the assembly process, inspection process, transfer process, etc. of semiconductor devices, a lot of electrostatic troubles are occurring. It is considered that most of the obstacles are generated when the semiconductor device itself is charged and the charge is discharged by contacting a machine or the like. It is considered that the electrostatic breakdown phenomenon, which is different from the conventional human body model method and mechanical model method, is increasing more and more. As a test device by the optimum device charging method that can be correlated with these destruction phenomena, a practical device that has been greatly required by both the manufacturer of the device and the user of the device has been realized. Furthermore, various integrated circuit manufacturing apparatuses and the like have appeared due to advances in fine processing technology for semiconductor devices. Also, the method of encapsulating semiconductor elements has been diversified, and the types and shapes of sample ICs and the differences in the number of pins are diversified. IC with the same chip
If the size of the sample IC is changed, the capacity of the sample IC is changed to affect the destruction phenomenon, the breakdown voltage and the like. The present apparatus can stably and efficiently measure the electrostatic breakdown voltage even with such a difference in sample ICs.

[Brief description of drawings]

FIG. 1 is a block diagram of an electrostatic breakdown test apparatus for a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram of a probe unit according to the first embodiment of this invention.
(A) is an explanatory view of the probe seen from the front, and (B) is an explanatory view seen from the side.

FIG. 3 is an explanatory diagram of a probe head according to the first embodiment of the present invention.

FIG. 4 is an explanatory diagram of a probe unit according to a second embodiment of the present invention.

FIG. 5 is an explanatory diagram of arrangement of relay coils. (A) First embodiment, (B) Second embodiment.

FIG. 6 is an explanatory diagram of a waveform monitor coaxial cable according to a second embodiment of the present invention.

FIG. 7 is a perspective view showing shapes of various contact pins.

FIG. 8 is a perspective view of a test board according to a second embodiment of the present invention.

9A is a plan view of a test board of a QFP type package, and FIG. 9B is a cross-sectional view of a main part thereof.

FIG. 10 is a flowchart for confirming the position of the sample IC.

FIG. 11 is an explanatory diagram of a screen display of a numerical input type program.

FIG. 12 is an explanatory diagram of a screen display of a probe movement type program.

FIG. 13 is an explanatory diagram of a screen display of a library type program.

FIG. 14 is a circuit diagram for confirming contact of the probe section with the sample IC pin.

FIG. 15 is a circuit diagram for confirming destruction of the sample IC.

FIG. 16 is an explanatory diagram of measurement of charging voltage of a sample IC.

FIG. 17 is a circuit diagram for confirming a discharge waveform.

FIG. 18 is an explanatory diagram of contact confirmation by a fiberscope.

FIG. 19 is an explanatory diagram of a test board provided with an intermediate ground.

FIG. 20 is an explanatory view of another embodiment of the test board provided with the intermediate ground.

FIG. 21 is a circuit diagram of a conventional electrostatic breakdown test apparatus using a device charging method.

FIG. 22 is an explanatory diagram of a capacitor charge / discharge type electrostatic breakdown test device.

[Explanation of symbols]

 27, 28, 29 Stepping motor 30 Stepping motor for probe 33 Probe section 35 Sample IC 37 Ground 43, 44, 51 Switch 46, 47, 53 Relay coil 49 Pseudo earth metal body 66 Contact sensor section 67 Contactor 68 Optical sensor 69 Sensor plate 101 Device arm 102 Probe portion 103 Pseudo earth metal body 104 Switch 105 Pin socket 106 Contact pin 107 Sensor 108 Movable body 109 Spring 111 Guide rail 112 Low resistance body 130 Test board 131 Test IC 131 Pin back of sample IC 133 Abdominal part of sample IC 135 Groove 136 Latch means 137 Pawl 138 Spring 139 Rotating shaft 141 Metal frame 142 Insulating material 143 Positioning pinhole 144 Knob 46 Presser plate 147 Through hole 150 Metal ground rod 151 Metal body 152 Resistor 153 Ground metal plate 154 Coaxial cable 160 Surface potential meter 161 Probe 162 Holding jig 164 High speed comparator 166 Fiberscope 167 CCD sensor 168 Support 169 Video signal conversion 170 Current probe

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Isofuku Satoshi Toru Satoshi Tokyo 4642 Taniho National City Daiichi Niseki Building Tokyo Electronic Trading Co., Ltd.

Claims (21)

[Claims] 1. An X-axis, a Y-axis corresponding to a pin position of a sample,
A means for mechanically moving the probe part in the Z-axis direction, a means for lowering the probe part with respect to the pin position of the sample so as to directly contact the pin of the sample, and a sample by closing the first switch in the probe part. Means for charging an electric charge from a high-voltage power supply between the pin of the
And a means for discharging the electric charge charged between the pin and the ground by closing the switch of the semiconductor device, the switch being located apart from the means for controlling the opening / closing of the switch. Electrostatic breakdown test equipment. 2. The electrostatic breakdown test apparatus for a semiconductor device according to claim 1, wherein the switch is a mercury switch. 3. The electrostatic breakdown test of the semiconductor device according to claim 2, further comprising means for detecting that the probe of the probe section, which comes into contact with the sample pin, comes into contact with the sample pin. apparatus. 4. The pseudo earth metal body for holding a temporarily discharged electric charge before the electric charge charged on the sample is discharged to the actual earth, and the probe unit is built in. 3. An electrostatic breakdown tester for semiconductor devices of 3. 5. The pseudo ground metal body is connected to the second switch via a low resistance body arranged in the vicinity thereof, and the low resistance body has means for measuring the voltage across the second switch. The electrostatic breakdown test apparatus for a semiconductor device according to claim 4, which is provided. 6. The probe unit is attached so as to be movable up and down with respect to an apparatus arm, and a pin socket for accommodating a contact pin connected to the switch and contacting a sample is mounted at a tip of the probe unit, 2. The electrostatic breakdown test apparatus for a semiconductor device according to claim 1, wherein a sensor is attached to an upper part of the apparatus arm, and the contact of the contact pin with the sample is detected by moving the probe unit up and down. 7. A coil for driving the switch is arranged orthogonal to the switch, and a wiring board for supplying a current to the coil is formed separately from a wiring board on which the switch is mounted. 7. The electrostatic breakdown test apparatus for a semiconductor device according to claim 6, wherein: 8. The coaxial cable drawn out from both ends of the low resistance body for measuring the voltage across the low resistance body has an outer conductor embedded in the pseudo ground metal body. Item 5. The electrostatic breakdown test apparatus for semiconductor devices of item 5. 9. The semiconductor device according to claim 6, wherein the probe unit is provided with a pulling unit with respect to the apparatus arm, and the weight of the probe unit prevents the contact pin from coming into contact with the sample. Device electrostatic breakdown tester. 10. The electrostatic breakdown test apparatus for a semiconductor device according to claim 6, wherein the pin socket mounted on the probe unit is capable of exchanging the contact pin in contact with a sample. 11. A test board for fixing the sample upside down with the pins of the sample facing upward, wherein the test board has a groove for fitting a back portion of the sample and the sample in the groove. 7. An electrostatic breakdown test apparatus for a semiconductor device according to claim 6, further comprising latch means that can be fixed and taken out. 12. The electrostatic breakdown test apparatus for a semiconductor device according to claim 11, wherein the latch means holds the antinode portion of the sample by a rotatable claw. 13. The latch means fixes a holding plate having a through hole by a rotatable pawl, and the holding plate holds a pin of a sample, and the through hole has a contact pin of a probe section. 12. The electrostatic breakdown test apparatus for a semiconductor device according to claim 11, wherein the device is inserted. 14. The X-axis corresponding to the pin position of the sample,
The means for mechanically moving the probe part in the Y-axis and Z-axis directions and the means for lowering the probe part with respect to the pin position of the sample to directly contact the pin of the sample are the sample fixed to the test board. 12. The electrostatic breakdown test apparatus for a semiconductor device according to claim 11, wherein the pin position is registered in a computer program, and the pin position is driven by the computer program. 15. A computer program for registering the pin position of the sample is an XY of the pin position of an arbitrary sample.
Numerical input type program that can input relative values of coordinates numerically, and input absolute value of XY coordinates of pin position by moving the contact pin of the probe part and aligning with actual pin position of sample. A library that can be used to read the relative value of the XY coordinates of the pin position of the sample to be tested by providing a probe movement type program that can be performed and a library of pin positions according to the assumed shape of the sample in advance. 15. The electrostatic breakdown test apparatus for semiconductor devices according to claim 14, further comprising a mold program. 16. The test board comprises means for grounding any pin of the sample.
Electrostatic breakdown test equipment for semiconductor devices. 17. The test board includes a probe connected to a surface electrometer, the probe being supported by a holding jig in a non-contact manner with respect to a pin of the sample, and the charging voltage of the pin of the sample is measured on the surface. 15. The electrostatic breakdown test apparatus for a semiconductor device according to claim 14, which can be measured in a non-contact manner by an electrometer. 18. The semiconductor device according to claim 8, wherein a high speed comparator is connected to the coaxial cable led out from both ends of the low resistance body, and the discharge pulse current flowing through the low resistance body is detected by the high speed comparator. Device electrostatic breakdown tester. 19. The semiconductor device according to claim 6, wherein a fiberscope is attached to the apparatus arm, and one end of the fiberscope is directed to a portion where a contact pin of the probe unit contacts a pin of a sample. Electrostatic breakdown test equipment. 20. The test board includes a metal body that contacts the back portion of the sample, the back surface of the metal body being connected to a grounded metal plate through a plurality of low resistance bodies, and the back surface of the metal body. 12. The electrostatic breakdown test apparatus for a semiconductor device according to claim 11, wherein the vicinity of the center is connected to the center conductor of a coaxial cable that measures the voltage across the low resistance body. 21. The test board includes a metal body that contacts a back portion of the sample, the back surface of the metal body is connected to a grounded metal plate through a conductor, and a discharge current flowing through the conductor is 12. The electrostatic breakdown test apparatus for a semiconductor device according to claim 11, wherein the electrostatic breakdown test is performed by a current probe connected to a conductor.