JPH05176265A - Malfunction prevention circuit for pulse width modulation circuit - Google Patents

Abstract

PURPOSE:To prevent malfunction by stopping supply of power to a pulse width modulation circuit for a prescribed period when an excess current flows to a power line of the pulse width modulation circuit. CONSTITUTION:A malfunction prevention circuit is provided between an IC power input side connection terminal 22 and an IC power output side connection terminal 23 of a pulse width modulation circuit. When an excess current detection resistor 24 detects an excess current in the malfunction prevention circuit, a transient voltage change obtained by a voltage conversion resistor 26 is inputted to a monostable multivibrator 28. The operation of transistors(TRs) 29-31 forming the power supply stop circuit is controlled with an output pulse of the monostable multivibrator to stop the supply of power for a prescribed period thereby preventing malfunction of the pulse width modulation circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention displays a plurality of scanning lines by vertically deflecting each electron beam when a screen on a screen is divided into a plurality of sections in the vertical direction, and a television as a whole. The present invention relates to a malfunction prevention circuit of a pulse width modulation circuit of a device that displays an image.

[0002]

2. Description of the Related Art A basic configuration example of a conventional image display device is shown in FIG. 2. This image display device comprises a back electrode 1, a line cathode 2 as a beam source, in this order from the rear to the anode side.
A beam extraction electrode 3, a beam flow control electrode 4, a focusing electrode 5, a horizontal deflection electrode 6, a vertical deflection electrode 7, a screen plate 8 and the like are arranged at appropriate intervals, and these are arranged inside a vacuum container (not shown). It is stored in.

The above-mentioned linear cathode 2 as a beam source is stretched in the horizontal direction so as to generate an electron beam linearly distributed in the horizontal direction. The linear cathodes 2 are further arranged at intervals in the vertical direction ( In FIG. 2, only 7 of 2 a to 2 g are illustrated.) In this configuration example, the spacing between the line cathodes 2 is 3 mm, and the number of the line cathodes 30 is 30, and the line cathodes 2 are 2a to 2m. The distance between the line cathodes 2 cannot be set freely, and is regulated by the distance between the vertical deflection electrode 7 and the screen plate 8 which will be described later. As the structure of these wire cathodes 2, an oxide cathode material is applied to the surface of a tungsten rod having a diameter of 10 to 30 μm. Further, as will be described later with reference to FIG. 4, the line cathode 2 is controlled so as to sequentially emit an electron beam from the upper line cathode 2a to the lower line cathode 2m for a fixed period of time.

Next, the back electrode 1 not only prevents the generation of electron beams from other line cathodes but also pushes out the electron beams only toward the anode.
Although the vacuum container is not shown in FIG. 2, the back electrode 1 may be used to form a structure integrated with the vacuum container. Further, the beam extraction electrode 3 is a conductive plate 3A having a plurality of through holes 3a arranged in a row in the horizontal direction facing each of the line cathodes 2a to 2m at regular intervals, and the electrons emitted from the line cathode 2 are emitted. The beam is taken out through the through hole 3a.

Next, the beam flow control electrode 4 is connected to the line cathodes 2a to 2b.
It is composed of a vertically long conductive plate 4A having a through hole 4a at a position opposed to each of the squares, and a plurality of the conductive plates 4A are arranged side by side in the horizontal direction at a predetermined interval. 12 in this configuration example
0 control electrode conductive plates 4A _{1 to} 4A _n are provided.
(In FIG. 2, only eight are shown). Further, the beam flow control electrode 4 synchronizes the passing amount of each of the electron beams horizontally divided by the beam extraction electrode 3 in correspondence with the picture element of the video signal and in synchronization with the horizontal deflection timing described later. Have control.

Next, the focusing electrode 5 is provided with a through hole 5a at a position facing each through hole 4a provided in the beam flow control electrode 4.
Which is a conductive plate 5A having:
The electron beam is focused.

Next, the horizontal deflection electrode 6 is composed of a plurality of conductive plates 6A and 6A 'vertically arranged along both sides of the through hole 5a in the horizontal direction, respectively. A horizontal deflection voltage is applied to the conductive plates 6A and 6A '. As a result, the electron beam for each picture element is deflected in the horizontal direction, and R, G, B on the screen plate 8 is deflected.
The phosphors are sequentially irradiated to emit light, and in the present configuration example, each electron beam is deflected by 2 trio.

Next, the vertical deflection electrode 7 is located at an intermediate position in the vertical direction with respect to the through hole 5a of the focusing electrode 5, and a plurality of conductive plates 7A are arranged in the horizontal direction.
7A ', a voltage for vertical deflection is applied,
The electron beam emitted from the line cathode 2 is vertically deflected. In this configuration example, the electron beam generated from one linear cathode 2 is vertically deflected by eight lines by the pair of conductive plates 7A and 7A '. The vertical deflection electrode 7 composed of 31 pieces constitutes 30 pairs of vertical deflection conductors corresponding to the respective 30 line cathodes, and the screen plate 8
240 horizontal scanning lines are drawn in the vertical direction.

The horizontal deflection electrode 6 and the vertical deflection electrode 7 described above are arranged in a plurality of comb shapes. Further, by setting the distance to the screen plate 8 longer than the distance between the horizontal and vertical deflection electrodes, it becomes possible to irradiate the screen plate 8 with an electron beam with a small deflection amount. Thereby, horizontal and vertical co-deflection distortion can be reduced.

Further, as shown in FIG. 2, the screen plate 8 is formed by applying the phosphors 10 on the back surface of the glass plate 9 in stripes. Although not shown, metal back and carbon are also applied. The phosphor 10 is provided so as to horizontally irradiate the electron beam passing through one through hole 4a of the beam flow control electrode 4 to irradiate the phosphor pairs of three colors of R, G and B for two trio. And is applied in stripes in the vertical direction.

The broken lines shown on the screen plate 8 indicate vertical divisions displayed corresponding to the plurality of line cathodes 2, and the two-dot chain line corresponds to each of the plurality of beam flow control electrodes 4. Shows the horizontal divisions displayed. An enlarged view of one section partitioned by these broken lines and two-dot chain lines is shown in FIG.
Shown in.

That is, as shown in FIG. 3, the phosphors of R, G, and B for 2 trios in the horizontal direction x and the width for 8 lines in the vertical direction y are provided. In this configuration example, the size of one section is 1 mm in the horizontal direction and 3 mm in the vertical direction.

R, G in the screen plate 8 described above,
Although the phosphors 10 of three colors B are illustrated in stripes, some phosphors 10 may be arranged in a delta shape. However, when they are arranged in a delta shape, it is necessary to apply horizontal deflection and vertical deflection waveforms suitable for them.

Note that, in FIG. 2, the vertical and horizontal dimensional ratios are different from the image actually displayed on the screen for convenience of explanation.

In this configuration example, two R, G, and B phosphors are provided for one through hole 4a of the control electrode 4 for one trio, but for one trio or three trio or more. There are also things. However, 1 trio for the control electrode 4,
Alternatively, it is necessary to sequentially apply R, G, and B video signals of 3 trios or more and perform horizontal deflection in synchronization with them.

FIG. 4 shows an example of a drive circuit for driving the image display device shown in FIG. 2, and FIG. 5 shows a timing chart of each circuit. First, the drive part for irradiating the screen plate 8 with an electron beam and displaying the screen will be described.

The power supply circuit 11 is a circuit for applying a predetermined bias voltage to each electrode of the image display device. The back electrode 1 is V1, the beam extraction electrode 3 is V3, the focusing electrode 5 is V5, and the screen plate. A DC voltage of V8 is applied to each of them.

The line cathode drive circuit 12 inputs the vertical synchronizing signal V and the horizontal synchronizing signal H shown in (1) of FIG. 5 to the pulse generating circuit 14, and using both signals V and H, (2) of FIG. The line cathode drive pulse (i-ma) shown in () is created. Each of the wire cathodes 2a to 2m is heated by a current flowing while the drive pulse is at a high potential as shown by 12a in FIG.
The heating state is maintained such that (i) to (e) emit electrons during the low potential period.

As a result, 30 wire cathodes 2a to 2m
The electron beam is emitted only during the 8 horizontal scanning periods in which the low-potential drive pulses (a to m) are applied. Further, during the period in which the high potential is applied, the potential is applied to the line cathodes 2a to 2m more than the potential around the line cathode 2 determined by the bias voltage applied to the back electrode 1 and the beam extraction electrode 3. The electron beam is not emitted from the line cathode because the potential is higher. In this case, in order to form one screen, the potentials are sequentially switched every 8 scanning periods from the upper line cathode 2a to the lower line cathode 2m.

Next, the deflecting portion will be described. The deflection voltage generation circuit 13 includes a direct memory access controller (hereinafter referred to as a DMA controller) 13A, a deflection voltage waveform storage memory (hereinafter referred to as a deflection memory) 13B, and a digital-
The horizontal deflection signals h and h'and the vertical deflection signals v and v'shown in (3) and (4) of FIG. 5 are constituted by analog converters (hereinafter referred to as D / A converters) 13h and 13v. Occur.

In this configuration example, the vertical deflection signals v, v '
With regard to, regarding the overscan, 240 horizontal scanning periods are displayed in one field. Also, the memory address area storing the vertical deflection position information corresponding to each line is divided into a first field and a second field, and each has a set of memory capacity. When displaying, read the data from the corresponding deflection memory 13B and
The A converter 13v converts the signal into an analog signal and applies the vertical deflection signals v and v'to the vertical deflection electrode 7 (conductive electrodes 7A and 7A ').

Further, the vertical deflection position information stored in the deflection memory 13B is composed of substantially regular data every 8 horizontal scanning periods, and the waveform converted into an analog signal by the D / A converter 13v is also included. Vertical deflection signals v, v'of approximately eight stages
However, as described above, the memory capacity for two fields is provided so that the position can be finely adjusted for each horizontal scanning line.

Regarding the horizontal deflection signals h and h ', 1
A memory is provided so that the electron beam needs to be horizontally deflected in six steps in the horizontal scanning period and the deflection position can be finely adjusted for each horizontal scanning. Therefore, to display 480 horizontal scanning periods in one frame, a memory of 480 × 6 = 2880 bytes is required, but since the data of the first field and the second field are shared, it is actually 1440 bytes. You are using memory.

When displaying, the deflection information corresponding to each horizontal scanning line is read from the deflection memory 13B, converted into an analog signal by the D / A converter 13h, and then the horizontal deflection electrode 6 (conductive plates 6A, 6A '). ) Is added with the horizontal deflection signals h and h '.

To summarize this, during the display period excluding the vertical blanking period of the vertical cycle, the low-potential drive pulse of the linear cathodes 2a-2m is emitted from the linear cathode. The electron beam is divided into 120 sections in the horizontal direction x by the beam extraction electrode 3 to form 120 electron beam arrays. As will be described later, the electron beam passage amount of the electron beam is controlled by the beam flow control electrode 4 as described later, and the electron beam is converged by the converging electrode 5.
As shown in (3), a horizontal deflection electrode 6 (conductive plate 6) to which a pair of horizontal deflection signals h and h'which are changed in almost six steps is added.
A, 6A '), etc., the phosphors R1, G1, B1 and R2, G2, B2, etc. of the screen plate 8 are sequentially irradiated for each horizontal display period / 6 in each horizontal display period. Thus, the raster of each horizontal line displays a color image on the screen plate 8 by modulating the electron beam for each of 120 sections by the video signals corresponding to R1, G1, B1 and R2, G2, B2. can do.

Next, the electron beam modulation control portion will be described.

The R, G, B video signals applied to the signal input terminals 15R, 15G, 15B are applied to 120 sets of sample hold circuits 16a to 16n. The sample and hold circuits 16a to 16n are respectively for R1, G1, B1 and
And six sample-hold circuits for R2, G2, and B2.

The sampling pulse generating circuit 19 operates with the horizontal deflection signal H from the pulse generating circuit 14 as an input,
Horizontal display period (about 50 μs) in the horizontal period (63.5 μs)
Of the 120 sets of sample and hold circuits 16a to 16n for R1, G1, B1 and R2, G2, B2, respectively.
720 (120 x 6) corresponding to the sample hold circuit for
Sampling pulses Ra1 to Bn2 (indicated by 19A) are sequentially generated. Each of the 720 sampling pulses is 1
Six sets are added to each of the 20 sets of sample hold circuits 16a to 16n, so that each sample hold circuit has R for two picture elements when one line is divided into 120 pieces.
The video signals of 1, G1, B1, R2, G2 and B2 are individually sampled and held.

120 sets of Rs sample-held
The video signals of 1, G1, B1, R2, G2 and B2 are 120 sets of memories 17a to 17 after the sample hold for one line is completed.
Transfers to n simultaneously by transfer pulse, and next 1
It is held during the horizontal scanning period. The held signal is applied to 120 switching circuits (SW) 18a-18n. The switching circuits 18a-18n are R1, G1, B1, and R, respectively.
2, G2, B2 individual input terminals and a common output terminal for sequentially switching and outputting them, and a switching pulse r1, g1, b1, r2, g2 applied from the switching pulse generation circuit 20. ，
Switching control is simultaneously performed by b2 (shown by 20A).

The switching pulses r1, g1, b
1, r2, g2, and b2 divide each horizontal display period into 6 and switch the switching circuits 18a to 18n by 6 every horizontal display period, and each video signal of R1, G1, B1, R2, G2, B2 is time-divided. And output sequentially, and pulse width modulation circuits 21a-2
Supplying 1n.

The outputs of these switching circuits 18a to 18n are output from 120 sets of pulse width modulation (hereinafter referred to as PWM) circuits 2
1a-21n, R1, G1, B1, R2, G2
The pulse width is modulated in accordance with the size of each video signal of B2 and output. The PWM circuit 21a~21n output 120 present in the control electrode conductive plate 4A of the beam current control electrode 4 of the image display device ₁ as a control signal for modulating the electron beam ~4An
To be added individually.

Next, the timing of horizontal deflection and display will be described. R1 and G in the switching circuits 18a to 18n
Switching of video signals of 1, B1, R2, G2, B2,
Electron beams R1, G1, B generated by the deflection voltage generation circuit 13
The synchronous control is performed so that the switching timing and the order of the horizontal deflection of the R1, G2, G2, and B2 phosphors completely match.

As a result, when the R1 phosphor is irradiated with the electron beam, the irradiation amount of the electron beam is controlled by the R1 control signal, and hereinafter R1, G1, B1, R
2, 2, G2, B2 are controlled in the same manner, and the emission of each phosphor of R1, G1, B1, R2, G2, B2 of each picture element is the same as that of R1, G1, B1, R2, G2, B2 of that picture element. Each picture element is controlled by the video signal, and each picture element is luminescently displayed according to the input video signal.

Such control is performed by 120 sets for one line (two for each line).
The image is displayed on the screen plate 8 by simultaneously executing the same process for each picture element) to display an image of 240 picture elements in one line and further sequentially performing 240 lines in one field from the upper line. Further, the above-described operations are repeated for each field of the input video signal, and the television signal or the like is displayed on the screen plate 8.

The basic clock required for this structural example is supplied from the pulse generating circuit 14 shown in FIG. 4, and the timing is controlled by the horizontal synchronizing signal H and the vertical synchronizing signal V.

[0036]

In the image display device including the image display device having the above-described structure, the pulse width modulation (PWM) circuits 21a to 21n shown in FIG.
It is configured using.

This CMOS IC has an essential problem that it malfunctions when a surge is input, and an excessive current flows through the IC before the malfunction occurs.

It is an object of the present invention to pay attention to the fact that this excessive current flows through the IC, and when this excessive current is detected, the power supply to the pulse width modulation circuit is stopped for a certain period to prevent malfunction.

[0039]

SUMMARY OF THE INVENTION The present invention comprises means for detecting an excessive current flowing in a power supply line of a pulse width modulation circuit,
And a means for converting the transient current change into a voltage, a means for converting the voltage change into a pulse, and a means for stopping the power supply to the power supply line for a certain period by the converted pulse. Characterize.

[0040]

According to the present invention, when an excessive current flows in the power supply line before the malfunction of the pulse width modulation circuit, the excessive current detection means detects the excessive current and the transient current change is converted into a voltage. The voltage conversion is performed by the means, the transient voltage change is pulse-converted by the pulse conversion means, and the generated pulse is input to the power supply stop means to stop the power supply for a certain period.

As a result, even if an excessive current flows in the power supply line before the malfunction of the IC of the pulse width modulation circuit occurs, the power supply is stopped for a certain period, so that the pulse width modulation circuit in which the malfunction does not occur can be obtained.

[0042]

1 is a circuit diagram for preventing malfunction of a pulse width modulation circuit according to an embodiment of the present invention. In the figure, 22 is an IC power supply input side connection terminal of the pulse width modulation (PWM) circuits 21a to 21n shown in FIG. 4, and 23 is the same IC power supply output side connection terminal. 24 is a resistor for detecting an excessive current flowing in the power supply line, 25 is a first PNP transistor which is turned on when an excessive current flows in the power supply line, 26 is connected to the collector of the first PNP transistor at one end, and the other is A voltage conversion resistor having a GND terminal, 27 is a capacitor for slightly blunting a transient voltage change due to the voltage conversion resistor, and 28 is a monostable multi-pulse generating a pulse at the Q terminal with the transient voltage change as an input. Vibrators, 29 and 30 are first and second NPN transistors whose operation is controlled by a pulse from the monostable pulse vibrator, 31 is an emitter between the connection terminals 22 and 23 of the IC power input side and the output side, A second PNP transistor having collectors connected to each other, the first and second NPs
The N transistors 29 and 30 operate to stop the power supply for a certain period. Reference numeral 32 is a power supply terminal of the malfunction prevention circuit.

The operation of this embodiment will now be described. When an excessive current flows from the power supply line, that is, the IC power supply input side connection terminal 22 to the excessive current detecting resistor 24, the first PNP transistor 25 is turned on. At this time, a transient voltage change is input to the B input terminal of the monostable multivibrator 28 by the voltage converting resistor 26.

Here, the capacitor 27 serves to slightly dull the transient voltage change and prevents malfunction due to noise. The A input terminal of the monostable multivibrator 28 is set to GND. At this time, one pulse is generated at the Q output terminal of the monostable multivibrator 28. Here, in the normal state, the output of the Q output terminal of the monostable multivibrator 28 is L. First NPN transistor 29
And the second NPN transistor 30 is ON in the normal state
However, when the output of the Q output terminal of the monostable multivibrator 28 becomes H, it becomes OFF. If the second NPN transistor 30 is turned off, the second PNP transistor 30
31 turns off.

That is, the Q of the monostable multivibrator 28.
If one pulse is output to the output terminal, the second PN
When the P-transistor 31 is turned off,
The power supply to the output side connection terminal 23 is stopped.

[0046]

As described above, the malfunction prevention circuit of the pulse width modulation circuit of the present invention has
When an excessive current flows in the IC before the malfunction occurs and the excess current is detected, the malfunction of the IC of the pulse width modulation circuit can be prevented by stopping the power supply of the pulse width modulation circuit for a certain period, and its practical effect is Is large.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a malfunction prevention circuit of a pulse width modulation circuit according to an embodiment of the present invention.

FIG. 2 is a diagram showing a basic configuration example of a conventional image display element.

FIG. 3 is an enlarged view of one section in the screen plate of FIG.

FIG. 4 is a diagram showing an example of a circuit for driving the image display element of FIG.

5 is a diagram showing a timing chart of each circuit in FIG. 4;

[Explanation of symbols]

22 ... Input terminal of IC power supply of pulse width modulation circuit,
23 ... Output side connection terminal of IC power supply of pulse width modulation circuit,
24 ... Overcurrent detection resistor, 25 ... First PNP transistor, 26 ... Voltage conversion resistor, 27 ... Capacitor, 28
... monostable multivibrator, 29 ... first NPN transistor, 30 ... second NPN transistor, 31 ... second PNP transistor, 32 ... power supply terminal.

Claims (1)

[Claims] 1. A means for detecting an excessive current flowing in a power supply line of a pulse width modulation circuit, a means for converting this transient current change into a voltage, a means for converting this voltage change into a pulse, and this conversion. Means for stopping the power supply to the power supply line for a certain period by the pulse, and a malfunction prevention circuit for the pulse width modulation circuit.