JPH05175502A - Thin film transistor and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a thin film transistor capable of being used for a long time under high-temperature high-humidity environments, by making a gate oxide film composed of a silicon oxide film not containing a functional group of SiOH, and functional groups of SiH, SiH2, and SiH3. CONSTITUTION:A silicon oxide layer ULI is formed on a heat-resistant glass substrate GLS by APCVD method, and a silicon layer containing impurities is attached to the upside of the layer by reduced-pressure chemical vapor phase growth. And silicon islands PAD containing impurities are formed by patterning. Next a silicon layer SLL is formed at 550 deg.C by LPCVD method so as to cover the silicon layers PAD, and the silicon layer SLL is patterned as a polycrystal silicon layer PCS by excimer laser radiation LSR. And a thin film transistor can be realized by forming a silicon oxide layer GIL not containing a functional group of SiOH, and functional groups of SiH, SiH2, and SiH3 so as to cover the silicon layers PAD, polycrystal silicon layer PCS, and silicon oxide layer ULI.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a field effect transistor, particularly a thin film transistor, which is applied to an LSI, an active matrix type liquid crystal display, an image sensor, a liquid crystal shutter array, a three-dimensional integrated device and the like. ..

[0002]

2. Description of the Related Art Conventionally, a semiconductor thin film on an insulating substrate is known to have the following advantages as applied to pixels of an active matrix type liquid crystal display.

Transistors with uniform characteristics can be formed on a transparent substrate that transmits visible light, which is difficult to realize with a silicon substrate. By reducing the PN junction area, the stray capacitance can be reduced.

In addition, a bulk semiconductor technology is applied to form a thin film transistor on a quartz substrate to form a pixel transistor on the same substrate and a C-MOS circuit using a thin film transistor for driving the pixel on the same substrate. There are also examples. However, this C-MOS circuit is 100
Since the gate insulating film is formed and the impurities are activated after ion implantation at a temperature of 0 ° C. or higher, the strain point is 80
There is a drawback that an inexpensive large-sized glass substrate at 0 ° C or less cannot be used.

Further, for an active matrix substrate of a liquid crystal display, a thin film transistor on an inexpensive glass substrate having a strain point of 850 ° C. or lower cannot use a process of 1000 ° C. or higher, and therefore low pressure chemical vapor deposition. Even if a silicon layer is deposited by the method, the grain size of the polycrystal is at most several nm. Therefore, even if a MOS transistor is formed on this, its carrier mobility is several tenths of that of a MOS transistor on bulk silicon. It is about 1.

Therefore, recently, a method of increasing the crystal grain size to obtain a single crystal by scanning a silicon thin film with a laser beam, an electron beam or the like and melting and solidifying the thin film has been studied. According to this method, a high-quality silicon single crystal phase or a high-quality polycrystal can be formed on an insulating substrate, the characteristics of a device made by using it can be improved, and the same characteristics as those of a device made in bulk silicon can be obtained. It is improved to some extent. Furthermore, with this method, it is possible to stack elements and realize a so-called three-dimensional IC. Then, a circuit having characteristics such as high density, high speed, and multiple functions can be obtained.

Further, CM formed on bulk silicon
The gate insulating film of the thin film transistor of the OS circuit is 1000
Since it is formed by thermal oxidation in an oxidizing gas at a high temperature of ℃ or more, the silicon oxide formed by this method has a dense composition of oxygen and silicon atoms close to the ideal 2: 1. It has a large specific gravity and high chemical resistance to acidic solutions such as hydrofluoric acid. However, the strain point is 850
In the thin film transistor on the glass substrate of less than ℃,
Since a high temperature of 1000 ° C. cannot be used, the gate insulating film of the thin film transistor has a temperature of 500 ° C. or lower,
It is formed by an atmospheric pressure chemical vapor deposition method (APCVD method), a plasma chemical vapor deposition method (PCVD method), or an electron cyclotron chemical vapor deposition method (ECR-CVD method).

However, the characteristics of a thin film transistor using a silicon oxide film formed by the APCVD method and the PCVD method as a gate insulating film are such that even when it is continuously used for a long time, a thin film transistor using laser crystallized polycrystalline silicon as a channel layer is used. However, there is a problem that the electrical characteristics are deteriorated.

[0009]

SUMMARY OF THE INVENTION In consideration of the above points, the present invention has electric characteristics even at a process temperature of 600 ° C. or lower at which an inexpensive glass substrate can be used and even when it is continuously used for a long time. It is intended to provide a gate insulating film of a silicon oxide film that can be used to manufacture a thin film transistor that does not deteriorate.

The present invention also includes a gate electrode and a source region,
Alternatively, it provides a gate insulating film made of a silicon oxide film having a high electrical resistance between the gate electrode and the drain electrode.

The present invention also provides a gate insulating film made of a silicon oxide film capable of reducing the leak current between the source and drain of a thin film transistor.

The present invention also provides a gate insulating film for increasing the mobility of a thin film transistor.

[0013]

A step of depositing and patterning a silicon layer on a substrate, a step of patterning the silicon layer, and a function of SiH, SiH ₂ and SiH ₃ in which silicon atoms and hydrogen atoms are bonded. Group, and a step of forming a silicon oxide film containing no functional group of Si-OH in which a silicon atom and a hydroxyl group are bonded, a step of forming a gate electrode by a conductive film on the silicon oxide film, and And a step of activating the impurities by ion-implanting impurities into the source / drain regions in a self-aligned manner.

[0014]

The details of the present invention will be described below with reference to the illustrated embodiments.

1 to 8 show an embodiment of a method of manufacturing a thin film transistor.

9 and 10 show the reliability test results of the thin film transistor using the conventional method and the gate insulating film formed by the present invention, respectively.

As shown in FIG. 1, atmospheric pressure chemical vapor deposition (APCVD) is performed on an insulating substrate such as a heat resistant glass substrate.
Method) or electron cyclotron CVD method (ECR-
A silicon oxide layer ULY is deposited to a thickness of 250 nm by the CVD method. The function of this silicon oxide thin film is to prevent atoms such as Al atoms and P atoms, which are the constituent elements of the heat-resistant glass substrate, from diffusing into the silicon layer of the thin film transistor. Some heat-resistant glass has a atomic ratio of 1, for example.
When the Na atom content is about 00 ppm, plasma C is deposited on the glass substrate to prevent the diffusion of the Na atom.
A silicon nitride film is formed to a thickness of 150 nm by the VD method. Alternatively, a silicon oxide film may be further deposited on the silicon nitride film formed by the above method.

Next, a silicon layer containing impurities and having a thickness of 150 nm is formed on the silicon oxide film ULY by low pressure chemical vapor deposition. When manufacturing an n-type thin film transistor, P and As may be used as impurities.
When manufacturing a p-type thin film transistor, a silicon layer containing no impurities is formed by low pressure chemical vapor deposition (LPCVD), B is injected by an ion implantation method, and annealing or laser irradiation at 600 ° C. for 2 hours is performed. By irradiating the beam to activate the impurities, a silicon layer containing p-type impurities can be formed. further,
The silicon layer containing impurities formed above is patterned by photolithography to form a silicon island PAD containing impurities.

Next, the silicon layer PA containing impurities is formed in the silicon layer SLL at a temperature of 550 ° C. by the LPCVD method.
A film having a thickness of 25 nm is formed so as to cover D. When the flow rate of monosilane, which is a reaction gas of LPCVD when forming this silicon layer, is 20 sccm, the crystallinity of the silicon layer SLL is amorphous.

The silicon layer SLL is formed by the LPCVD method at a temperature of 550 ° C., and 570-63.
The present invention can be sufficiently applied to a polycrystalline silicon layer formed at a temperature of 0 ° C.

If necessary, the silicon layer SLL may be mixed with a slight amount of impurities by an ion implantation method or a diffusion method.

Next, as shown in FIG. 2, the amorphous silicon layer SLL is irradiated with an XeCl excimer laser having a wavelength of 308 nm at an intensity of 230 mJcm ^-2 immediately before the amorphous silicon layer to expose the whole surface or a part of the substrate. The amorphous silicon layer is crystallized. Before irradiating excimer laser, 600 ℃ 48
The silicon layer may be crystallized in a nitrogen atmosphere for an hour.

As shown in FIG. 3, the silicon layer SLL has a grain size of 100 to 2 by the above-mentioned excimer laser irradiation LSR.
It becomes a polycrystalline silicon layer PCS composed of a 00 nm stone wall crystal. Next, this silicon layer SLL is patterned by a lithography method.

Next, as shown in FIG. 4, the silicon oxide layer GIL is set to 1 so as to cover the impurity-containing silicon layer PAD, the polycrystalline silicon layer PCS, and the silicon oxide layer ULI.
It is deposited to a thickness of 20 nm. Silicon oxide layer GIL
The method for forming is formed by the APCVD method at a temperature of 400 ° C. using monosilane and oxygen as reaction gases. Next, the substrate on which the silicon oxide layer GIL is formed is subjected to 600 nm in a nitrogen atmosphere.
Thermal annealing is performed at a temperature of ° C for 2 hours. When monosilane and oxygen are used as a reaction gas, a silicon oxide film formed by an APCVD method at a temperature of 400 ° C. is formed on a silicon substrate with a thickness of 200 nm, and infrared absorption is observed by an FT-IR method.
Absorption by vibration of SiH ₂ at 870-890 cm ⁻¹ ,
Vibration absorption of SiOH is observed near 3600 cm ^-1 . On the other hand, when the silicon oxide layer formed by the APCVD method at a temperature of 400 ° C. is annealed at a temperature of 600 ° C., the above infrared absorption is not observed.

The method for forming the gate insulating film is not limited to the above method, and a silicon oxide film is formed by plasma CVD using tetraethoxysilane gas to form 600
No vibration of the functional groups of SiH ₂ or SiOH is observed in the silicon oxide film annealed in the nitrogen atmosphere at the temperature of ° C for 2 hours.

Further, in the silicon oxide film formed by the electron cycloton CVD method using monosilane and oxygen as the reaction gas, the vibration of the functional groups of SiH ₂ and SiOH is not observed.

FIG. 11 shows the FT-IR measurement results of the silicon oxide film used in the conventional thin film transistor and the silicon oxide film used for the gate insulating film of the present invention. The silicon oxide film which does not contain the functional groups of SiH, SiH ₂ and SiH _{3 and} the functional group of Si—OH in which a silicon atom and a hydroxyl group are bonded is not limited to the above method, and there are various other methods. The main point is the structure and method of forming a thin film transistor using a silicon oxide film containing no functional groups of SiH, SiH ₂ and SiH ₃ and a SiOH functional group as a gate insulating film, the reason for which will be explained again at the end of the example. .. SiH, SiH by the above several methods
It is possible to form the silicon oxide layer GIL which does not contain the functional groups of ₂ and SiH _{3 and} the functional group of SiOH.

Next, as shown in FIG. 5, a silicon oxide layer G is formed.
A silicon layer containing impurities is deposited to a thickness of 500 nm on the IL, and a Cr thin film is deposited to a thickness of 150 nm on the silicon layer containing impurities by a sputtering method. Next, the Cr thin film is first patterned by the lithography method and the silicon layer containing impurities is further patterned to form the gate electrode GED. Since the gate electrode is formed by the two layers of the silicon layer containing impurities and the Cr thin film, the resistance of the gate electrode is low.
× 10 ⁻⁶ Ωcm or less.

Next, as shown in FIG. 6, impurities are implanted into the gate electrode in a self-aligned manner to form source / drain regions. As the impurity implantation method, in addition to the mass separation type ion implantation method, a bucket type non-mass separation type ion implantation method can be used. When forming an n-type thin film transistor, the thickness of the gate insulating film is 120 n.
In the case of m, phosphorus ions may be implanted with energy of 100 keV, and the implantation amount is 5 × 10 ¹⁵ cm ⁻³ . Further, when forming a p-type thin film transistor, boron ions are implanted. In addition to boron, arsenic ions and antimony ions can be used as impurities in p-type thin film transistors. Impurities to be ion-implanted are not implanted into the channel portion because the gate electrode is made of a silicon layer having a thickness of 500 nm. When the p-type and n-type thin film transistors are formed on the same substrate, the ion implantation process is divided into a plurality of times, and the p-type thin film transistor has an ion implantation blocking ability such as a resist in the formation region of the n-type transistor. Forming a mask with a thin film,
To form an n-type thin film transistor by ion-implanting p-type impurities, another mask may be similarly formed and the n-type impurities may be selectively ion-implanted only in the region of the n-type transistor.

Impurity-doped source regions SCE and drain regions DNA are formed by the ion implantation.

Next, as shown in FIG. 7, the region SCE and the region DAA are irradiated with a XeCl excimer laser having a wavelength of 308 nm at an intensity of 300 mJcm ⁻² to activate the implanted impurities. By this laser irradiation, the impurities in the regions SCE and DAA are activated to become the source region SAA and the drain region DAA, and the specific resistance of each region is
It becomes 1.5 × 10 ⁻² Ωcm ^{−1 in} the portion having a thickness of 25 nm. The activation by the pulsed laser irradiation is performed at room temperature, and the source region SAA and the drain region DAA that absorb the laser energy instantaneously rise to several hundred degrees Celsius.
Since the temperature reaches several tens of degrees Celsius in a short time of 2 × 10 ⁻⁹ s, the heat generated by laser irradiation has almost no effect on the gate insulating film GIL.

Next, as shown in FIG. 8, the gate insulating film GI
A silicon oxide film ILI of 500 nm, which is an interlayer insulating film, is deposited by APCVD so as to cover L and the gate electrode GED. Next, a contact window for wiring is opened on the source region SAA and the drain region DAA by the reactive ion etching method so as to penetrate the interlayer insulating film ILI and the gate insulating film GIL. Next, an aluminum thin film containing copper and silicon of several% is deposited by sputtering to a thickness of 800 nm and patterned by lithography to form the source electrode SED and the drain electrode D.
Form ED.

The necessary C-MOS circuit can be constructed by appropriately combining and arranging the n-type and p-type thin film transistors formed as described above and providing wiring.

When the thin film transistor is used for a pixel, the material of the drain electrode may be an indium-tin oxide film with a thickness of 200 nm formed by sputtering. FIG. 9 shows initial subthreshold characteristics of the n-type thin film transistor manufactured by the method of the present invention and the conventional method. In addition, in an atmosphere at a temperature of 80 ° C. and a humidity of 70%, a gate voltage of 8 V and a drain voltage of 4 V of 1000
FIG. 10 shows the subthreshold characteristics of the conventional method and the thin film transistor of the present invention after the time stress test.
In FIG. 9, PBC shows the transfer characteristics of the conventional thin film transistor before stress application, and IBC shows the transfer characteristics of the thin film transistor of the present invention before stress application. As shown in FIG. 9, the initial characteristic is that the present invention has a mobility of 24 compared with the conventional example.
%high. After the above stress test, the subthreshold characteristic P of the thin film transistor formed by the conventional method is
While the AC is greatly deteriorated as shown in FIG. 10, the characteristic IAC of the thin film transistor of the present invention does not change. Table 1 shows the measured values of the transfer characteristics before and after the stress test of the thin film transistor manufactured by the conventional method and the method of the present invention, respectively. As shown in Table 1, the subthreshold slope value of the conventional thin film transistor is 3
Although it greatly increases from 1 mV / dec to 71 mV / dec, the thin film transistor of the present invention has 26 mV / dec.
It remains c. It is considered that the transfer characteristics of the conventional thin film transistor deteriorated after the stress test because the electron trap level in the silicon oxide film increased due to the current of the stress test. On the other hand, SiH, SiH ₂ and S of the present invention
In the silicon oxide film which does not contain the functional group of iH _{3 and} the functional group of SiOH, the network of silicon atoms and oxygen atoms is strong, and there is no dangling bond of silicon atoms. It is considered that no deterioration of electrical characteristics was observed after the stress test because the number of positions did not increase.

Further, as shown in Table 1, it can be seen that the mobility of the thin film transistor is improved by the method of forming a gate insulating film of the present invention.

[0036]

[Table 1]

The thin film transistor is mainly formed on a glass substrate and is currently actively used as a pixel transistor on an active matrix substrate of a liquid crystal display. Although it is sometimes used in the indoor environment of humans such as the display of a portable computer, the satellite navigation system has a liquid crystal display for a long time in a harsh environment where the temperature of the vehicle is 80 ° C and the humidity is 90% or more, which is exposed to sunlight. Since it is used, the demand for reliability of thin film transistors is extremely high. Therefore, from the analysis of the physical properties of the gate insulating film and the correlation of the reliability of the thin film transistor,
The required performance of the gate insulating film formed of a silicon oxide film has been clarified, and a method of manufacturing a highly reliable thin film transistor formed on a glass substrate by a process of 600 ° C. or lower has been invented. In the present invention, when a crystalline polycrystalline silicon layer formed by laser irradiation is used as the channel silicon layer, a thin film transistor having extremely high mobility can be formed as shown in Table 1. The thin film transistor thus formed can form not only the pixel transistor of the active matrix substrate but also a drive circuit for driving this pixel transistor. Like the pixel transistor, the present invention makes it possible to manufacture an active matrix substrate with a built-in drive circuit that can operate for a long time even in a severe environment of high temperature and high humidity.

[0038]

As described above, according to the present invention, in a thin film transistor using a silicon oxide film as a gate oxide film that is in direct contact with a channel silicon layer, SiH,
By using a silicon oxide film that does not contain the functional groups of SiH ₂ and SiH _{3 and} the functional group of SiOH, it is possible to manufacture a thin film transistor that can withstand long-term use in a hot and humid environment.

As a result, it is possible to provide a thin film transistor type native matrix flat panel display which can be sufficiently used in a car, in an airplane, and in a spacecraft. Further, in the thin film transistor type active matrix liquid crystal display according to the present invention, since the pixel transistors are not deteriorated, it is possible to obtain a high quality image capable of displaying a high contrast without color unevenness for an extremely long time.

Further, in the method of manufacturing a thin film transistor of the present invention, since inexpensive glass can be used for the insulating substrate, a large-area liquid crystal display, which cannot be obtained by a process using a quartz substrate at 1000 ° C. or higher, is manufactured. be able to.

Further, since the gate insulating film of the thin film transistor of the present invention has an extremely small electron trap level, the leak current from the gate electrode to the source / drain region or the channel layer is extremely small, that is, the gate insulating film is electrically conductive. A highly resistant thin film transistor can be provided.

When a crystalline polycrystalline silicon layer formed by laser irradiation is used as the channel silicon layer, a thin film transistor having extremely high mobility can be formed as shown in Table 1. Therefore, not only the pixel transistor but also the thin film transistor of the present invention can be used for driving. A circuit can also be configured. Therefore, according to the present invention, an active matrix substrate with a built-in drive circuit that can operate for a long time even in a severe environment of high temperature and high humidity can be manufactured by a process at 600 ° C. or lower.

Furthermore, the present invention can be applied to the manufacture of high-performance three-dimensional devices.

[Brief description of drawings]

FIG. 1 is a process drawing of a method of manufacturing a thin film transistor of the present invention.

FIG. 2 is a process drawing of a method of manufacturing a thin film transistor of the present invention.

FIG. 3 is a process drawing of the method of manufacturing a thin film transistor of the present invention.

FIG. 4 is a process drawing of the method of manufacturing a thin film transistor of the present invention.

FIG. 5 is a process drawing of the method of manufacturing a thin film transistor of the present invention.

FIG. 6 is a process drawing of the method of manufacturing a thin film transistor of the present invention.

FIG. 7 is a process drawing of the method of manufacturing a thin film transistor of the present invention.

FIG. 8 is a process drawing of the method of manufacturing a thin film transistor of the present invention.

FIG. 9 is a diagram showing transfer characteristics of a thin film transistor before a stress test.

FIG. 10 is a graph showing transfer characteristics of thin film transistors after a stress test.

FIG. 11 is an FT-IR measurement diagram of a silicon oxide film.

[Explanation of symbols]

GLS ... Heat resistant glass substrate ULI ... Silicon oxide layer PAD ... Silicon layer containing impurities SLL ... Silicon layer LSR ... Laser irradiation PCS ... Polycrystalline silicon layer GIS ... Silicon oxide layer GED of the present invention ... Gate electrode IPI ... Ion implantation SCE ... ion-implanted source region DNA ... ion-implanted drain region LAT ... laser irradiation for impurity activation SAA ... impurity-activated source region DAA ... impurity-activated drain region ILI ... interlayer insulating film SED ... Source electrode DED ... Drain electrode PSL ... Silicon nitride film for passivation PBC ... Transfer characteristic before stress test of conventional thin film transistor IBC ... Transfer characteristic before stress test of thin film transistor of the present invention PAC ... Stroke of conventional thin film transistor Transfer characteristics after a stress test IAC ... Transfer characteristics of a thin film transistor of the present invention after a stress test PFF ... FT-IR measurement diagram of a silicon oxide film which is a gate insulating film used in a conventional thin film transistor IFF ... Used for the thin film transistor of the present invention Gate insulating films such as SiH, SiH ₂ and SiH ₃ and SiO
FT-IR measurement diagram of silicon oxide film not containing H functional group

Claims (2)

[Claims] 1. A gate oxide film comprising functional groups of SiH, SiH ₂ and SiH ₃ in which silicon atoms and hydrogen atoms are bonded,
A thin film transistor composed of a silicon oxide film containing no functional group of SiOH in which a silicon atom and a hydroxyl group are bonded. 2. A step of depositing and patterning a silicon layer on a substrate, a step of patterning the silicon layer, and SiH and S in which silicon atoms and hydrogen atoms are bonded.
a step of forming a silicon oxide film which does not include a functional group of iH ₂ and SiH _{3 and} a functional group of SiOH in which a silicon atom and a hydroxyl group are bonded, and a step of forming a gate electrode by a conductive film on the silicon oxide film, A method of manufacturing a thin film transistor, comprising: a step of ion-implanting an impurity into a source / drain region in a self-aligning manner with respect to the gate electrode; and a step of activating the impurity.