JPH0516769B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device having a voltage clamp circuit.

[Conventional technology]

Conventionally, there are a diode D shown in FIG. 5 and an MIS field effect transistor _Q4 shown in FIG. 6, which have been used as a voltage clamp circuit. The former is composed of, for example, a substrate formed on the surface of a semiconductor substrate, a diffusion layer region of an opposite conductivity type, and a semiconductor substrate.
It utilizes the reverse breakdown current of the -N junction, and when the potential exceeds the reverse breakdown voltage, the breakdown current flows and the potential is maintained. The latter uses MIS field effect transistors, and when the potential rises above the threshold, MIS
Because current flows through the field effect transistor, the potential is
kept at the threshold of the MIS field effect transistor. What is normally used is a high threshold transistor whose gate insulating film is a thick field oxide film for insulation isolation.

[Problem that the invention seeks to solve]

The voltage clamp circuit according to the prior art described above has a serious drawback in that the clamp voltage varies widely due to manufacturing variations. In the diode using the P-N junction shown in Fig. 5, the semiconductor substrate impurity concentration, the diffusion layer region impurity concentration, the junction depth (x _j ), etc. change the clamp voltage, that is, the P-N junction reverse breakdown voltage. Each of them has manufacturing variations as a factor, and as a result, the clamp voltage has fluctuations due to large manufacturing variations. Also,
In the MIS field effect transistor shown in Figure 6,
The gate insulating film thickness, the impurity concentration in the channel forming part, the gate length, the junction depth of the source and drain (x _j ), etc. each have manufacturing variations as factors that change the clamp voltage, that is, the threshold value of the MIS field effect transistor. As a result, the clamp voltage had fluctuations due to large manufacturing variations. In addition, the clamp potential is the P-N junction reverse breakdown voltage,
The threshold values of transistors, etc. were fixed values and could not be changed.

The purpose of the present invention is to provide two MIS with floating gates.
It is an object of the present invention to provide a semiconductor device which can provide an accurate clamp voltage using a field effect transistor and can also be reset.

[Means for solving problems]

A semiconductor device of the present invention includes a first MIS field effect transistor having a floating gate whose drain electrode and gate electrode are connected to a first connection terminal, and whose source electrode is connected to a second connection terminal; A second MIS connected to the floating gate of the first MIS field effect transistor, whose drain electrode is connected to the third external connection terminal, whose gate electrode is connected to the fourth external connection terminal, and whose source electrode is grounded.
A voltage clamp circuit composed of a field effect transistor is provided on a semiconductor substrate.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

The first MIS field effect transistor Q ₁ has a floating gate 5 and the drain gate is connected to the first connection terminal 1
The source is connected to the second connection terminal 2. The second MIS field effect transistor Q ₂ has a floating gate 6 and is connected to the floating gate 5 of the first MIS field effect transistor Q ₁ . The drain is connected to the third external connection terminal 3, the gate is connected to the fourth external connection terminal 4, and the source is grounded.

The most distinctive feature of the operation of this embodiment is that the potential of the connection terminal 1 is clamped at the threshold of the MIS field effect transistor _Q1 , and that threshold changes depending on the amount of charge accumulated in the floating gate 5. The point is that the charge in the floating gate 5 can be changed by injecting hot carriers into the floating gate 6 by the second MIS field effect transistor _Q2 . This means that the threshold value of the first MIS field effect transistor Q ₁ , which is the clamp potential, is the same as that of the second MIS field effect transistor Q ₂ after manufacturing.
Since it is adjusted and determined by the amount of charge injected and accumulated in the floating gate 5, it means that an accurate clamp potential of any value can be obtained without being affected by manufacturing variations at all.

Next, charge injection into the floating gate will be explained. The hot electron channel injection method is the most stable method of controlling the amount of injected charge. In this case the second MIS field effect transistor Q ₂ is n
- Consists of channel transistors. For charge injection, a high potential of about 10 to 30 V is applied from the external connection terminal 4 to the gate electrode, and a high potential of about 20 V is applied from the external connection terminal 3 to the drain electrode. At this time, the first
It is more stable if the gate electrode, drain electrode 1, and source electrode 2 of the MIS field effect transistor _Q1 are set to a fixed potential such as a ground potential. second
The MIS field effect transistor _Q2 is turned on, and hot electrons are formed in the pinch-off region (depletion region) under the gate, and some of them are injected into the floating gate 6 by the electric field. The amount of charge injected at this time depends on the voltage application time and the potential V ₄ of the gate electrode 4.

Figure 2 shows that the voltage application time is sufficiently long (several tens of milliseconds).
Above) Potential V ₄ of gate electrode 4 when charge injection is saturated and amount of charge injected and accumulated in floating gate 6 -
It is a characteristic diagram showing the relationship of _QF .

The amount of charge and V ₄ react one-to-one, and the amount of charge injected can be controlled with high precision by V ₄ . Since the floating gates 6 and 5 are connected, the threshold voltage V _T1 of the first MIS field effect transistor Q ₁ changes.

As shown in Figure 3, the threshold value V _T1 and the amount of injected charge -
There is a one-to-one correspondence with Q _F , therefore, V _T1 can be set to a predetermined value with high precision by V ₄ , that is, the clamp potential can be set to a predetermined value. Note that when operating the clamp circuit, the external connection terminals 3 and 4 may be more stable if they are set to a fixed potential such as a ground potential. Furthermore, since the charge in the floating gate can be released by ultraviolet light, the clamp voltage can be reset.

In Fig. 1, if the second connection terminal 2, to which the source electrode of the first MIS field effect transistor _Q1 is connected, is connected to the reference potential V _S , the clamp potential is set.
It can be set to V _S +V _T1 , and a larger clamp potential can be obtained.

FIG. 4 is a circuit diagram of a second embodiment of the present invention.

One or more enhancement MIS field effect transistors Q ₃₁ to _{Q 3o} are connected in series between the first connection terminal ₁ to which the gate and drain of the first MIS field effect transistor Q 1 are connected and the third connection terminal 7. By doing this, the clamp potential, that is, the potential of the third connection terminal 7, changes from the threshold value V _T1 of Q ₁ to Q ₃₁ ~ _{Q 3o}
The threshold values V _T31 to _{V T3o} can be added to a larger value.

〔Effect of the invention〕

As explained above, in the present invention, the clamp potential of the voltage clamp circuit is the first voltage clamp circuit having a floating gate.
The configuration is determined by the threshold value of the MIS field effect transistor, and the second MIS field effect transistor, which shares the floating gate with the first MIS field effect transistor and is connected to the external connection terminal, charges the floating gate after manufacturing. Since the clamp potential is determined by injection, the clamp potential is not affected by manufacturing variations at all and can be set to a predetermined value with high precision. Furthermore, since the charge in the floating gate can be released by ultraviolet light, the clamp potential can be reset, providing a great function of making the clamp potential variable.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of the first embodiment of the present invention;
The figure is a characteristic diagram showing the relationship between the potential V _{4 of the gate electrode 4} and the amount of charge −Q _F injected and accumulated in the floating gate.
FIG. 3 is a characteristic diagram showing the relationship between -Q _F and the threshold voltage V _T1 of the field effect transistor Q ₁ , FIG. 4 is a circuit diagram of the second embodiment of the present invention, and FIGS. 5 and 6 are respectively circuit diagrams of conventional voltage clamp circuits. 1 to 4... Connection terminal, 5, 6... Floating gate,
7 to 9... Connection terminal, D... Diode, Q ₁ ,
Q ₂ , Q ₄ , Q ₃₁ , Q _3o ... MIS field effect transistor.

Claims (1)

[Claims] 1 A first MIS field effect transistor having a floating gate whose drain electrode and gate electrode are connected to a first connection terminal and whose source electrode is connected to a second connection terminal, and whose floating gate is connected to the first MIS electric field. A second MIS field effect transistor connected to the floating gate of the effect transistor, whose drain electrode is connected to a third external connection terminal, whose gate electrode is connected to a fourth external connection terminal, and whose source electrode is grounded. 1. A semiconductor device comprising a voltage clamp circuit provided on a semiconductor substrate.