JPH05167630A - Unique word detector - Google Patents

Unique word detector

Info

Publication number
JPH05167630A
JPH05167630A JP3350652A JP35065291A JPH05167630A JP H05167630 A JPH05167630 A JP H05167630A JP 3350652 A JP3350652 A JP 3350652A JP 35065291 A JP35065291 A JP 35065291A JP H05167630 A JPH05167630 A JP H05167630A
Authority
JP
Japan
Prior art keywords
unique word
detector
input signal
delay
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3350652A
Other languages
Japanese (ja)
Inventor
Haruya Iwasaki
玄弥 岩崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3350652A priority Critical patent/JPH05167630A/en
Priority to AU20663/92A priority patent/AU656098B2/en
Priority to CA002074889A priority patent/CA2074889C/en
Priority to DE69233096T priority patent/DE69233096T2/en
Priority to EP96114081A priority patent/EP0750411B1/en
Priority to EP92112922A priority patent/EP0526833B1/en
Priority to DE69224687T priority patent/DE69224687T2/en
Priority to US07/921,711 priority patent/US5276710A/en
Publication of JPH05167630A publication Critical patent/JPH05167630A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To detect a unique word with a comparatively small circuit even when an input signal has a frequency error by applying delay detection to an input signal with a 1st delay detector, eliminating a frequency offset therefrom and inputting the result to a correlation device. CONSTITUTION:An input signal is subject to delay detection by a 1st delay detector 5 to eliminate a frequency offset included in an input signal and the unique word generated by a unique word generator 1 is subject to delay detection by a 2nd delay detector 6. Then the signals subject to delay detection respectively are given to a correlation device 2, in which the correlation is calculated and its output is converted into power by a power converter 4 and a level detector 3 is used to detect a maximum value thereby detecting the unique word. Thus, even when a large frequency uncertainty is in existing in the input signal, it is not required to use lots of the correlation devices arranged and the circuit scale is remarkably reduced. Furthermore, since only one input signal is required for the level detector 3, an error detection probability is reduced.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はユニークワード検出器に
関し、特に入力信号周波数に大きな不定性がある場合の
信号検出器としてのユニークワード検出器に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a unique word detector, and more particularly to a unique word detector as a signal detector when the input signal frequency has a large indefiniteness.

【0002】[0002]

【従来の技術】ユニークワード検出器は、その目的によ
って大きく2つに分類される。一つはフレーム同期をと
るためのものであり、完全に復調された信号が入力され
る。他の一つは、信号検出を行うためのもので、準同期
復調された信号が入力される。前者の一例を図2に示
す。入力信号R(t)は直交変調された2系列の信号で
複素数で表現されており、長さTの複素数のユニークワ
ードパターンU(τ)が挿入されている。ユニークワー
ド発生器1はU(τ)の複素共役値U* (τ)を出力す
る。相互相関器2はR(t)とU* (τ)の相互相関値
C(t)を出力する。
2. Description of the Related Art Unique word detectors are roughly classified into two types according to their purpose. One is to establish frame synchronization, and a completely demodulated signal is input. The other one is for performing signal detection, and a quasi-synchronized demodulated signal is input. An example of the former is shown in FIG. The input signal R (t) is expressed by a complex number as a quadrature-modulated signal of two series, and a complex unique word pattern U (τ) of length T is inserted. The unique word generator 1 outputs a complex conjugate value U * (τ) of U (τ). The cross-correlator 2 outputs a cross-correlation value C (t) of R (t) and U * (τ).

【数1】 [Equation 1]

【0003】時刻t=to において入力信号に含まれて
いるユニークワード部分が受信されたとすると、
Assuming that the unique word portion included in the input signal is received at time t = t o ,

【数2】 となる。但し、N(t)は雑音成分である。このため、[Equation 2] Becomes However, N (t) is a noise component. For this reason,

【数3】 となり、極大値をとる。但し、n(t)は雑音成分によ
る寄与である。したがって、C(t)を入力とするレベ
ル検出器3は、予め定められたしきい値とC(t)の値
を比較することにより、極大値C(to )を検出し、時
刻t=to を知ることができる。
[Equation 3] And takes the maximum value. However, n (t) is a contribution by the noise component. Therefore, the level detector 3 having C (t) as an input detects the maximum value C (t o ) by comparing the value of C (t) with a predetermined threshold value, and the time t = You can know t o .

【0004】次に、後者の一例を図3に示す。この場合
は、入力信号R(t)が復調される以前の信号であるた
め、時刻t=to +τにおける入力信号R(to +τ)
は、準同期復調後の残留周波数オフセットをω、位相誤
差をθとすると、
An example of the latter is shown in FIG. In this case, since the input signal R (t) is a signal before demodulation, the input signal R (t o + τ) at time t = t o + τ
Is the residual frequency offset after quasi-synchronous demodulation is ω and the phase error is θ,

【数4】 となる。したがって、相互相関出力も、[Equation 4] Becomes Therefore, the cross-correlation output is also

【数5】 となる。これは、ω≪2/Tのとき、その絶対値|C
(to )|、又はその二乗(即ち、電力)が極大値をと
る。したがって、相関器とレベル検出器の間に電力に変
換する回路を挿入することにより対応できる。
[Equation 5] Becomes This is the absolute value | C when ω << 2 / T
(T o) |, or the square (ie, power) takes a maximum value. Therefore, it can be dealt with by inserting a circuit for converting into electric power between the correlator and the level detector.

【0005】問題はωがより大きな値をとるときであ
る。(数5)より明らかなように、|C(to )|は s
in(ωT/2 )/ωの項が含まれるため、ωが大きくなる
と十分大きな出力が得られなくなるためである。そこ
で、図3(a)のように、このユニークワード検出器
(ブロック1〜K)を並列にK個並べる。各ブロックは
図3(b)に示すように、入力信号に対して周波数変換
器7で周波数シフトした信号を入力する。シフトする周
波数は各ブロック毎に異なる。
The problem is when ω has a larger value. As is clear from (Equation 5), | C (t o ) | is s
This is because a term of in (ωT / 2) / ω is included, so that a sufficiently large output cannot be obtained when ω becomes large. Therefore, as shown in FIG. 3A, K unique K word detectors (blocks 1 to K) are arranged in parallel. As shown in FIG. 3 (b), each block inputs a signal whose frequency is shifted by the frequency converter 7 with respect to the input signal. The frequency to shift differs for each block.

【0006】例えば、k番目のユニークワード検出器に
は(数6)で与えられるような信号Rk (t)が入力さ
れる。
For example, the signal Rk (t) given by (Equation 6) is input to the kth unique word detector.

【数6】 すると、相関器出力Ck (t)は、t=to のとき、[Equation 6] Then, the correlator output Ck (t) is, at the time of t = t o,

【数7】 したがって、K個のユニークワード検出器のうちのいず
れかで、Δωk≪2/Tとなれば、|Ck(to )|は
十分大きな極大値をとる。レベル検出器3ではK個の入
力信号のうち、いずれかがしきい値を越えたときに信号
が検出されたものと判定する。
[Equation 7] Therefore, if Δωk << 2 / T in any of the K unique word detectors, | Ck (t o ) | has a sufficiently large maximum value. The level detector 3 determines that a signal is detected when any of the K input signals exceeds the threshold value.

【0007】[0007]

【発明が解決しようとする課題】従来のユニークワード
検出器では、入力信号周波数の不安定性が大きくなるに
したがって、必要とされる個々のユニークワード検出器
及び周波数変換器の数Kが増大して行き、回路規模も大
きくなってしまうという問題がある。又、レベル検出器
への入力信号の数が多くなると、信号の誤検出の確率が
高くなるという問題もある。本発明の目的は、入力信号
が周波数誤差を持っているときでも、比較的小さな回路
でユニークワードが検出できるようにしたユニークワー
ド検出器を提供することにある。
In the conventional unique word detector, the number K of individual word detectors and frequency converters required increases as the instability of the input signal frequency increases. There is a problem that the circuit scale becomes large. Further, when the number of input signals to the level detector increases, there is a problem that the probability of signal false detection increases. It is an object of the present invention to provide a unique word detector capable of detecting a unique word with a relatively small circuit even when an input signal has a frequency error.

【0008】[0008]

【課題を解決するための手段】本発明のユニークワード
検出器は、ユニークワードが挿入されている入力信号を
遅延検波する第1の遅延検波器と、ユニークワードの複
素共役値を発生するユニークワード発生器と、このユニ
ークワード発生器の出力を遅延検波する第2の遅延検波
器と、第1及び第2の遅延検波器の各出力の相互相関を
取る相互相関器と、この相互相関器の出力を二乗して電
力を求める電力変換器と、この電力変換器の出力を予め
定められたしきい値と比較し、その極大値を検出するレ
ベル検出器とを備える。
SUMMARY OF THE INVENTION A unique word detector of the present invention comprises a first differential detector for differentially detecting an input signal in which a unique word is inserted, and a unique word for generating a complex conjugate value of the unique word. A generator, a second differential detector that differentially detects the output of the unique word generator, a cross-correlator that cross-correlates the outputs of the first and second differential detectors, and a cross-correlator A power converter that squares the output to obtain the power, and a level detector that compares the output of the power converter with a predetermined threshold value and detects the maximum value thereof are provided.

【0009】[0009]

【作用】入力信号を第1の遅延検波器で遅延検波して入
力信号に含まれている周波数オフセットを除去し、かつ
ユニークワード発生器で発生されたユニークワードパタ
ーンを第2の遅延検波器で遅延検波し、夫々遅延検波さ
れた信号を相互相関器で相互相関を計算し、その出力を
電力に変換した上でレベル検出器で極大値を検出するこ
とによりユニークワードを検出する。
The input signal is delayed detected by the first differential detector to remove the frequency offset contained in the input signal, and the unique word pattern generated by the unique word generator is detected by the second differential detector. The differential detection is performed, the cross-correlator calculates the cross-correlation of each of the delay-detected signals, the output is converted into electric power, and the maximum value is detected by the level detector to detect the unique word.

【0010】[0010]

【実施例】次に、本発明について図面を参照して説明す
る。図1は本発明の一実施例のブロック図である。図2
及び図3に示した従来構成と同一部分には同一符号を付
してある。これらの構成に加え、ここでは、第1の遅延
検波器5と第2の遅延検波器6を設け、しかる上で相互
相関器2の出力を電力変換器4、更にレベル検出器3に
入力させている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of an embodiment of the present invention. Figure 2
The same parts as those in the conventional configuration shown in FIG. 3 are designated by the same reference numerals. In addition to these configurations, here, a first delay detector 5 and a second delay detector 6 are provided, and then the output of the cross-correlator 2 is input to the power converter 4 and the level detector 3. ing.

【0011】この構成において、入力信号R(t)は第
1の遅延検波器5で遅延検波され、(数8)で表される
信号D(t)が出力される。
In this configuration, the input signal R (t) is delay-detected by the first delay detector 5, and the signal D (t) represented by (Equation 8) is output.

【数8】 したがって、時刻t=to +τのとき、R(to +τ)
が(数4)で表されることを考えると、
[Equation 8] Therefore, at time t = t o + τ, R (t o + τ)
Considering that is expressed by (Equation 4),

【数9】 但し、N’(to )は雑音成分を含む項である。[Equation 9] However, N ′ (t o ) is a term including a noise component.

【0012】又、ユニークワード発生器1の出力U
* (τ)も第2の遅延検波器6で遅延検波されW(τ)
が出力される。
The output U of the unique word generator 1
* (Τ) is also delayed and detected by the second differential detector 6 W (τ)
Is output.

【数10】 相互相関器2は、D(t)とW(τ)との相関値C
(t)を出力する。
[Equation 10] The cross-correlator 2 calculates the correlation value C between D (t) and W (τ).
Output (t).

【数11】 これは、t=to のときは、(数9),(数10)よ
り、
[Equation 11] This means that when t = t o , from (Equation 9) and (Equation 10),

【数12】 となり、周波数オフセットωの値に関わらず、その電力
|C(to )|2 は一定である。したがって、相関器2
の出力を電力変換器4で電力に変換した出力は、常に
(ωの値が大きくても)t=to で極大値をとるので、
レベル検出器3でこの極大値を検出することにより信号
を検出し、時刻t=to を知ることができる。
[Equation 12] Therefore, the power | C (t o ) | 2 is constant regardless of the value of the frequency offset ω. Therefore, the correlator 2
Since the output obtained by converting the output of the above into the electric power by the power converter 4 always takes the maximum value at t = t o (even if the value of ω is large),
By detecting this maximum value with the level detector 3, the signal can be detected and the time t = t o can be known.

【0013】[0013]

【発明の効果】以上説明したように本発明は、入力信号
を第1の遅延検波器で遅延検波して周波数オフセットを
除去した上で相関器に入力させているので、入力信号に
大きな周波数不定性があるときでも、従来のように相関
器を多数並列に並べて使用する必要がなくなり、回路規
模を大幅に削減することができる効果がある。又、レベ
ル検出器の入力信号も一つだけとなるので、誤検出確率
が小さくなるという効果がある。
As described above, according to the present invention, the input signal is delayed detected by the first delay detector to remove the frequency offset and then input to the correlator. Even if there is a possibility, it is not necessary to arrange a large number of correlators in parallel as in the conventional case, and it is possible to significantly reduce the circuit scale. Further, since there is only one input signal to the level detector, there is an effect that the false detection probability is reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のユニークワード検出器の一実施例のブ
ロック構成図である。
FIG. 1 is a block diagram of an embodiment of a unique word detector of the present invention.

【図2】従来のユニークワード検出器の一例のブロック
構成図である。
FIG. 2 is a block diagram of an example of a conventional unique word detector.

【図3】従来のユニークワード検出器の他の例のブロッ
ク構成図である。
FIG. 3 is a block diagram of another example of a conventional unique word detector.

【符号の説明】[Explanation of symbols]

1 ユニークワード発生器 2 相互相関器 3 レベル検出器 4 電力変換器 5 第1の遅延検波器 6 第2の遅延検波器 1 Unique Word Generator 2 Cross Correlator 3 Level Detector 4 Power Converter 5 First Delay Detector 6 Second Delay Detector

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 ユニークワードが挿入されている受信信
号を準同期復調した信号を入力信号とし、この入力信号
を遅延検波する第1の遅延検波器と、前記ユニークワー
ドの複素共役値を発生するユニークワード発生器と、こ
のユニークワード発生器の出力を遅延検波する第2の遅
延検波器と、前記第1及び第2の遅延検波器の各出力の
相互相関を取る相互相関器と、この相互相関器の出力を
二乗して電力を求める電力変換器と、この電力変換器の
出力を予め定められたしきい値と比較し、その極大値を
検出するレベル検出器とを備えることを特徴とするユニ
ークワード検出器。
1. A first delay detector for delay-detecting the input signal, which is a signal obtained by quasi-synchronizing demodulation of a received signal in which a unique word is inserted, and a complex conjugate value of the unique word is generated. A unique word generator, a second differential detector for differentially detecting the output of the unique word generator, a cross-correlator for cross-correlating the outputs of the first and second differential detectors, and A power converter that squares the output of the correlator to obtain electric power, and a level detector that compares the output of this power converter with a predetermined threshold value and detects the maximum value thereof. Unique word detector to do.
JP3350652A 1991-07-30 1991-12-12 Unique word detector Pending JPH05167630A (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP3350652A JPH05167630A (en) 1991-12-12 1991-12-12 Unique word detector
AU20663/92A AU656098B2 (en) 1991-07-30 1992-07-29 Carrier frequency error detector capable of accurately detecting a carrier frequency error
CA002074889A CA2074889C (en) 1991-07-30 1992-07-29 Carrier frequency error detector capable of accurately detecting a carrier frequency error
DE69233096T DE69233096T2 (en) 1991-07-30 1992-07-29 Single word detector circuit for use in a coherent demodulator
EP96114081A EP0750411B1 (en) 1991-07-30 1992-07-29 Unique word detector for use in a coherent demodulator
EP92112922A EP0526833B1 (en) 1991-07-30 1992-07-29 Carrier frequency error detector capable of accurately detecting a carrier frequency error
DE69224687T DE69224687T2 (en) 1991-07-30 1992-07-29 Carrier frequency error detector circuit for accurate detection of a carrier frequency error
US07/921,711 US5276710A (en) 1991-07-30 1992-07-30 Carrier frequency error detector capable of accurately detecting a carrier frequency error

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3350652A JPH05167630A (en) 1991-12-12 1991-12-12 Unique word detector

Publications (1)

Publication Number Publication Date
JPH05167630A true JPH05167630A (en) 1993-07-02

Family

ID=18411939

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3350652A Pending JPH05167630A (en) 1991-07-30 1991-12-12 Unique word detector

Country Status (1)

Country Link
JP (1) JPH05167630A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6016329A (en) * 1996-09-27 2000-01-18 Nec Corporation Method and apparatus for preamble-less demodulation
US6088411A (en) * 1996-11-27 2000-07-11 Nec Corporation Method and apparatus for a unique word differential detection and demodulation using the unique word differential detection
JP2007159100A (en) * 2005-11-30 2007-06-21 Samsung Electro Mech Co Ltd Timing estimator in oqpsk demodulator
JP2013046382A (en) * 2011-08-26 2013-03-04 Mitsubishi Electric Corp Radio signal synchronous processing apparatus
JP2017216500A (en) * 2016-05-30 2017-12-07 日本電気株式会社 Signal detector and signal detection method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6016329A (en) * 1996-09-27 2000-01-18 Nec Corporation Method and apparatus for preamble-less demodulation
US6088411A (en) * 1996-11-27 2000-07-11 Nec Corporation Method and apparatus for a unique word differential detection and demodulation using the unique word differential detection
EP0845888A3 (en) * 1996-11-27 2001-01-17 Nec Corporation Method and apparatus for a unique word differential detection and demodulation using the unique word differential detection
JP2007159100A (en) * 2005-11-30 2007-06-21 Samsung Electro Mech Co Ltd Timing estimator in oqpsk demodulator
US7792216B2 (en) 2005-11-30 2010-09-07 Samsung Electro-Mechanics Co., Ltd. Timing estimator in OQPSK demodulator
JP2013046382A (en) * 2011-08-26 2013-03-04 Mitsubishi Electric Corp Radio signal synchronous processing apparatus
JP2017216500A (en) * 2016-05-30 2017-12-07 日本電気株式会社 Signal detector and signal detection method

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