JPH05167474A - Frequency synthesizer - Google Patents

Abstract

PURPOSE:To switch two different frequencies at a high speed without changing a reference frequency. CONSTITUTION:Mixers 23, 24 for frequency conversion are provided in a loop of a frequency synthesizer including a PLL oscillation circuit 21. Then the mixer 24 mixes an output fR+ or -fIF of a voltage controlled oscillator in the PLL oscillation circuit 21 and a carrier fIF to implement frequency conversion. On the other hand, when a switch 22 is opened and no carrier fIF is given, the frequency fR+ or -fIF passes. Moreover, the frequency fR and the carrier fIF are mixed by the mixer 23 to implement the frequency conversion and when no carrier fIF is given, the frequency fR+ or -fIF passes. In this case, the ON/OFF of the carrier fIF fed to the mixers 23, 24 is implemented by the switch 22. Thus, the output frequency of the frequency synthesizer is switched at a high speed only with ON/OFF of the mixers 23, 24 without changing the reference frequency in the PLL loop.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a PLL (Phase Locked).
Loop) type oscillator circuit.

[0002]

2. Description of the Related Art Recently, mobile communication using an on-vehicle telephone, a mobile telephone or the like has been frequently performed. In such mobile communication, for example, a digital time division multiplex communication system is used. In a mobile communication device adopting a digital time division multiplex communication system, a frequency synthesizer composed of a PLL type oscillation circuit is used.

As a conventional mobile communication apparatus of a digital time division multiplex communication system using a frequency synthesizer composed of a PLL type oscillation circuit, for example, one shown in FIG. 4 is known.

In the figure, reference numeral 1 is a transmitting / receiving antenna,
2 is a TX / RX switch for switching between transmission and reception, 3 is a low noise amplifier (LNA) for reception, 4 is a reception mixer (RX-MIX), 5 is a reception intermediate frequency amplifier (IF-
AMP), 6 is a synthesizer for receiving frequency conversion (RX-
PLL), 7 is a carrier generator for transmission quadrature modulation (TX-
PLL), 8 is a transmission power amplification unit (PA), 9 is a transmission quadrature modulation unit (I-Q MOD), and 10 is a transmission quadrature modulation unit 90.
A phase shifter (π / 2 PS).

Further, f _R is a transmission / reception RF frequency, and f _IF is a reception intermediate frequency. The apparatus shown in FIG.
This is an example configured by -Q direct modulation.

At the time of reception, the radio wave received by the antenna 1 (that is, the received RF frequency f _R ) is TX.
-Switched by RX switch 2, amplified by low noise amplifier 3 and sent to reception mixer 4. Then, in the receiving mixer 4, it is mixed with the local oscillation frequency f _R ± f _IF of the receiving frequency converting synthesizer 6 as a local oscillator, and becomes the receiving intermediate frequency f _IF , which is sent to the receiving intermediate frequency amplifier 5 to be amplified. A frequency output IF is obtained.

At the time of transmission, a carrier generated by the transmission quadrature modulation carrier generation section 7 (that is, a carrier for directly modulating at a desired frequency f _R at the time of transmission) is IQ transmitted by the transmission quadrature modulation section 9. It is modulated by the direct modulation data, and at this time, the phase shift is performed based on the output of the 90 ° phase shifter 10 for transmission quadrature modulation. Then, the desired frequency f _R is output from the transmission quadrature modulation unit 9, amplified by the transmission power amplification unit 8, switched by the TX / RX switch 2 and transmitted from the antenna 1.

[0008]

By the way, in the conventional mobile communication device shown in FIG. 4, the local oscillation frequency f _R ± f _IF is used as a local oscillator for converting to the intermediate frequency f _IF at the time of reception. It has two synthesizers: a reception frequency conversion synthesizer (RX-PLL) that is generated, and a transmission quadrature modulation carrier generation unit (TX-PLL) that generates a carrier for direct modulation at a desired transmission frequency f _R. Since it has a configuration, there is no need to switch the frequency between transmission and reception, and there is an advantage that it is suitable for speeding up in principle, but there is a problem that it causes an increase in cost because there are two synthesizers. ..

On the other hand, in order to solve such a problem, for example, there is an apparatus of a system in which the frequency is switched by one synthesizer. This device has a configuration as shown in FIG. 5 (the same components are designated by the same reference numerals), and a single frequency synthesizer (PLL) 11 allows f
A frequency of _R ± f _IF (that is, a local oscillation frequency) is output to the reception mixer 4, and at the time of transmission, a frequency f _R desired to be transmitted is generated and is output to the transmission quadrature modulation unit 9 as a carrier for performing direct modulation. There is. Then, the frequency at the time of reception f _R ±
f _IF and the frequency f _R at the time of transmission are switched in time division.

Here, the timings of the transmission wave and the reception wave in the TDD (time division multiplexing) communication system are shown in FIG. In the example of this figure, transmission and reception are alternately issued, and each frame has slots 1 to n. Then, transmission and reception are performed by this slot. In the time-division multiplex communication system, normally, when n slots are configured as shown in FIG. 6, an n-slot reception frame and an n-slot transmission frame are processed in time series, and Communication devices (eg mobile phones) can
The same slot number is used for transmission and reception.

However, such frame synchronization cannot usually be made too long due to many restrictions. For example, it is about several ms to several tens of ms. Therefore, it becomes necessary to switch the frequency between transmission and reception at high speed.

[0012] For example, a portable telephone for personal communication pursuing portability requires a system that can be made smaller and lighter, and is limited in that frame synchronization cannot be lengthened. As a result, the frame synchronization must be shortened, and the frequency synthesizer cannot operate at high speed (switch between f _R and f _R ± f _IF transmission / reception).

Therefore, an object of the present invention is to provide a frequency synthesizer which can switch two different frequencies at high speed without changing the reference frequency.

[0014]

To achieve the above object, a frequency synthesizer according to the present invention comprises a reference oscillator for oscillating a reference frequency, a first frequency divider for dividing the output of the reference oscillator, a voltage controlled oscillator, and a voltage. A second frequency divider that divides the output of the controlled oscillator, a phase comparator that compares the phases of the first frequency divider and the second frequency divider, and a charge pump circuit that converts the output of the phase comparator into a voltage. In a frequency synthesizer having a PLL type oscillation circuit configured to include a loop filter and a loop filter, the output of the voltage controlled oscillator is mixed with a predetermined mixing frequency to perform frequency conversion. A first mixing means that allows the output of the voltage controlled oscillator to pass when the mixing frequency is not applied; and an output of the first mixing means that is arranged in the loop of the PLL. A constant frequency for mixing is mixed to perform frequency conversion, and second mixing means for allowing the output of the first mixing means to pass when the frequency for mixing is not given, and addition to each of the mixing means. And a switch means for turning on / off a predetermined mixing frequency.

[0015]

According to the present invention, two mixers (mixing means) for frequency conversion are provided in the loop of the frequency synthesizer composed of the PLL type oscillation circuit. Then, the output of the voltage controlled oscillator and the predetermined mixing frequency are mixed by the first mixing means to perform frequency conversion. On the other hand, when the mixing frequency is not given, the output of the voltage controlled oscillator passes.

Further, the output of the first mixing means and the predetermined mixing frequency are mixed by the second mixing means to carry out frequency conversion, and when the mixing frequency is not given, the first mixing is carried out. The output of the means passes through. At this time, the switching means turns on / off the predetermined mixing frequency applied to each mixing means.

Therefore, the output frequency of the frequency synthesizer can be changed at high speed only by turning on / off the mixer (each mixing means) without changing the reference frequency in the PLL loop.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a mobile communication device of a digital time division multiplex communication system to which a frequency synthesizer according to the present invention is applied. In the description of this figure, the same components as those in the conventional example are designated by the same reference numerals, and duplicate description will be omitted.

In FIG. 1, reference numeral 21 is a PLL type oscillation circuit, which oscillates at a predetermined frequency f _R ± f _IF . Reference numeral 22 denotes a switch (switch means) which is turned on at the time of transmission and sends the mixer carrier f _IF (corresponding to a predetermined mixing frequency) to each mixer 23, 24. On the other hand, the switch 22
Turns off during reception, and stops sending the mixer carrier f _IF .

The mixer (MIX.2) 24 (corresponding to the first mixing means) is provided with the PLL type oscillation circuit 21 when the mixer carrier f _IF is supplied from the switch 22 during transmission.
Output frequency f _R ± f _IF and mixer carrier f _IF are mixed to perform frequency conversion, and frequency f _R and frequency f _R
The two signals of −2f _IF are output to the first bandpass filter (BPF 1) 25.

On the other hand, when the supply of the mixer carrier f _IF from the switch 22 is stopped at the time of reception, P
The output frequency f _R ± f _IF of the LL type oscillation circuit 21 is passed as it is and output to the first band pass filter 25.

The first bandpass filter 25 is a bandpass filter that passes only the target frequency. In this example, only the frequency f _R and the frequencies f _R ± f _IF are passed and output to the buffer 26. There is.

The buffer 26 buffer-amplifies and passes the output from the first bandpass filter 25, and outputs it at the frequency f.
_R for transmission quadrature modulation unit 9 and 90 ° for transmission quadrature modulation
The frequency is supplied to the phase shifter 10 and also supplied to the reception mixer 4 as the frequency f _R ± f _IF . Moreover, each of these frequencies f _R
And frequency f _R ± f _IF to mixer (MIX.1) 23
(Corresponding to the second mixing means).

When the mixer carrier f _IF is supplied from the switch 22 at the time of transmission, the mixer 23 mixes the output frequency f _R of the buffer 26 and the mixer carrier f _IF to perform frequency conversion, and the frequency f _R ± The signal of f _IF is output to the second band pass filter (BPF 2) 27.

On the other hand, when the supply of the mixer carrier f _IF from the switch 22 is stopped at the time of reception, the output frequency f _R ± f _IF from the buffer 26 is passed as it is and output to the second band pass filter 27. To do.

The second bandpass filter 27 is a bandpass filter that passes only the target frequency, and in this example, only the frequency f _R ± f _IF passes and the PLL type oscillation circuit 2
Output to 1. The signal loop described above constitutes a PLL loop.

Next, the PLL type oscillation circuit 21 will be described. The detailed configuration of the PLL oscillator circuit 21 is shown in FIG. In FIG. 2, the PLL type oscillation circuit 21 includes a reference oscillator 31, a 1 / M frequency divider (first frequency divider) 32, 1
/ N frequency divider (second frequency divider) 33, voltage controlled oscillator (VCO) 34, phase comparator 35, charge pump circuit 36 and loop filter (LPF) 37.
Composed by.

The reference oscillator 31 oscillates a reference frequency and
The / M frequency divider 32 divides the output of the reference oscillator 31 by 1 / M. The 1 / N frequency divider 33 frequency-divides the output from the second bandpass filter 27 by 1 / N. The phase comparator 35 compares the phases of the outputs of the 1 / M frequency divider 33 and 1 / N frequency divider 34 and outputs the difference to the charge pump circuit 36,
The charge pump circuit 36 converts the output from the phase comparator 35 into a voltage.

The loop filter 37 is a low pass filter.
Yes, by limiting the output band of the charge pump circuit 36
Output to the voltage controlled oscillator 34. To the loop filter 37
Therefore, the response characteristic of the frequency synthesizer is determined. Electric
The pressure controlled oscillator 34 has a frequency f R ± f_IFOscillate the signal of
Output to the mixer (MIX.2) 24.

Next, the operation of this embodiment will be described.
FIG. 3 is a state transition diagram of output frequencies of the reception block and the transmission block during transmission and reception. The details of the operation will be described with reference to this figure. At the time of reception First, from the time of reception, the switch 22 is received at the time of reception.
Turns off. Therefore, the mixer carrier f _IF is not added to the mixers 23, 24, and
Does not perform frequency conversion operation.

Therefore, the carrier f generated in the voltage controlled oscillator (V.C.O.) 34 of the PLL type oscillation circuit 21.
_R ± f _IF passes through the mixer 24 as it is and is sent to the first bandpass filter 25, and also passes through the first bandpass filter 25 and passes through the buffer 26 to the frequency f.
_The signal is supplied to the reception mixer 4 as _R ± f _IF , passes through the mixer 23 and the second band pass filter 27, and is added to the 1 / N frequency divider 33 of the PLL oscillator circuit 21. FIG. 3 shows that the frequency is treated as f _R ± f _IF in all parts of the reception block.

In the PLL type oscillation circuit 21, 1 / N
Carrier f from voltage controlled oscillator 34 is generated by frequency divider 33.
_R ± f _IF is _divided into integers (N), and the 1 / N divided frequency and the 1 / M divided frequency of the reference frequency are compared by the phase comparator 35, and the charge pump circuit 36
After being converted into an error signal by, the band thereof is limited by the loop filter 37 and applied to the control terminal of the voltage controlled oscillator 34.

Here, in order to make the explanation easy to understand, P
As the oscillation frequency of the LL type oscillation circuit 21, for example, f _R −
Take the case of selecting f _IF as an example. That is, when the reference frequency is selected so that the oscillation frequency of the PLL oscillator circuit 21 becomes f _R −f _IF , the closed loop causes f _R −
It operates as a frequency synthesizer that oscillates at the frequency of f _IF .

Then, the oscillation frequency f _R -f _IF of this frequency synthesizer is supplied as a carrier to the receiving mixer 4 via the buffer 26, mixed with the signal amplified by the low noise amplifier 3 in the receiving mixer 4, and received intermediately. After being converted to the frequency f _IF , this intermediate frequency output IF
The received signal processing for

[0035] During transmission then, to describe the operation at the time of transmission, at the time of reception as described above is oscillating the loop is locked to the frequency of f _R -f _IF. Here, for example, when the n-th slot of the received frame is completed as shown in FIG. 6, it is necessary to shift the frequency in the period leading up to the n-th slot of the next transmission frame from f _R -f _IF to f _R, present In this example, PL
The switch 22 is turned on without changing the reference frequency of the L-type oscillator circuit 21. As a result, the mixer carrier f _IF is added to the mixers 23 and 24, and the mixers 23 and 24 perform the frequency conversion operation.

First, the mixer 24 has been outputting the carrier f _R -f _IF until now, but this time, the frequency f _R -f is output.
_{The product of IF} and frequency f _IF , that is, n × [f _R −
f _IF ] ± m [f _IF ] is output.

[0037] Of _{this, [f R -f IF] +} [f IF] = f R
Is extracted by the first band-pass filter 25, and is supplied to the transmission quadrature modulation unit 9 and the transmission quadrature modulation 90 ° phaser 10 of the transmission block via the buffer 26. This allows transmission at the frequency f _R. Up to this point, the process of using the frequency f _R is shown in FIG.

When the output f _R of the first band pass filter 25 is sent to the PLL type oscillation circuit 21 as it is, the input to the phase comparator 35 is changed from the frequency f _R -f _IF to the frequency f _R.
Since the PLL lock state is released, the frequency f _{R is changed} to the frequency f _R −f in the present embodiment.
_The process of returning to _IF is performed again.

This series of operations is performed by the mixer 23 and the second
Band pass filter 27. That is, the frequency f _R fetched from the buffer 26 is mixed again by the mixer 23 (n × [f _R ] ± m
[Processing of [f _IF ]) and then sent to the second band pass filter 27 to _extract only the frequency f _R −f _IF and add it to the PLL oscillator circuit 21 (see the state transition diagram of FIG. 3). ).

At this time, the PLL type oscillation circuit 21, the PLL
Focusing on the loop filter 37 and the voltage controlled oscillator 34 in the type oscillation circuit 21, the frequency is constant at f _R −f _IF in both transmission and reception. That is, P
Frequency input to the LL-type oscillator circuit 21 is f _R -f _IF becomes, its state does not change.

The frequency change during transmission / reception responds to the ON / OFF operation of the switch 22, and the mixers 23, 2
It is performed only by the operation of 4. Therefore, frequency switching between transmission and reception in a mobile communication device (for example, a mobile phone) can be executed at a very high speed. In the above, the output frequency of the PLL type oscillation circuit 21 is f _R −.
is an example of f _IF, it is possible to output frequency to obtain the same effect even in the case of f _R + f _IF.

Incidentally, if the conventional operation is followed, the reference frequency applied to the PLL type oscillation circuit 21 is changed, and after a response time determined by the characteristic of the loop filter 37, the transmission state is entered. However, usually
It is difficult to shorten this time (transition time to transmission). On the other hand, in the case of the present embodiment, this transition time can be set to almost zero, and the frequency change to the transmitting side can be performed very quickly.

The frequency synthesizer according to the present invention is not limited to the mobile communication device, but can be applied to any device that needs to change the frequency at high speed.

[0044]

According to the present invention, two mixers (mixing means) for frequency conversion are provided in the loop of the frequency synthesizer composed of the PLL type oscillating circuit, and a predetermined mixing frequency to be added to each mixing means is provided. Since the on / off is performed by the switch means, the output frequency of the frequency synthesizer can be changed at high speed only by turning on / off each mixing means without changing the reference frequency in the PLL loop.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a mobile communication device of a digital time division multiplex communication system to which a frequency synthesizer according to the present invention is applied.

FIG. 2 is a block diagram showing a configuration of a PLL oscillator circuit of the same embodiment.

FIG. 3 is a state transition diagram of an output frequency during transmission / reception in the example.

FIG. 4 is a block diagram showing a configuration of an example of a conventional mobile communication device of a digital time division multiplex communication system.

FIG. 5 is a block diagram showing the configuration of another example of a conventional mobile communication device of a digital time division multiplex communication system.

FIG. 6 is a diagram showing timings of a transmission wave and a reception wave in a TDD (Time Division Multiplexing) communication system.

[Explanation of symbols]

1 Antenna for transmission / reception 2 TX / RX switch 3 Low noise amplifier (LNA) for reception 4 Reception mixer (RX-MIX) 5 Reception intermediate frequency amplifier (IF-AMP) 8 Transmission power amplification section (PA) 9 Transmission quadrature modulation section (I-Q MOD) 10 90 ° phase shifter for transmission quadrature modulation (π / 2 P.
S. 21 PLL type oscillation circuit 22 Switch (switch means) 23 Mixer (MIX.1) (second mixing means) 24 Mixer (MIX.2) (first mixing means) 25 First bandpass filter (B. P.F.1) 26 buffer 27 second bandpass filter (B.P.F.2) 31 reference oscillator 32 1 / M frequency divider (first frequency divider) 33 1 / N frequency divider ( Second frequency divider) 34 Voltage controlled oscillator (V.C.O.) 35 Phase comparator 36 Charge pump circuit 37 Loop filter (L.P.F.)

Claims (1)

[Claims] 1. A reference oscillator that oscillates a reference frequency, a first divider that divides the output of the reference oscillator, a voltage-controlled oscillator, a second divider that divides the output of the voltage-controlled oscillator, and a first divider. Frequency synthesizer having a PLL type oscillator circuit including a phase comparator for comparing the phases of the frequency divider and the second frequency divider, a charge pump circuit for converting the output of the phase comparator into a voltage, and a loop filter In which the output of the voltage controlled oscillator is mixed with a predetermined mixing frequency to perform frequency conversion, and when the mixing frequency is not given, the output of the voltage controlled oscillator Is disposed in the loop of the PLL for mixing the output of the first mixing unit and a predetermined mixing frequency to perform frequency conversion, and the mixing frequency. Is provided, second mixing means for allowing the output of the first mixing means to pass therethrough, and switch means for turning on / off a predetermined mixing frequency applied to each of the mixing means are provided. A characteristic frequency synthesizer.