JPH05166875A - Semiconductor device by tape-carrier system - Google Patents

Semiconductor device by tape-carrier system

Info

Publication number
JPH05166875A
JPH05166875A JP32786391A JP32786391A JPH05166875A JP H05166875 A JPH05166875 A JP H05166875A JP 32786391 A JP32786391 A JP 32786391A JP 32786391 A JP32786391 A JP 32786391A JP H05166875 A JPH05166875 A JP H05166875A
Authority
JP
Japan
Prior art keywords
organic base
tab
base material
bare chip
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32786391A
Other languages
Japanese (ja)
Inventor
Fumiyasu Kaneyama
文泰 兼山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP32786391A priority Critical patent/JPH05166875A/en
Publication of JPH05166875A publication Critical patent/JPH05166875A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain the title semiconductor device wherein a crosstalk noise is reduced, a transmission loss is reduced and it is possible to prevent the operating trouble such as the malfunction or the like of a bare chip IC from being caused by a method wherein organic base materials are applied to both faces of a conductor layer for grounding use, TAB leads are wired alternately on one side each at their outside and zigzag connections are formed. CONSTITUTION:A bare chip IC 1 is arranged in the center whose circumference has been surrounded, by keeping a prescribed interval, by a TAB tape which is composed of the following: tapelike organic base materials 10, 11 composed of a polyimide or the like; and a plurality of TAB leads 12, 13 which have been applied to faces of the organic base materials and which have been formed of a copper foil by an etching operation. Inner sides of the individual TAB leads 12, 13 are connected to a plurality of terminals for the bare chip IC 1. In a semiconductor device by a tape carrier system, the organic base materials 10, 11 are applied to both faces of a conductor layer 9 for grounding use, the TAB leads 12, 13 are wired alternately on one side each of the organic base materials 10, 11 at the outside and zigzag connections are formed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ポリイミド等によるテ
ープ状の絶縁フィルムと、そのフィルム上に付けられ、
エッチングによって銅箔から形成されたリードフレーム
とから成るテープキャリア方式の半導体装置に関する。
BACKGROUND OF THE INVENTION The present invention relates to a tape-shaped insulating film made of polyimide or the like, and attached on the film.
The present invention relates to a tape carrier type semiconductor device including a lead frame formed of copper foil by etching.

【0002】[0002]

【従来の技術】図4は従来の高周波用テープキャリア
(TAB)方式の半導体装置の構造図であり、(a)に
上面図を、(b)に上面図のa−a線断面図を、(c)
に上面図のb−b線断面図を示している。図において、
1は矩形型のベアチップICであり、それぞれ4辺の縁
端部には上面より突出させた複数個のバンプ2を有して
いる。
2. Description of the Related Art FIG. 4 is a structural view of a conventional high frequency tape carrier (TAB) type semiconductor device, in which (a) is a top view and (b) is a cross-sectional view taken along the line aa of the top view. (C)
A cross-sectional view taken along the line bb of the top view is shown in FIG. In the figure,
Reference numeral 1 denotes a rectangular bare chip IC, each of which has a plurality of bumps 2 protruding from the upper surface at the edge portions of four sides.

【0003】3はこのベアチップIC1を取り囲むよう
にして配置されているポリイミド等から成る有機基材で
あり、ベアチップIC1の周囲から所定間隔を確保した
位置で、かつ前記バンプ2の上端と有機基材3の上面が
ほぼ同一面となるように配置されている。4はこの有機
基材3上に形成された複数本のTABリードで、これら
各TABリード4はそれぞれベアチップIC1の周囲の
各辺から直角に複数本づつ外側の有機基材3方向へと延
在するようにして所定の間隔で配列して形成されてい
て、そのインナー側が前記バンプ2を介してベアチップ
IC1に接続している。
Reference numeral 3 denotes an organic base material made of polyimide or the like arranged so as to surround the bare chip IC1, at a position where a predetermined distance is secured from the periphery of the bare chip IC1, and the upper end of the bump 2 and the organic base material. 3 are arranged so that their upper surfaces are substantially flush with each other. Reference numeral 4 denotes a plurality of TAB leads formed on the organic base material 3, and each of the TAB leads 4 extends from each side around the bare chip IC1 at right angles to the outer organic base material 3 direction. Thus, the inner side is connected to the bare chip IC1 via the bumps 2.

【0004】5は前記有機基材3の中央に設けられたデ
バイスホールであり、その中心に前記ベアチップIC1
が配置されていて、上述したような半導体装置の構造と
なる。6は前記有機基材3上のTABリード4の該有機
基材3との接合面との反対側、つまり図(b)及び
(c)に示す如く下面側に一面に形成された導体層であ
り、この導体層6はグランド用導体として使用され、前
記有機基材3を上下に貫通して形成されたヴィア導体7
によって前記TABリード4のうちの一本のグランド用
TABリード4aと接続している。
Reference numeral 5 denotes a device hole provided at the center of the organic base material 3, and the bare chip IC 1 is provided at the center thereof.
Are arranged to form the structure of the semiconductor device as described above. Reference numeral 6 denotes a conductor layer formed on the opposite side of the bonding surface of the TAB lead 4 on the organic base material 3 to the organic base material 3, that is, on the lower surface side as shown in FIGS. The conductor layer 6 is used as a ground conductor, and the via conductor 7 is formed by vertically penetrating the organic base material 3.
Is connected to one of the TAB leads 4 for ground TAB lead 4a.

【0005】このような構造によるTABリード4と有
機基材3、導体層6とによってマイクロストリップライ
ン構造が形成され、高速信号伝送用のテープキャリア方
式の半導体装置としている。
A microstrip line structure is formed by the TAB lead 4, the organic base material 3, and the conductor layer 6 having such a structure, and a tape carrier type semiconductor device for high speed signal transmission is obtained.

【0006】[0006]

【発明が解決しようとする課題】しかしながら上述した
構造による従来装置で、TABリードの高密度配線を行
ったり、あるいはこのTABリードにより高速信号伝送
をおこなった場合には、該TABリード間の配線ピッチ
が狭いために、隣合うTABリード間において、互いの
TABリードが近接することで生じる目的外の電気容量
によってクロストークノイズが大きくなる恐れがあり、
このクロストークノイズによってベアチップICを誤動
作させてしまうという問題がある。
However, in the conventional device having the above-mentioned structure, when high density wiring of TAB leads is performed or high-speed signal transmission is performed by the TAB leads, the wiring pitch between the TAB leads is increased. Since the TAB lead is narrow, crosstalk noise may increase due to unintended capacitance between adjacent TAB leads due to the proximity of the TAB leads.
This crosstalk noise causes a problem that the bare chip IC malfunctions.

【0007】また、前記高密度配線によるクロストーク
ノズ発生を防止するためにはTABリードの幅を狭くす
れば、互いのTABリード間を広げることができ、クロ
ストークノイズを防止することはできるが、このように
TABリードの幅を狭くすると、こんどはTABリード
による伝送損失が多くなってしまい、伝送障害によるベ
アチップICの誤動作あるいはベアチップICが動作し
ないという問題が生じていた。
Further, in order to prevent the occurrence of crosstalk nose due to the high-density wiring, if the width of the TAB leads is narrowed, the space between the TAB leads can be widened and the crosstalk noise can be prevented. However, if the width of the TAB lead is narrowed in this way, the transmission loss due to the TAB lead increases, and there is a problem that the bare chip IC malfunctions or the bare chip IC does not operate due to a transmission failure.

【0008】本発明は上述した問題点を解決するために
なされたものであり、複数本あるTABリード間の互い
の配線ピッチが狭いことで大きくなるクロストークノイ
ズを少なくし、かつTABリード幅が狭いことで生じる
伝送損失を少なくして、ベアチップICの誤動作や動作
しないような動作障害を発生させることのない、信頼性
ある動作性能を備えたテープキャリア方式の半導体装置
を提供することを目的とするものである。
The present invention has been made to solve the above-mentioned problems, and reduces crosstalk noise which is increased due to the narrow wiring pitch between a plurality of TAB leads, and the TAB lead width is reduced. An object of the present invention is to provide a tape carrier type semiconductor device having a reliable operation performance in which the transmission loss caused by the narrowness is reduced and the malfunction or the operation failure such as the bare chip IC does not occur. To do.

【0009】[0009]

【課題を解決するための手段】上述した目的を達成する
ため本発明は、ポリイミド等から成るテープ状の有機基
材と、この有機基材面に付けられエッチングによって銅
箔から形成された複数本のTABリードとから成るTA
Bテープにより所定の間隙を開けて周囲を取り囲んだ中
央にベアチップICを配し、このベアチップICの複数
の端子に前記各TABリードのインナー側を接続して成
るテープキャリア方式の半導体装置において、グランド
用の導体層の両面に前記有機基材を鋏み付け、かつその
有機基材のさらに外側に前記TABリードを該有機基材
の片面づつに交互に配線して千鳥配線としたものであ
る。
In order to achieve the above-mentioned object, the present invention is directed to a tape-shaped organic base material made of polyimide or the like and a plurality of tape-shaped organic base materials formed on a surface of the organic base material by etching. TA consisting of the TAB lead
In a tape carrier type semiconductor device in which a bare chip IC is arranged in the center surrounding the periphery with a predetermined gap by B tape and the inner side of each TAB lead is connected to a plurality of terminals of the bare chip IC, The organic base material is scissored on both sides of the conductor layer for use, and the TAB leads are alternately arranged on the outer side of the organic base material on each side of the organic base material to form a staggered wiring.

【0010】[0010]

【作用】上述した構成によれば、ベアチップICの端子
の配列に応じて、所定ピッチに配線されるTABリード
を、グランド用導体の両面に形成された有機基材に、該
有機基材の両面に交互に千鳥配線するので、各TABリ
ードの配線ピッチは広がり、約2倍の広さに確保される
ことになる。
According to the above-mentioned structure, the TAB leads, which are wired at a predetermined pitch according to the arrangement of the terminals of the bare chip IC, are provided on the organic base material formed on both sides of the ground conductor on both sides of the organic base material. Since the staggered wirings are alternately arranged, the wiring pitch of each TAB lead is widened, and the width is ensured to be about twice as large.

【0011】従って、複数本あるTABリード間の互い
の配線ピッチが狭いことで大きくなるクロストークノイ
ズの発生が抑制され、ベアチップICの誤動作や動作し
ない等の動作障害の発生を防止する。
Therefore, the occurrence of crosstalk noise, which is increased due to the narrow wiring pitch between the plurality of TAB leads, is suppressed, and the occurrence of malfunction such as malfunction or non-operation of the bare chip IC is prevented.

【0012】[0012]

【実施例】以下、本発明の一実施例を図面を用いて説明
する。図1は第1の実施例を示す半導体装置の構造図で
あり、同図(a)は上面図を、(b)は上面図のc−c
線断面図、(c)はd−d線断面図を、それぞれ示して
いる。なお、第1の実施例においては、図1に示すよう
に、ベアチップIC1の周囲を取り囲んでいるTABテ
ープの構造を、グランド用の導体層を中層に、またこの
グランド用導体層の上下面に誘電体層(有機基材)を持
ち、かつこの誘電体層の上下面にTABリードから成る
導体層を形成した5層構造としている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1A and 1B are structural views of a semiconductor device showing a first embodiment. FIG. 1A is a top view and FIG. 1B is a top view cc.
A line sectional view, (c) shows a dd line sectional view, respectively. In addition, in the first embodiment, as shown in FIG. 1, the structure of the TAB tape surrounding the bare chip IC1 is applied to the middle conductor layer for ground and the upper and lower surfaces of the conductor layer for ground. It has a five-layer structure having a dielectric layer (organic base material), and conductor layers composed of TAB leads formed on the upper and lower surfaces of this dielectric layer.

【0013】図1において、1はベアチップIC、2は
バンプで、これらは従来とほぼ同様のものであるので、
従来と同一の符号を付し、その説明は省略する。9はグ
ランド用の導体層、10と11はこの導体層9が中層と
なるように、該導体層9の上下面を一面覆うようにして
積層している誘電体としての有機基材である。そして、
有機基材10と11面には、図1(a)及び(b)に示
すように、該有機基材10と11面に接触して積層する
ようにして導体層としてのTABリード12及び13が
形成されており、これらTABリード12及び13はそ
れぞれが交互に前記有機基材10と11面に接するよう
に積層されている。つまり、図1によればTABリード
12は導体層9を境にして上面側にある有機基材10面
に、そしてTABリード13は下面側にある有機基材1
1に接するようにして配置されている。これによって、
導体層9を挟み付けた有機基材10と11は、所定間隔
で配列された複数本のTABリード12及び13により
交互に上下から挟みこまれることになり、各TABリー
ド12及び13は、有機基材10と11面においてそれ
ぞれ隣接するTABリードとの間隔を広げている。
In FIG. 1, 1 is a bare chip IC, 2 is a bump, and these are almost the same as the conventional ones.
The same reference numerals as in the conventional art are given and the description thereof is omitted. Reference numeral 9 is a ground conductor layer, and 10 and 11 are organic base materials as dielectrics that are laminated so that the conductor layer 9 serves as an intermediate layer and covers the upper and lower surfaces of the conductor layer 9. And
As shown in FIGS. 1A and 1B, TAB leads 12 and 13 as conductor layers are formed on the surfaces of the organic base materials 10 and 11 so as to be in contact with and laminated on the surfaces of the organic base materials 10 and 11. The TAB leads 12 and 13 are laminated so that the TAB leads 12 and 13 are alternately in contact with the surfaces of the organic base materials 10 and 11, respectively. That is, according to FIG. 1, the TAB lead 12 is on the upper surface of the organic base material 10 with the conductor layer 9 as a boundary, and the TAB lead 13 is on the lower surface side of the organic base material 1.
It is arranged so as to contact with 1. by this,
The organic base materials 10 and 11 with the conductor layer 9 sandwiched therebetween are alternately sandwiched from above and below by a plurality of TAB leads 12 and 13 arranged at a predetermined interval, and each TAB lead 12 and 13 is made of organic material. The space between adjacent TAB leads on the surfaces of the base materials 10 and 11 is widened.

【0014】そのため、TABリード12及び13のリ
ード幅は、それぞれ有機基材10と11との接触部分で
広く、それ以外では狭くなっており、広くなった部分に
よってTABリード12及び13での伝送損失を低減さ
せている。そして、このTABリード12及び13のイ
ンナー側が、Au等から成るバンプ2を介してデバイス
ホール5内のベアチップIC1の電極に接続している。
Therefore, the lead widths of the TAB leads 12 and 13 are wide at the contact portions with the organic base materials 10 and 11, respectively, and are narrow at other portions, and the widened portions cause transmission at the TAB leads 12 and 13. It reduces the loss. The inner sides of the TAB leads 12 and 13 are connected to the electrodes of the bare chip IC 1 in the device hole 5 via the bumps 2 made of Au or the like.

【0015】また、導体層9の電位をグランドにするた
め、TABリード12または13のうちの一本のグラン
ド用TABリード13aを、導体層9の下面側に位置す
る有機基材11を貫通させて設けたヴィア導体14を介
して導体層9に接続させ、これにより導体層9とグラン
ド用TABリード13aとを同電位にしている。ここ
で、先に述べた導体層9、有機基材10と11、並びに
TABリード12及び13とにより構成されるTABテ
ープ8の製造工程を示す。
In order to set the potential of the conductor layer 9 to the ground, one of the TAB leads 12 or 13 for grounding the TAB lead 13a is penetrated through the organic base material 11 located on the lower surface side of the conductor layer 9. The conductor layer 9 and the ground TAB lead 13a are connected to each other through the via conductor 14 provided as above, so that the conductor layer 9 and the ground TAB lead 13a have the same potential. Here, a manufacturing process of the TAB tape 8 including the conductor layer 9, the organic base materials 10 and 11, and the TAB leads 12 and 13 described above will be described.

【0016】図2(a)〜(p)は、導体層が3層、誘
導体層が2層のTABテープ8の製造工程を示す説明図
であり、以下に手順を説明する。まず、(a)はポリイ
ミド等から成る有機基材11の側面を示しており、図に
見られるように水平に支持する。この状態の有機基材1
1の上面に、(b)に示すようにメッキまたは、スパッ
タによりカレントフィルム15を形成する。続いて、
(c)で、カレントフィルム15上にレジストフィルム
16をラミネートし、このレジストフィルム16上に
(d)で露光,現像して、(e)でメッキによりグラン
ド用導体層17を形成する。そして、(f)で、前記レ
ジストフィルム16とカレントフィルム15の不要部を
除去する。
2 (a) to 2 (p) are explanatory views showing a manufacturing process of the TAB tape 8 having three conductor layers and two dielectric layers, and the procedure will be described below. First, (a) shows the side surface of the organic base material 11 made of polyimide or the like, which is supported horizontally as shown in the figure. Organic substrate 1 in this state
A current film 15 is formed on the upper surface of 1 by plating or sputtering as shown in (b). continue,
In (c), a resist film 16 is laminated on the current film 15, exposed and developed in (d) on the resist film 16, and a ground conductor layer 17 is formed by plating in (e). Then, in (f), unnecessary portions of the resist film 16 and the current film 15 are removed.

【0017】次に、(g)では有機基材11とグランド
用導体層17上に2層目の有機基材10をコーティング
し、(h)でこの有機基材10上にレジストフィルム1
6をラミネートし、(i)で露光,現像して、(j)で
有機基材10及び11のエッチングを行い、有機基材1
0と11を貫通するデバイスホール18と、そして有機
基材10を導体層9まで達するヴィアホール19を形成
する。
Next, in (g), the second layer of the organic base material 10 is coated on the organic base material 11 and the ground conductor layer 17, and in (h), the resist film 1 is formed on the organic base material 10.
6 is laminated, exposed and developed in (i), and the organic base materials 10 and 11 are etched in (j).
A device hole 18 penetrating 0 and 11 and a via hole 19 reaching the organic base material 10 to the conductor layer 9 are formed.

【0018】この後、(k)でレジストフィルム16を
除去し、デバイスホール18に裏止め剤20を注入す
る。裏止め剤20はポリイミド系またはポリアミド系の
特定の溶剤に溶け易く、寸法精度の良い材料を用いる。
(l)で、この裏止め剤20を塞ぐように、有機基材1
0の上面側と有機基材11の下面側に、メッキまたはス
パッタによりカレントフィルム15を形成し、さらに
(m)で、このカレントフィルム15を覆うようにして
レジストフィルム16をラミネートする。これを(n)
で露光,現像し、(o)にて、銅メッキを行いグランド
用TABリード21,信号用TABリード22,ヴィア
導体23を形成する。
After that, the resist film 16 is removed in (k), and the backing agent 20 is injected into the device hole 18. The backing agent 20 is made of a material that is easily dissolved in a specific polyimide-based or polyamide-based solvent and has high dimensional accuracy.
In (l), the organic base material 1 is formed so as to cover the backing agent 20.
A current film 15 is formed on the upper surface side of 0 and the lower surface side of the organic base material 11 by plating or sputtering, and the resist film 16 is laminated so as to cover the current film 15 in (m). This is (n)
Then, the substrate is exposed and developed by (1) and copper plating is performed at (o) to form a ground TAB lead 21, a signal TAB lead 22, and a via conductor 23.

【0019】そして、最後の(p)では、前記(m)で
ラミネートしたレジストフィルム16と、該レジストフ
ィルム16の下の前記(l)で形成したカレントフィル
ム15を除去して、裏止め剤20を除去すると、導体層
が3層で誘電体層が2層計5層のTABテープ8を製造
することができる。このようにして製造したTABテー
プ8を、図1に示すTABリード12及び13のよう
に、そのインナー側リードつまりベアチップIC1側
は、該ベアチップIC1のバンプ2に接続し易くなるよ
うに曲げ加工し、またそのアウター側リードは、図示せ
ぬプリント基板等に接続し易くなるように曲げ加工す
る。
Then, in the final step (p), the resist film 16 laminated in the step (m) and the current film 15 formed in the step (l) below the resist film 16 are removed to remove the backing agent 20. By removing, the TAB tape 8 having three conductor layers and two dielectric layers, that is, five layers in total, can be manufactured. The TAB tape 8 manufactured in this manner is bent so that its inner side lead, that is, the bare chip IC1 side, is bent like the TAB leads 12 and 13 shown in FIG. 1 so as to be easily connected to the bump 2 of the bare chip IC1. The outer side leads are bent so that they can be easily connected to a printed circuit board (not shown).

【0020】また、図3は本発明の第2の実施例を示す
半導体装置の構造図であり、同図(a)は上面図、
(b)は上面図のe−e線断面図である。この図に見ら
れるように、第2の実施例ではグランド用導体層9を挟
んで積層された有機基材10と11上に、TABリード
12及び13が前記第1の実施例とほぼ同様にして、有
機基材10と11の表裏に交互に積層させて千鳥配線と
しているので、この有機基材10と11上では、互いの
TABリード12あるいはTABリード13間の配線ピ
ッチが、千鳥配置しない場合、つまり従来の配線ピッチ
と比べて、約2倍以上に広くとることができる。
FIG. 3 is a structural view of a semiconductor device showing a second embodiment of the present invention. FIG. 3 (a) is a top view,
(B) is a sectional view taken along the line ee of the top view. As shown in this figure, in the second embodiment, the TAB leads 12 and 13 are formed on the organic base materials 10 and 11 which are laminated with the conductor layer 9 for ground interposed therebetween in substantially the same manner as in the first embodiment. Since the organic base materials 10 and 11 are alternately laminated on the front and back to form a zigzag wiring, the wiring pitch between the TAB leads 12 or the TAB leads 13 on the organic base materials 10 and 11 is not staggered. In this case, that is, the wiring pitch can be set to be twice as wide as the conventional wiring pitch.

【0021】つまり、第1の実施例においては、TAB
リード12及び13のリード幅を、伝送損失を押さえる
ために広くしているが、上記第2の実施例では隣接する
互いのリード間の間隙を従来の2倍にできるようにして
いる。そこで、この広くなった同一の有機基材上のTA
Bリード間、つまり有機基材10上のTABリード12
間、あるいは有機基材11上のTABリード13間に、
高周波用のICに不可欠な信号入出力線の終端用抵抗体
24を設けている。また、25は抵抗体24の一端を接
続するグランド用電極である。
That is, in the first embodiment, TAB
The lead widths of the leads 12 and 13 are made wide in order to suppress the transmission loss, but in the second embodiment, the gap between adjacent leads can be doubled from the conventional one. Therefore, this expanded TA on the same organic substrate
Between the B leads, that is, the TAB leads 12 on the organic substrate 10.
Or between the TAB leads 13 on the organic base material 11,
A terminating resistor 24 for a signal input / output line, which is indispensable for a high frequency IC, is provided. Reference numeral 25 is a ground electrode that connects one end of the resistor 24.

【0022】このような構造とすることにより、終端用
抵抗体24とベアチップIC1の電極間の配線長は短く
なり、高周波信号伝送に対して有益になる。
With such a structure, the wiring length between the terminating resistor 24 and the electrode of the bare chip IC1 is shortened, which is useful for high frequency signal transmission.

【0023】[0023]

【発明の効果】以上説明したように本発明によれば、ポ
リイミド等から成るテープ状の有機基材と、この有機基
材面に付けられエッチングによって銅箔から形成された
複数本のTABリードとから成るTABテープにより所
定の間隙を開けて周囲を取り囲んだ中央にベアチップI
Cを配し、このベアチップICの複数の端子に前記各T
ABリードのインナー側を接続して成るテープキャリア
方式の半導体装置において、グランド用の導体層の両面
に前記有機基材を鋏み付け、かつその有機基材のさらに
外側に前記TABリードを該有機基材の片面づつに交互
に配線して千鳥配線とすることとした。
As described above, according to the present invention, a tape-shaped organic base material made of polyimide or the like, and a plurality of TAB leads formed on the surface of the organic base material by etching and formed from copper foil are provided. A bare chip I is formed in the center surrounded by a predetermined gap with a TAB tape made of
C is arranged, and each of the Ts is connected to a plurality of terminals of this bare chip IC.
In a tape carrier type semiconductor device in which the inner side of an AB lead is connected, the organic base material is scissored on both sides of a conductor layer for ground, and the TAB lead is provided outside the organic base material. It was decided to wire alternately on each side of the material to make staggered wiring.

【0024】このため、前記TABリード間の配線ピッ
チは従来の約2倍に広くなるので、高密度配線を行った
り、あるいは高速信号伝送を行っても、隣合うTABリ
ード間におけるクロストークノイズの発生を抑制するこ
とができ、その結果ベアチップICの誤動作や動作しな
い等というような動作障害を防止することができること
になる。
For this reason, the wiring pitch between the TAB leads is about twice as wide as that of the conventional one, so that crosstalk noise between adjacent TAB leads can be generated even if high-density wiring is performed or high-speed signal transmission is performed. Occurrence can be suppressed, and as a result, it is possible to prevent malfunction such as malfunction or non-operation of the bare chip IC.

【0025】また、前記TABリードの有機基材に接し
ている部分の幅を、有機基材に接していない部分の幅よ
りも広くすると、伝送損失を押さえることができ、伝送
障害によるベアチップICの誤動作等を防止することが
できる。さらに、前記千鳥配線とすることで隣接するT
ABリード間が広くなったTABリード間の間隙に、信
号終端用の抵抗体を設けたことで、ベアチップICの電
極近傍で信号終端することが可能となり、そのため、ベ
アチップICの誤動作や動作しないというような動作障
害の発生を防止し、信頼性あるテープキャリア方式の半
導体装置を提供することができる。
If the width of the portion of the TAB lead that is in contact with the organic base material is made wider than the width of the portion that is not in contact with the organic base material, transmission loss can be suppressed and the bare chip IC due to transmission failure can be suppressed. It is possible to prevent malfunctions and the like. Furthermore, by using the zigzag wiring, the adjacent T
By providing a resistor for terminating the signal in the gap between the TAB leads where the AB leads are widened, it is possible to terminate the signal in the vicinity of the electrodes of the bare chip IC. Therefore, the bare chip IC malfunctions or does not operate. It is possible to provide a reliable tape carrier semiconductor device that prevents the occurrence of such an operation failure.

【図面の簡単な説明】[Brief description of drawings]

【図1】第1の実施例を示すテープキャリア方式の半導
体装置の構造図であり、同図(a)は上面図を、(b)
は上面図のc−c線断面図、(c)はd−d線断面図を
示している。
FIG. 1 is a structural view of a tape carrier type semiconductor device showing a first embodiment, in which FIG. 1A is a top view and FIG.
Shows a cross-sectional view taken along the line cc of the top view, and (c) shows a cross-sectional view taken along the line dd.

【図2】本実施例による導体層が3層、誘導体層が2層
のTABテープの製造工程を示す説明図である。
FIG. 2 is an explanatory diagram showing a manufacturing process of a TAB tape having three conductor layers and two dielectric layers according to the present embodiment.

【図3】第2の実施例を示す半導体装置の構造図であ
り、同図(a)は上面図、(b)は上面図のe−e線断
面図を示している。
3A and 3B are structural views of a semiconductor device showing a second embodiment, wherein FIG. 3A is a top view and FIG. 3B is a cross-sectional view taken along the line ee of the top view.

【図4】従来例のテープキャリア方式の半導体装置の構
造図であり、(a)に上面図を、(b)に上面図のa−
a線断面図を、(c)に上面図のb−b線断面図を示し
ている。
4A and 4B are structural views of a conventional tape carrier type semiconductor device, in which FIG. 4A is a top view and FIG. 4B is a top view a-.
A sectional view taken along the line a is shown in (c), and a sectional view taken along the line bb of the top view is shown.

【符号の説明】[Explanation of symbols]

1 ベアチップIC 2 バンプ 9 導体層 10 有機基材 11 有機基材 12 TABリード 13 TABリード 24 抵抗体 1 Bare Chip IC 2 Bump 9 Conductor Layer 10 Organic Base Material 11 Organic Base Material 12 TAB Lead 13 TAB Lead 24 Resistor

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 ポリイミド等から成るテープ状の有機基
材と、この有機基材面に付けられエッチングによって銅
箔から形成された複数本のTABリードとから成るTA
Bテープにより所定の間隙を開けて周囲を取り囲んだ中
央にベアチップICを配し、このベアチップICの複数
の端子に前記各TABリードのインナー側を接続して成
るテープキャリア方式の半導体装置において、 グランド用の導体層の両面に前記有機基材を鋏み付け、
かつその有機基材のさらに外側に前記TABリードを該
有機基材の片面づつに交互に配線して千鳥配線としたこ
とを特徴とするテープキャリア方式の半導体装置。
1. A TA comprising a tape-shaped organic base material made of polyimide or the like, and a plurality of TAB leads formed on a copper foil by etching and attached to the surface of the organic base material.
In a tape carrier type semiconductor device in which a bare chip IC is arranged in the center surrounding the periphery by opening a predetermined gap with the B tape, and the inner side of each TAB lead is connected to a plurality of terminals of the bare chip IC, Scissors the organic base material on both sides of the conductor layer for,
Further, a tape carrier type semiconductor device is characterized in that the TAB leads are arranged on the outer side of the organic base material alternately on each side of the organic base material to form a staggered wiring.
【請求項2】 前記TABリードの有機基材に接してい
る部分の幅を、有機基材に接していない部分の幅よりも
広くしたことを特徴とする前記請求項1記載のテープキ
ャリア方式の半導体装置。
2. The tape carrier system according to claim 1, wherein a width of a portion of the TAB lead which is in contact with the organic base material is made wider than a width of a portion which is not in contact with the organic base material. Semiconductor device.
【請求項3】 前記千鳥配線とした複数本の隣接するT
ABリード間の間隙に、信号終端用の抵抗体を設けたこ
とを特徴とする前記請求項1記載のテープキャリア方式
の半導体装置。
3. A plurality of adjacent Ts used as the zigzag wiring
2. The tape carrier type semiconductor device according to claim 1, wherein a resistor for terminating a signal is provided in a gap between the AB leads.
JP32786391A 1991-12-11 1991-12-11 Semiconductor device by tape-carrier system Pending JPH05166875A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32786391A JPH05166875A (en) 1991-12-11 1991-12-11 Semiconductor device by tape-carrier system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32786391A JPH05166875A (en) 1991-12-11 1991-12-11 Semiconductor device by tape-carrier system

Publications (1)

Publication Number Publication Date
JPH05166875A true JPH05166875A (en) 1993-07-02

Family

ID=18203817

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32786391A Pending JPH05166875A (en) 1991-12-11 1991-12-11 Semiconductor device by tape-carrier system

Country Status (1)

Country Link
JP (1) JPH05166875A (en)

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