JPH05165054A - Active matrix base board - Google Patents

Abstract

PURPOSE:To prevent increase of the wiring resistance in an active matrix board by suppressing reduction of the film thickness of a wiring metal resulting from positive electrode oxidation. CONSTITUTION:A positive electrode oxide film 4 is formed at each of the ends across the width of an additional capacity wiring 26 and a gate bus line 3a, and the thickness of each positive electrode oxide film 4 enclosing those end parts is made greater than the thickness of positive electrode oxide film 4 in the other surface areas. Therefore, the areas other than the end parts across the width of wiring of the gate bus line 3a and additional capacity wiring 26 are not likely to be positive electrode oxidated significantly, which permits suppressing reduction of the film thickness on each wiring metal when viewed on the cross-section.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix substrate having a thin film transistor array, which is used in combination with liquid crystal to form an active matrix liquid crystal display device.

[0002]

2. Description of the Related Art As shown in FIG. 8, the above-mentioned active matrix liquid crystal display device is constructed by enclosing a liquid crystal 206 between a lower active matrix substrate 100 and an upper counter substrate 200. As shown in FIG. 9, the active matrix substrate 100 includes a gate bus line 1 as a scanning line made of tantalum on a glass substrate 101.
03a and a source bus line 110a as a signal line made of titanium are vertically and horizontally wired, and pixel electrodes 109 are provided in a matrix in a region surrounded by the gate bus line 103a and the source bus line 110a. A thin film transistor (hereinafter referred to as TFT) 124 provided in the vicinity of the intersection of the gate bus line 103a and the source bus line 110a is electrically connected to the pixel electrode 109. The TFT 124 is composed of amorphous silicon and is used as a switching element.
An additional capacitance line 126 is formed in parallel with the gate bus line 103a in the vicinity thereof.

The TFT 124 is shown in FIG. 8 (C-C in FIG. 9).
(Cross-sectional view taken along the line “), the gate bus line 103a and the additional capacitance wiring 126 are formed on the glass substrate 101.
Electrode 10 made of tantalum, which is the same metal material as
3 is formed to a film thickness of 2500 angstroms, and the anodic oxide film 104 of tantalum oxide (Ta ₂ O ₅ ) is formed thereon by anodizing the gate electrode 103 to a film thickness of 3000.
It is made of Angstrom. Furthermore, a gate insulating film 1 made of silicon nitride (SiN _x ) is formed on top of it.
05 is formed with a film thickness of 3000 angstrom. The gate insulating film 105 and the anodized film 104 protect the gate electrode 103. An intrinsic semiconductor amorphous silicon {a-Si (i)} layer 106 having a film thickness of 100 is formed on the gate insulating film 105 and above the gate electrode 103.
It is formed to have a thickness of 0 angstrom, and a silicon nitride film 102 is formed thereon.

Further, on the substrate 101, n-type semiconductor amorphous silicon {a-Si (n ⁺ )} layers 107 and 107 are divided into two on the silicon nitride film 102 and have a film thickness 500.
The n-type semiconductor amorphous silicon layers 107 and 107 are formed of Angstrom and metal titanium (Ti) is formed on the n-type semiconductor amorphous silicon layers 107 and 107.
The source electrode 111 and the drain electrode 108 are formed with a film thickness of 3000 angstroms. A source electrode 110 made of ITO is further formed on the source electrode 111, and a pixel electrode 109 made of ITO is formed on the one drain electrode 108 to have a film thickness of 1000 angstrom.

As described above, the TFT 124 has the pixel electrode 10
9 and the protective film 116 and the alignment film 117 are formed in this order over the entire surface.

Further, as shown in FIG. 10 (cross-sectional view taken along the line AA 'in FIG. 9) and FIG. 11 (cross-sectional view taken along the line BB' in FIG. 9), in a portion that crosses the gate bus line 103a. Anodized film 10 of tantalum oxide (Ta ₂ O ₅ ) obtained by anodizing the gate bus line 103a and the additional capacitance wiring 126 is formed on the gate bus line 103a and the additional capacitance wiring 126 formed on the glass substrate 101.
4 are formed. The gate electrode 103 is
The anodic oxide film 104 formed on the gate electrode 103 and integrated with the gate bus line 103a is formed simultaneously with the anodic oxide film 104 formed on the gate bus line 103a.

An active matrix liquid crystal display device using such an active matrix substrate has an equivalent circuit shown in FIG. By the way, in the liquid crystal display device, a large screen is being promoted, and along with this, the picture element electrode 10
9 and the number of TFTs 124 need to be increased. When the number of TFTs 124 is increased, the gate electrode 10
3 and the source electrode 111 (including 110), the parasitic capacitance increases according to the number of TFTs 124, and the delay of the input signal becomes a problem. Therefore, the wiring material of the gate bus line 103a and the additional capacitance wiring 126 is changed. It becomes necessary to reduce the resistance and suppress the signal delay. Examples of the wiring material include tantalum (Ta) that can be anodized, and chromium (Cr), aluminum (Al), molybdenum (M).
o) and metallic materials such as niobium (Nb).

[0008]

However, in the conventional active matrix substrate, since the surface of the wiring metal is anodized, the film thickness of the metal portion decreases and the wiring resistance increases. Therefore, in order to suppress the increase in wiring resistance,
If the film thickness of the wiring metal is increased by the amount of the anodization, the gap becomes large and the covering property of the insulating film 105 or the like formed on the wiring or the source bus line 110a is impaired. However, there is a problem in that the source bus line 110a may be easily disconnected, resulting in a disconnection defect of the source bus line 110a.

When the wiring metal is etched by the wet etching method to reduce the thickness of the anodic oxide film, the adhesion of the resist is impaired by the etchant depending on the kind of the metal, particularly tantalum, chromium or niobium. This causes another problem that disconnection and abnormal overetching are likely to occur. For this reason,
The film thickness of the wiring metal is limited, and the wiring resistance is also limited.

The present invention has been made to solve the above problems, and provides an active matrix substrate capable of suppressing an increase in wiring resistance by suppressing a reduction in the film thickness of a wiring metal due to anodization. With the goal.

[0011]

In the active matrix substrate of the present invention, a plurality of scanning lines and a plurality of signal lines intersect each other vertically and horizontally on an insulating substrate and are surrounded by the scanning lines and the signal lines. In the active matrix substrate in which the picture element electrodes are formed in a matrix in a region where the picture element electrodes are formed, and the switching elements arranged near the intersections of the scanning lines and the signal lines are connected to the picture element electrodes. Anodized film is formed on part or all of the surface of the scanning line by anodizing the scanning line, and the film thickness of the anodic oxide film part covering both ends or one end in the width direction of the scanning line. However, the thickness is made thicker than the anodic oxide film portion covering the other surface portion of the scanning line, whereby the above object can be achieved. It is also possible to eliminate the formation of the anodic oxide film on the surface portion of the scanning line where the anodic oxide film is formed except for both end portions or one end portion.

Further, the active matrix substrate of the present invention has a plurality of scanning lines and a plurality of signal lines intersecting each other in a vertical and horizontal direction on an insulating substrate, and a picture is formed in a region surrounded by the scanning lines and the signal lines. Elementary electrodes are formed in a matrix, and
In an active matrix substrate in which a switching element disposed near the intersection of a scanning line and a signal line is connected to the pixel electrode, scanning that intersects the surface of the switching element portion of the scanning line and / or the signal line The surface of the line portion is anodized, whereby the above object can be achieved.

Further, in the active matrix substrate of the present invention, an additional capacitance wiring is further provided facing the picture element electrode,
An anodic oxide film is formed by anodizing the additional capacitance wiring on part or all of the surface of the additional capacitance wiring along the lengthwise direction, and both ends or one end in the width direction of the additional capacitance wiring are covered. The film thickness of the anodic oxide film portion may be made thicker than the anodic oxide film portion covering the other surface portion of the additional capacitance wiring. Further, it is also possible to eliminate the formation of the anodic oxide film on the surface portion of the additional capacitance wiring except the both end portions or one end portion where the anodic oxide film is formed.

[0014]

According to the first, second or fourth and fifth aspects of the present invention, since the other portions except the widthwise end portions of the wiring are not anodized much, the film thickness of the wiring metal is Reduction can be suppressed, and increase in wiring resistance can be prevented. Further, since the wiring end portion is anodized to have a rounded shape, good coverage can be ensured when the insulating film or the signal line laminated on the wiring is formed.

According to the third aspect of the present invention, since the surface of the switching element portion in the scanning line is anodized, it is possible to prevent an increase in wiring resistance, and the insulating property of the switching element is improved to prevent leakage current. Occurrence can be suppressed. In addition, since the surface of the scanning line portion that intersects with the signal line is anodized, it is possible to prevent an increase in wiring resistance and, at the same time, suppress the occurrence of a short circuit with the signal line.

[0016]

【Example】

 The present invention will be described below with reference to examples.

(Embodiment 1) FIG. 1 is a plan view showing an active matrix substrate of this embodiment, FIG. 2 is a sectional view taken along the line FF 'in FIG. 1, and FIG. 3 is taken along the line DD' in FIG. Cross section,
FIG. 4 is a sectional view taken along the line EE ′ of FIG. In this active matrix substrate, as shown in FIG. 1, a gate bus line 3a made of tantalum as a scanning line and a source bus line 10a made of titanium as a signal line are vertically and horizontally wired on a glass substrate 1. The pixel electrodes 9 are provided in a matrix in a region surrounded by the bus lines 3a and the source bus lines 10a, and the pixel electrodes 9 are provided in the vicinity of the intersection of the gate bus lines 3a and the source bus lines 10a. The TFT 24 is electrically connected. The TFT 24 is made of amorphous silicon and is used as a switching element. In the vicinity of the gate bus line 3a, the additional capacitance wiring 2 is provided in parallel with the gate bus line 3a.
6 is formed.

In the TFT 24, as shown in FIG. 2, the gate electrode 3 made of tantalum, which is the same metal material as the gate bus line 3a and the additional capacitance wiring 26, is formed on the glass substrate 1 with a film thickness of 4000 angstroms. Anodized film 4 of tantalum oxide (Ta ₂ O ₅ ) is formed on both ends in the width direction of electrode 3 by anodizing gate electrode 3.
Is formed with a film thickness of 3000 angstroms. The gate electrode 3 constitutes a part of the gate bus line (scanning line) 3a. Furthermore, silicon nitride (Si
A gate insulating film 5 made of N _x ) is formed with a film thickness of 3000 angstrom. The gate insulating film 5 and the anodic oxide film 4 protect the gate electrode 3. An intrinsic semiconductor amorphous silicon {a-Si (i)} layer 6 having a film thickness of 1000 is formed on the gate insulating film 5 and above the gate electrode 3.
It is formed in angstrom, and the silicon nitride film 2 is formed thereon.

Further, a silicon nitride film 2 is formed on the substrate 1.
N-type semiconductor amorphous silicon {a
-Si (n ⁺ )} layers 7 and 7 are formed with a film thickness of 500 angstrom, and each n-type semiconductor amorphous silicon layer 7 is formed.
A source electrode 11 made of metallic titanium (Ti) is provided on the surface 7.
And the drain electrode 8 is formed with a film thickness of 3000 angstrom. One more layer on the source electrode 11,
A source electrode 10 made of ITO is formed, and a pixel electrode 9 made of ITO is formed on one drain electrode 8 to have a film thickness of 1
It is formed of 000 angstroms.

As described above, the TFT 24 is configured to be electrically connected to the pixel electrode 9, and the protective film 16 and the alignment film 17 are formed in this order over the entire surface of the TFT 24.

As shown in FIGS. 3 and 4, on the gate bus line 3a and the additional capacitance wiring 26 formed on the glass substrate 1, both ends of the gate bus line 3a and the additional capacitance wiring 26 in the width direction are provided. Anodized film 4 of tantalum oxide (Ta ₂ O ₅ ) formed by anodizing the portions is formed. The anodic oxide film 4 is formed on the gate bus line 3a.
May be formed in part or all along the length direction of. Further, the additional capacitance wiring 26 and the above-mentioned gate electrode 3 may be similarly formed partially or entirely. Further, as an object for forming the anodic oxide film 4, the additional capacitance wiring 26
Or only the gate bus line 3a (including the gate electrode 3).

Next, the anodic oxide film 4 provided on the active matrix substrate of this structure is obtained by the following forming process.

First, as shown in FIG. 5A, a tantalum layer 30 is sputter-deposited on the glass substrate 1.

Next, as shown in FIG. 5B, a resist 31 is patterned on the tantalum layer 30 by photolithography.

Next, as shown in FIG. 5C, the tantalum layer 30 is etched with a mixed solution of hydrofluoric acid and nitric acid using the resist 31 as a mask, so that the gate bus line 3a (or the gate electrode 3, the additional capacitance). The wiring 26) is patterned.

Next, as shown in FIG. 5D, the gate bus lines 3a and the like are anodized in an electrolytic solution of ammonium tartrate. As a result, both end portions in the width direction are anodized, and the anodic oxide film 4 made of tantalum oxide is formed.

Next, as shown in FIG. 5 (d), the resist 31 is peeled off to obtain the gate bus lines 3a and the like whose both ends are anodized.

In this forming process, the resist 31
It is also possible to slightly anodize the widthwise intermediate portion of the surface of the gate bus line 3a or the like by weakening the withstand voltage (adhesion pressure) of the gate bus line 3a to form a tantalum oxide film having a thinner film thickness than both end portions.

The gate bus line 3a, the gate electrode 3 or the additional capacitance wiring 26 on which the anodic oxide film is formed as described above.
The film thickness of the metal part is greatly reduced by anodizing only the end part, but the width direction length is at most several microns or less. In addition, the line width of the portion where anodization is not performed can have a sufficiently large dimension in the width direction. Therefore, the influence of the film thickness reduction due to anodization is small, and the wiring resistance is hardly reduced.

In the above embodiment, the gate bus line 3
Although both ends of the a or the additional capacitance line 26 in the width direction are anodized, only one side may be anodized.

(Embodiment 2) FIGS. 6 and 7 are sectional views showing another embodiment of the present invention, and FIGS. 6 and 7 show the same parts as FIGS. 3 and 4, respectively. That is, as shown in FIG. 6, the anodic oxide film 4 is not formed on the portion of the gate bus line 3a where the source bus line 10a does not exist in the vicinity, but on the portion of the gate bus line 3a intersecting with the source bus line 10a. The anodic oxide film 4 is formed on the entire width of the gate bus line 3a in the width direction. Further, the anodic oxide film 4 is formed on the additional capacitance wiring 26 provided in parallel with the gate bus line 3a in the same manner as the gate bus line 3a.

When the anodic oxide film 4 is formed on the portion of the gate bus line 3a that intersects with the source bus line 10a in this way, the anodic oxide film is formed over the entire lengths of the gate bus line 3a and the gate electrode 3 as in the conventional case. The formation ratio of the anodic oxide film 4 is smaller than that in the case of forming 4,
Wiring resistance can be reduced. This also applies to the additional capacitance wiring 26. Further, since the corner portion of the gate bus line 3a on which the anodic oxide film 4 is formed is rounded, the insulating film laminated on the portion or the source bus line 10a and the like have good coverage, and the source bus line 3a is well covered. It is possible to suppress the occurrence of short-circuit defects that occur with the line 10a.

In the second embodiment, the anodic oxide film 4 is used.
The gate bus line 3a portion that intersects with the source bus line 10a is formed at the position where the gate electrode 3 is formed. The gate electrode 3 of the TFT 24 near the gate bus line 3a portion
The anodic oxide film 4 may be formed on the entire width of the gate bus line 3a at the same timing as the gate bus line 3a. In this case, the formation ratio of the anodic oxide film 4 is smaller and the wiring resistance is smaller than in the conventional case where the anodic oxide film 4 is formed over the entire length of the gate bus line 3a and the gate electrode 3. can do.
Further, the insulating film laminated on the gate electrode 3 or the coverage of the source electrode 10 and the like is improved, and the gate electrode 3
It is possible to suppress the generation of leak current between the source electrode 10 and the source electrode 10.

Further, the gate bus line 3a intersects the source bus line 10a at the location where the anodic oxide film 4 is formed.
The gate electrode 3 of the TFT 24 near the portion and the gate bus line 3a portion may be used. In this case, not only the wiring resistance can be reduced, but also a short circuit failure and a leak current can be suppressed.

In the second embodiment, with respect to the gate bus line 3a, the gate electrode 3 or the additional capacitance wiring 26,
Although the anodic oxide film 4 is formed over the entire width of the wiring, the anodic oxide film 4 may be formed at both ends or one end as in the first embodiment.

In the above description, T is used as the switching element.
Although the FT is used, the present invention can be similarly applied to the active matrix substrate using the MIM element and the diode element, whereby the resistance of the wiring can be reduced.

[0037]

According to the present invention, since the anodized portion of the wiring can be reduced, it is possible to reduce the resistance of the wiring. Further, since the parasitic capacitance can be reduced by this, it is possible to realize the size increase of the active matrix liquid crystal display device with a good manufacturing yield. In addition, since the corners of the wiring are anodized to have a rounded shape, it is possible to improve the coverage of the insulating film, the signal line, etc. formed on the wiring, and the location where the coverage is good. In the case of a portion crossing the signal line, it is possible to suppress the occurrence of a short circuit between the signal line and the signal line.

[Brief description of drawings]

FIG. 1 is a plan view showing an active matrix substrate of the present invention.

FIG. 2 is a sectional view taken along line FF ′ of FIG.

FIG. 3 is a cross-sectional view taken along the line DD ′ of FIG.

FIG. 4 is a cross-sectional view taken along line EE ′ of FIG.

FIG. 5 is a process chart showing a process of forming an anodic oxide film 4.

FIG. 6 is a cross-sectional view (same as FIG. 3) showing another embodiment of the present invention.

FIG. 7 is a cross-sectional view (same as in FIG. 4) showing another embodiment of the present invention.

8 is a sectional view showing an active matrix liquid crystal display device including a conventional active matrix substrate (C in FIG. 9).
-C 'line).

FIG. 9 is a plan view showing a conventional active matrix substrate.

10 is a cross-sectional view taken along the line AA ′ of FIG.

11 is a cross-sectional view taken along the line BB ′ of FIG.

FIG. 12 is an equivalent circuit diagram showing a conventional active matrix liquid crystal display device.

[Explanation of symbols]

 1 glass substrate 3 gate electrode 3a gate bus line 4 anodic oxide film 5 gate insulating film 9 picture element electrode 11 source electrode 24 thin film transistor (TFT) 26 additional capacitance wiring

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Manabu Takahama 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Prefecture Sharp Corporation (72) Ken Kanamori 22-22 Nagaike-cho, Abeno-ku, Osaka, Osaka Prefecture Incorporated (72) Inventor Makoto Miyago 22-22 Nagaike-cho, Abeno-ku, Osaka, Osaka Prefecture Sharp Corporation (72) Inventor Katsumi Irie 22-22, Nagaike-cho, Abeno-ku, Osaka City, Osaka Prefecture 72) Inventor Naofumi Kondo 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Prefecture

Claims (5)

[Claims] 1. A plurality of scanning lines and a plurality of signal lines intersect each other on an insulating substrate and are vertically and horizontally wired, and pixel electrodes are formed in a matrix in a region surrounded by the scanning lines and the signal lines. In addition, in the active matrix substrate in which the switching element arranged near the intersection of the scanning line and the signal line is connected to the picture element electrode, a part of the surface of the scanning line along the length direction or Anodized film is formed on the whole by anodizing the scanning line,
An active matrix substrate in which a film thickness of an anodized film portion covering both ends or one end in the width direction of the scanning line is made thicker than an anodized film portion covering another surface portion of the scanning line. 2. The active matrix substrate according to claim 1, wherein the anodic oxide film is not formed on a surface portion of the scanning line where the anodic oxide film is formed except for both ends or one end. 3. A plurality of scanning lines and a plurality of signal lines intersect each other on an insulating substrate and are wired vertically and horizontally, and pixel electrodes are formed in a matrix in a region surrounded by the scanning lines and the signal lines. In addition, in the active matrix substrate in which the switching element arranged near the intersection of the scanning line and the signal line is connected to the picture element electrode, the surface of the switching element portion of the scanning line and / or the signal line An active matrix substrate in which the surface of the scanning line portion intersecting with is anodized over the entire width of the scanning line. 4. An additional capacitance wiring is provided so as to face the picture element electrode, and the additional capacitance wiring is anodized on a part or all of the surface of the additional capacitance wiring along the length direction. The film is formed, and the film thickness of the anodic oxide film portion covering both ends or one end in the width direction of the additional capacitance wiring is made thicker than the anodic oxide film portion covering the other surface portion of the additional capacitance wiring. The active matrix substrate according to claim 1, 2 or 3. 5. The active matrix substrate according to claim 4, wherein no anodic oxide film is formed on a surface portion of the portion of the additional capacitance wiring where the anodic oxide film is formed, except for both end portions or one end portion.