JPH05164815A - Test method for semiconductor memory element - Google Patents

Abstract

PURPOSE:To provide a stable wiring voltage characteristic optimum for a test and to improve measurement precision of a memory holding characteristic test, by holding stand-by mode condition with a clock signal longer than the specific time before a normal test. CONSTITUTION:A test board 2 having semiconductor memory elements 4 inserted in sockets 3 is inserted into a board socket 6 in a thermostat 1. First, by setting an air conditioner 11 at a normal temperature (35 deg.C or below) and using an IC tester 5, erasings and writings of the elements 4 are done once or mode times for holding hold mode condition for one hour. Secondary, by judging the test is the first one or the second one, and in the case of the first one, the air conditioner 11 is settled at a high temperature (125 deg.C), and by using the IC tester 5 for holding the elements 4 in stand-by mode condition with a clock signal for two hours or more, and then by setting the air conditioner 11 at the normal temperature, power supply of the element 4 is turned off by using the IC tester 5 and a stable writing voltage characteristic optimum for a test is secured, test process is transferred to a normal test for testing a memory holding characteristic of the elements 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device testing method, and more particularly to a testing method using an IC tester.

[0002]

2. Description of the Related Art FIG. 2 is a schematic diagram showing the structure of an apparatus for carrying out a test on a semiconductor memory device. In this figure, reference numeral 1 is a thermostatic chamber, in which a semiconductor memory element 4 is set in a semiconductor memory element socket 3 provided on a test board 2. 5 is an IC tester for testing the semiconductor memory device 4, 6 is a board socket, 7a is an air supply side fan in the constant temperature bath 1, 7b is also an exhaust side fan, and 7c is an air supply device 11 supply. The air side fan and 7d are also exhaust side fans. Reference numeral 8 is an air supply port of the constant temperature bath 1, 9 is an exhaust port, and 10 is outside air. Also, 11
Is an air conditioner described above, which is for feeding the air, which is optimum for the test of the semiconductor memory element 4 and adjusted to a constant temperature, into the constant temperature bath 1. 12 is this air conditioner 11
The air supply port 13 and the exhaust port 13 are also provided.

FIG. 3 is a flowchart showing a conventional method of testing the semiconductor memory device 4 by the apparatus of FIG. In FIG. 3, (1) to (6) show respective steps, (1) a step of turning on the power at room temperature (35 ° C. or lower), and (2) erasing / writing at room temperature (35 ° C. or lower). Alternating m times (m ≧ 1) times, (3) holding the hold mode state for 1 hour at room temperature (35 ° C. or less), and (4) at high temperature (125 ° C.) with clock signal Standby mode state (semiconductor memory device 4
Step (5) is to turn off the power at room temperature (35 ° C or less).
Step (6) is a step of carrying out a memory retention characteristic test at a high temperature (75 ° C.).

Next, the operation of FIG. 2 will be described with reference to the flowchart of FIG. In FIG. 2, the test board 2 in which the semiconductor memory device 4 is inserted into the semiconductor memory device socket 3 is inserted into the board socket 6 in the constant temperature bath 1.
Then, the temperature is set to room temperature (35 ° C. or less) by the air conditioner 11, the power is turned on for the semiconductor memory element 4 using the IC tester 5 (1), and erase / write is alternately performed.
After performing (m ≧ 1) times (2), the hold mode state is held for 1 hour (3). Then, the temperature is set to a high temperature (125 ° C.) by the air conditioner 11, and the IC tester 5 is used.
The semiconductor memory device 4 is held in the standby mode state with a clock signal for n (n ≧ 8) time (4). Next, the temperature is set to room temperature (35 ° C. or lower) by the air conditioner 11, the IC tester 5 is used, and the power supply of the semiconductor memory element 4 is turned off (5). Next, the temperature is set to a high temperature (75 ° C.) by the air conditioner 11, and the IC memory 5 is used to carry out a memory retention characteristic test on the semiconductor memory element 4 (6).

During the above operation, the air supply port 8 in the constant temperature bath 1 is constantly operated.
By rotating the air supply side fans 7a and 7c,
From the air conditioner 11, the air adjusted to a constant temperature which is optimum for the test is taken in. Further, the exhaust side fan 7b is rotated from the exhaust port 9 in the constant temperature bath 1 to exhaust the air in the constant temperature bath 1 to the outside air 10.

[0006]

Since the conventional semiconductor memory device 4 has been tested by the method as described above, the write voltage characteristic of the semiconductor memory device 4 becomes unstable, and the semiconductor memory device 4 is not tested. There is a problem that the measurement accuracy is reduced.

The present invention has been made to solve the above-mentioned problems, and is optimum for a semiconductor memory device, and a stable write voltage characteristic can be secured, and an accurate measurement accuracy at the time of a characteristic test can be obtained. An object of the present invention is to obtain a test method for a semiconductor memory device that can be used.

[0008]

According to a method of testing a semiconductor memory device of the present invention, a power supply is turned off at room temperature after holding a standby mode state with a clock signal for two hours or more.
After that, the characteristic test of the semiconductor memory device is performed by the IC tester by the same operation as the conventional one.

[0009]

In the present invention, since the operation for holding the standby mode state with the clock signal for two hours or more is added before the normal operation, the stable write voltage characteristic optimum for the test is ensured and the characteristic test at the time of the characteristic test is performed. Measurement accuracy is improved.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a flowchart illustrating a method for testing a semiconductor memory device according to the present invention, in which (1) to (9) show respective steps. For easy comparison with FIG. 3, steps (1) to (6) represent the same as FIG. 3, and steps added in the present invention are represented by (7) to (9). Therefore, the operation order is not necessarily the numerical order. In this embodiment, a case where two semiconductor memory devices 4 are tested simultaneously will be described.

In FIG. 1, (1) is a step of turning on the power at room temperature (35 ° C. or lower), and (2) is room temperature (35 ° C.).
The step of performing erasing / writing alternately m (m ≧ 1) times at (° C. or lower), (3) the step of holding the hold mode state for 1 hour at room temperature (35 ° C. or lower), and (4) the high temperature ( A step of maintaining the standby mode state with a clock signal at 125 ° C. for n (n ≧ 8) hours, and (5) is a step of turning off the power at room temperature (35 ° C. or lower). (6) is a step for carrying out a memory retention characteristic test at a high temperature (75 ° C.), (7) is a step for making a judgment when carrying out the first or second check, and (8) is a standby mode with a clock. State i (i ≧ 2) time holding (high temperature 125 ° C.), step (9) is normal temperature (35 ° C.)
In the following), the power is turned off.

Next, the operation will be described. The test board 2 in which the semiconductor memory device 4 is inserted into the semiconductor memory device socket 3 is inserted into the board socket 6 in the constant temperature bath 1. First, as the first time, the air conditioner 11 is set to room temperature (35 ° C. or lower), the IC tester 5 is used, and the semiconductor memory device 4 is turned on (1), and erase / write is alternately performed m (m Carry out ≧ 1) times (2). Next, the hold mode state is held for 1 hour (3). Then, it is judged whether this test is the first time or the second time (7), and if it is the first time, the temperature is set to a high temperature (125 ° C.) by the air conditioner 11, and the IC tester 5 is used to clock the semiconductor memory device 4 with the clock. Standby mode status with signal i
Hold for (i ≧ 2) time (8). Next, the temperature is set to room temperature (35 ° C or lower) by the air conditioner 11, and the IC tester 5
The semiconductor memory device 4 is turned off by using (9).

Next, as the second time, the step (1) is performed again.
~ (3) is implemented. Then, the standby mode state with a clock signal is maintained for n (n ≧ 8) hours (4), and the temperature is set to room temperature (35 ° C. or lower) by the air conditioning device 11, and I
The power of the semiconductor memory device 4 is turned off using the C tester 5 (5). Next, the temperature is set to a high temperature (75 ° C.) by the air conditioner 11, the IC tester 5 is used, and the memory retention characteristic test is performed on the semiconductor memory element 4 (6). By performing the first and second times, the depth of the write voltage is approximately doubled, stable write voltage characteristics optimal for the test are secured, and the measurement accuracy during the memory retention characteristic test is improved.

Although a method of simultaneously testing two semiconductor memory devices 4 has been described in the above embodiment, n
Even when (n ≧ 2) pieces are simultaneously produced, the same effect as that of the above-described embodiment can be obtained.

Further, in the above-mentioned embodiment, the test method for conducting the memory retention characteristic test at high temperature (75 ° C.) (step (6)) has been described, but even at room temperature (25 ° C.) the same as in the above-mentioned embodiment. The effect of is obtained.

Further, in the above embodiment, the test method of holding the standby mode state with the clock signal for the first time i (i ≧ 2) time before the conventional method is carried out was explained, but this step is performed twice or more. Even if it implements, the same effect is acquired.

[0017]

As described above, according to the present invention, the step of holding the standby mode state with the clock signal for 2 hours or more is performed at least once before the normal test, and therefore, it is suitable for the test. That is, stable write voltage characteristics can be secured, a memory retention characteristic test with high measurement accuracy can be performed, and the quality of the semiconductor memory device can be improved.

[Brief description of drawings]

FIG. 1 is a flowchart illustrating a method of testing a semiconductor memory device according to an exemplary embodiment of the present invention.

FIG. 2 is a schematic diagram showing a semiconductor memory device testing apparatus.

FIG. 3 is a flowchart showing a conventional method for testing a semiconductor memory device.

[Explanation of symbols]

 1 constant temperature tank 2 test board 3 semiconductor memory element socket 4 semiconductor memory element 5 IC tester 6 board socket 7a, 7c air supply side fan 7b, 7d exhaust side fan 8 constant temperature tank air supply port 9 constant temperature tank exhaust port 10 Outside Air 11 Air Conditioner 12 Air Supply Port for Air Conditioner 13 Exhaust Port for Air Conditioner

Claims (1)

[Claims] 1. In a method of setting a plurality of electrically storable / erasable semiconductor memory elements in a thermostatic chamber and testing them using an IC tester, the power is turned on at room temperature to erase the semiconductor memory elements.
At least one step of performing the writing alternately for an arbitrary number of times, maintaining the hold mode state for 1 hour, and maintaining the standby mode state with the clock signal at high temperature for 2 hours or more
After repeating the operation, turn off the power at room temperature, turn on the power again at room temperature, and erase / write alternately for any number of times.
Hold for 1 hour in hold mode, then hold for 8 hours or more in standby mode with clock signal,
A method for testing a semiconductor memory device, which comprises conducting a characteristic test of the semiconductor memory device with an IC tester at a high temperature after powering off at room temperature or lower.