JPH05157785A - Method for generating frequency sweep signal - Google Patents

Abstract

PURPOSE:To arbitrarily set a frequency sweep state by setting the relation between the time and frequency of an output signal by a graph. CONSTITUTION:The sweep characteristic of the frequency of an output signal is set by a graph to be displayed on a display device 36. A CPU 26 forms the sequence of the digital data corresponding to the formed graph not only to store the same in an RAM 28 but also to input the digital data of the sequence to a sequence program controller 10. The controller 10 outputs the first frequency data to a latch circuit 12 corresponding to the formed sequence and the latch circuit 12 latches the frequency data. Address data determined by the incremental value determined based on said frequency data is generated by an adder 14 to indicate the address of a memory 18. The second frequency data is outputted to the latch circuit 12 and the same operation is repeated on and after.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency sweep signal generation method capable of changing a frequency sweep state of an output signal as desired.

[0002]

BACKGROUND OF THE INVENTION Various signal generators are used to perform various tests of electronic circuits. In such a signal generator, it is very convenient to be able to generate a frequency sweep signal whose output frequency changes with time. In a conventional analog type frequency sweep signal generator, a frequency sweep control signal such as a ramp wave voltage is supplied to a frequency control terminal of a voltage controlled oscillator. Moreover, in the conventional digital frequency sweep signal generator, the change of the output signal frequency is programmed,
A frequency sweep signal was generated according to the program.

[0003]

However, in the analog type frequency sweep signal generator, it is difficult to create a desired waveform (frequency sweep state) of the frequency sweep control signal, and the frequency sweep setting of the output signal is simple. I didn't know. Since the frequency sweep is programmed in the digital type frequency sweep signal generator, the frequency sweep state can be arbitrarily created, but the frequency sweep setting of the output signal could not be easily known.

Therefore, an object of the present invention is to provide a frequency sweep signal generation method capable of arbitrarily setting the changing state (sweep state) of the output frequency and easily knowing the setting.

[0005]

SUMMARY OF THE INVENTION The present invention graphically sets the time versus frequency relationship of a frequency swept output signal.
Then, a sequence of frequency changes is created by the digital data corresponding to this graph, and the frequency of the output signal is sequentially changed according to this sequence.

[0006]

According to the present invention, since the sweep condition of the output frequency, that is, the time-frequency relationship of the output signal is set by the graph, the frequency sweep condition can be arbitrarily set and
The setting can be easily known. Further, since the sweep of the output signal frequency is controlled by the digital data corresponding to this graph, the actual frequency sweep of the output signal and the frequency sweep which can be seen from the graph surely coincide with each other.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the accompanying drawings. FIG. 2 is a block diagram of a signal generator using the present invention. Sequence / program controller 10
Is a circuit which is controlled by a microprocessor system described later via the bus 24 and sequentially outputs set frequency data (digital data). The latch circuit 12 is a circuit for temporarily storing the frequency data from the sequence program controller 10. Each time the digital adder 14 receives the clock signal from the reference clock generator 16, the digital adder 14 adds the frequency data of the latch 12 and the output data of the adder 14 itself to generate address data. The sequence program controller 1
Since the frequency data from 0 is an increment value, the adder 14
The address data from is data that increases by an increment value for each clock signal. For example, if the frequency data is N
, The address data is incremented by N.

In the memory 18, digital data of each point of at least one cycle of a predetermined waveform is stored in advance at each address. The address data from the adder 14 causes the digital data in the memory 18 to be read and converted into an analog signal by the digital / analog (D / A) converter 20. This analog signal is filtered by the filter 22.
Is smoothed and becomes an analog output signal. Therefore, the frequency of the output signal depends on the frequency data (address increment value) from the sequence program controller 10, the clock frequency, and the number of addresses for one cycle of the waveform stored in the memory. Is constant, it is determined only by the address increment value.

In the microprocessor system, a central processing unit (CPU) 26, a random access memory (RAM) 28 which is a temporary storage memory, a read only memory (ROM) which stores programs for the CPU 14, etc. 30 are interconnected via a bus 24. The bus 24 is a data bus, an address
It consists of a bus and a control bus. An input device 32 including a keyboard, a rotary knob and a mouse, and a display circuit 34 are also connected to the bus 24. Display circuit 34
Processes the display data according to the format of the display 36,
The result is displayed on the display 36. For example, the display 36
Is a raster scanning cathode ray tube, the display circuit 34 develops the display data in a frame memory, sequentially reads out the frame memory in accordance with the raster scanning, and supplies it to the display 36.

Next, the frequency sweep signal generating method of the present invention will be described with reference to the flow chart of FIG. Software corresponding to a part of the flowchart shown in FIG. 1 is stored in the ROM 30. First, in step 50, the frequency sweep characteristic of the output signal is set by a graph. For that purpose, the CP is operated by the operator's instruction from the input device 32.
U26 enters the frequency sweep characteristic setting mode. Then, the display as shown in FIG. 3 is displayed on the display 36. Here, the operator uses the input device 32 to set each value of the start frequency (START) of the frequency sweep and the end frequency (STOP) of the frequency sweep to, for example, 100.00 KHz.
And 10.000 MHz. These values are displayed along the Y-axis at the center left and upper left of the display 36 and stored in the RAM 28.

When the operator moves the cursor with the input device 32 within the X axis (time axis) and the Y axis (frequency axis) of the display 36, digital data at each position of the cursor is displayed on the frame of the display circuit 34. The frequency sweep characteristics are expanded in the memory and set graphically on the display 36. Figure 3
In this example, the graph is a ramp wave. In addition, each point of this graph is RA as digital data.
It is stored in M28. In this graph, the rising straight line corresponds to the sweep time (SWEEP TIME) and the falling straight line corresponds to the return time (RETURN TIME). These values are displayed at the bottom left of the display, for example, 1.00 seconds (SE
C) and 0.30 seconds (SEC).

If necessary, the operator may use a marker (MAR).
The KER) position is inserted into the frequency sweep graph with a dot cursor (denoted by x). The frequency of the inserted marker position is displayed at the lower right of the display. In the figure, the left dot cursor position is the first marker (MARKER # 1),
The center point cursor position is the second marker (MARKER #
2), and the right point cursor position is the third marker (MAR).
KER # 3). The frequencies at these marker positions are also RA
It is stored in M28.

In step 52, the CPU 26 creates a sequence of digital data corresponding to the created graph of the frequency sweep characteristic and stores it in the RAM 28. Note that the graph display on the display 36 is a straight line inclination as shown in FIG. 3, but the sequence digital data stored in the RAM 28 is shown in analog form as shown in FIG. That is, the data structure is such that the frequency data changes at regular time intervals. The data change interval in the X-axis direction can be set arbitrarily. The digital data of this sequence is the sequence program controller 1
Input to 0.

In step 54, the sequence program controller 10 outputs the first frequency data to the latch circuit 12 according to the created sequence, and the latch circuit 12 latches this frequency data. Therefore, in step 56, the adder 14 generates address data whose increment value is determined by this frequency data, and addresses the memory 18. When the period for generating the first frequency has elapsed, the process returns to step 54, and the sequence program controller 10 outputs the second frequency data to the latch circuit 12. Thereafter, the same operation is repeated in steps 56 and 54. When the frequency reaches the end frequency and returns to the start frequency, the operation returns to the beginning and the same operation is repeated. By the way, at the marker frequency, the generation period of the frequency can be lengthened, the amplitude of the output signal can be changed, and the marker signal can be output from the second output terminal only at the marker frequency.

When setting the frequency sweep characteristic in step 50 by a graph, various other characteristics can be set by using the characteristic set first. For example, assume that the same characteristics as those in FIG. 3 (FIG. 5) are set first. This can be changed to the characteristic shown in FIG. 6 simply by exchanging the sweep time and the return time. Further, the characteristics shown in FIG. 5 can be changed to the characteristics shown in FIG. 7 by simply exchanging the start frequency and the end frequency. Further, if the straight line portion of the characteristic of FIG. 5 is changed to a curve, the characteristic shown in FIG. Further, as shown in FIGS. 9 and 10, the frequency marker position can be simply changed.

Although the preferred embodiment of the present invention has been described above, various modifications and changes can be made without departing from the gist of the present invention. For example, the X axis (time axis) and the Y axis (frequency axis) of the graph may be linear or non-linear such as logarithm.

[0017]

As described above, according to the present invention, since the time-frequency relationship of the output signal is set by the graph,
The frequency sweep state can be set arbitrarily and the setting can be easily known.

[Brief description of drawings]

FIG. 1 is a flow chart illustrating a preferred embodiment of the present invention.

FIG. 2 is a block diagram of a signal generator using the present invention.

FIG. 3 is a diagram showing a display of a display for explaining the present invention.

FIG. 4 is a diagram showing digital data of a frequency sweep control sequence in an analog manner for explaining the present invention.

FIG. 5 is a diagram showing a graph of frequency sweep characteristics for explaining the present invention.

FIG. 6 is a diagram showing a graph of frequency sweep characteristics for explaining the present invention.

FIG. 7 is a diagram showing a graph of frequency sweep characteristics for explaining the present invention.

FIG. 8 is a diagram showing a graph of frequency sweep characteristics for explaining the present invention.

FIG. 9 is a diagram showing a graph of frequency sweep characteristics for explaining the present invention.

FIG. 10 is a diagram showing a graph of frequency sweep characteristics for explaining the present invention.

[Simple explanation of symbols]

 10 Sequence / Program Controller 12 Latch Circuit 14 Adder 16 Clock Generator 18 Memory 20 D / A Converter 22 Filter 26 CPU 28 RAM 30 ROM 32 Input Device 34 Display Circuit 36 Display

Claims (1)

[Claims] 1. A method for generating a frequency swept output signal, wherein the time-frequency relationship of the output signal is set by a graph, and a sequence of frequency changes is created by digital data corresponding to the graph, A frequency sweep signal generation method characterized in that the frequency of the output signal is sequentially changed in accordance with the above.