JPH05152999A - Echo suppressing device - Google Patents

Abstract

PURPOSE:To suppress an echo component by clearing a filter coefficient whose absolute value is small to zero, whenever the coefficient is updated by the number of times determined in advance, and reducing an increase of a convergence time caused by a mutual interference between the coefficient and an increase of the residual echo quantity. CONSTITUTION:From an echo signal inputted to a receiving signal input terminal IN2, an echo replica from an adder 3 is subtracted by a subtracter 2. A result of subtraction by the subtracter 2 is outputted to an output terminal OUT2 as a receiving signal after an echo is erased, and also, supplied as error signals E1, E2,...En to a first to an n-th coefficient updating circuits U1, U2,...Un. A minimum tap detector 4 inputs filter coefficient absolute values W1, W2...Wn outputted from each coefficient updating circuit U1, U2,...Un, retrieves (r) pieces (r is an integer being smaller than n) whose value is small, and outputs its tap number to a coefficient clearing circuit 5. As a result, the circuit 5 sends out a clearing signal to the coefficient updating circuit corresponding to the input tap number, and clears the coefficient.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an echo canceling apparatus for canceling echo leaking from a transmitting circuit to a receiving circuit on a 4-wire side of a 2-wire / 4-wire converting circuit by using an adaptive filter.

[0002]

2. Description of the Related Art Conventionally, an echo canceller has been known as a device for eliminating echo leaking from a transmission circuit to a reception circuit on the 4-wire side of a 2-wire / 4-wire conversion circuit. This echo canceller generates a pseudo echo (hereinafter referred to as an echo replica) corresponding to a transmission signal by using an adaptive filter (hereinafter referred to as an adaptive filter) having a tap coefficient longer than an impulse response length of an echo path. As a result, the 2-wire / 4-wire conversion circuit operates so as to suppress the echo leaking into the receiving circuit. Each tap coefficient of the adaptive filter at this time is corrected by taking the correlation between the error signal obtained by subtracting the echo replica from the signal in which the echo and the received signal are mixed, and the transmitted signal. As a typical example of such adaptive filter modification, that is, a convergence algorithm, "LMSALGORITHM" (PROCEE
DINGS OF IEEE 63, No. 12, 1975, 1692
~ Page 1716; hereinafter referred to as "reference 1"),
"LEAR-NING IDENTIFICAION METHOD; LIM" (IEEE TRANS
ACTIONS ON AUTOMATIC CONTROL Vol.12 No.3, 1967
Pp. 282-287; hereinafter referred to as "reference 2").

FIG. 3 is a block diagram showing the structure of a conventional echo canceller. In this figure, the transmission signal input terminal I
The transmission signal input from N1 is input to the adaptive filter 13 as well as the transmission signal output terminal OUT1.
Is transmitted to the transmission line. The transmission signal sent to the transmission line is transmitted to the 2-line side by the 2-line / 4-line conversion circuit 11. At this time, due to the impedance mismatch of the 2-wire / 4-wire conversion circuit 11, a part thereof leaks into the reception circuit and is input to the reception signal input terminal IN2. Adaptive filter 13
Performs filter sum-of-products calculation using the input transmission signal as a filter input, and outputs an echo replica Y _k 'as a filter calculation result. The subtractor 12 receives the reception signal input terminal I
The echo replica Y _k ′ output from the adaptive filter 13 is subtracted from the echo signal Y _k input from N2, the subtraction result is input to the adaptive filter 13 as an error signal E _k , and the reception signal after echo cancellation is performed. To the reception signal output terminal OUT2.

The adaptive filter 13 corrects the filter coefficient based on the input error signal E _k using the coefficient correction algorithm of the above-mentioned "Document 1" or "Document 2". Here, the coefficient correction method will be described assuming "LMSALGORITHM" of "Reference 1" as a filter coefficient correction algorithm. Now, let us say that the transmission signal is X _k , the echo signal is Y _k , the echo replica is Y _k ′, the error signal is E _k, and the filter coefficient at the j-th tap at time k is W _j ^k . However, k is an index representing time. At this time, the echo replica Y _k 'which is the output of the adaptive filter is expressed by Expression 1. Further, the error signal E _k is expressed by Expression 2, and the correction coefficient W _j ^k is expressed by Expression 3.

[0005]

[Equation 1]

[0006]

[Equation 2]

[0007]

[Equation 3]

In Expression 3, μ is a constant called a step size, which is a parameter for determining the convergence time of the filter coefficient and the residual echo amount after convergence. The above is the coefficient correction method by "LMSALGORITHM" shown in "Reference 1". By using a value obtained by dividing μ by the input signal power instead of μ in Expression 3, “LI” shown in “Reference 2” is used.
M "can be applied.

[0009]

The echo canceller described above has the following problems. There is a fixed delay amount between a point on the 4-wire circuit where the echo canceller is actually inserted and a point on the 2-wire / 4-wire conversion circuit 11,
Further, when the fixed delay amount is large, the conventional echo canceller requires an adaptive filter having a maximum fixed delay amount and a tap coefficient having a length that covers the response part of the substantial impulse response. This means that when the fixed delay amount is very large, it has a huge number of taps, and the convergence time increases due to mutual interference between the coefficients.

Further, in order to sufficiently reduce the residual echo amount after convergence, the step size must be reduced, which also leads to an increase in convergence time. The increase of the convergence time becomes a big problem because it takes a lot of time until the coefficient converges again when the fixed delay amount changes in the middle.

The present invention has been proposed in order to solve the problems of the conventional technique, and an object thereof is to provide an echo device capable of improving the convergence speed.

[0012]

In order to achieve this object, the present invention provides an n-tap adaptive filter that estimates the impulse response of an echo path based on a transmission signal and an error signal to generate a pseudo echo. An echo canceling circuit for canceling the echo signal leaking from the transmitting circuit to the receiving circuit on the 4-wire side of the 2-wire / 4-wire converting circuit by subtracting the pseudo echo from the echo signal to obtain the error signal. In, the first to n-th delay circuits connected in series for giving a delay amount to the transmission signal, and the delay outputs of the first to n-th delay circuits are respectively input signals,
Filter coefficients are corrected based on the error signals supplied to each of them, and the corrected filter coefficients are multiplied by the corresponding input signals to output the filter calculation results for one tap, respectively. Coefficient updating circuit, an adder for adding the filter calculation results output from each of the first to nth coefficient updating circuits and outputting the result as the pseudo echo, and a pseudo output by the adder from the echo signal. A subtracter that subtracts the echo and outputs the error signal, and the absolute value of each filter coefficient output from the first to n-th coefficient updating circuits are input, and r is the smallest value among them.
The coefficient clear signal for clearing the above filter coefficient is sent to the minimum tap detection circuit that searches for each number and outputs the tap number corresponding to it, and the coefficient update circuit that corresponds to the tap number output from this minimum tap detection circuit. And a coefficient clear circuit for outputting.

The coefficient updating circuit further comprises: a first multiplier for multiplying the input signal by the error signal; and a second multiplier for multiplying the output of the first multiplier by the step size for determining the coefficient update amount. Of the second multiplier, an adder for adding the output of the second multiplier and the feedback signal, the output of the adder as a corrected filter coefficient, and its own output as a feedback signal to the adder. A delay element which is supplied and whose filter coefficient is cleared by the coefficient clear signal; and a third multiplier which multiplies the filter coefficient output from this delay element and the input signal and outputs the filter calculation result. An absolute value calculation circuit for calculating an absolute value of the output of the delay element and outputting the filter coefficient absolute value.

[0014]

According to the above-described structure, the absolute value of each filter coefficient is calculated every predetermined number of times of coefficient update, and R taps having a filter coefficient with a small value are searched for and the taps are searched. The filter coefficient of the coefficient updating circuit corresponding to is cleared. As a result, the taps inside the fixed delay unit, that is, the filter coefficient that should originally be zero, can be cleared, and the increase in the convergence time and the increase in the residual echo amount due to the mutual interference of the filter coefficients can be reduced.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A concrete embodiment of an echo canceller according to the present invention will be described in detail below with reference to the drawings. An embodiment of this echo canceller is shown in the block diagram of FIG. In this figure, the transmission signal input from the transmission signal input terminal IN1 is input to the delay circuit D1 and is also output to the transmission line from the transmission signal output terminal OUT1. The transmission signal sent to the transmission path is transmitted to the 2-line side by the 2-line / 4-line conversion circuit 1. At this time, due to impedance mismatch in the 2-wire / 4-wire conversion circuit 1, part of the transmission signal leaks into the reception circuit and is input to the reception signal input terminal IN2. The output X1 of the delay circuit D1 is input to the coefficient updating circuit U1 and is also supplied to the delay circuit D2 of the next stage. here,
As for the delay circuit, n pieces (n is an integer) are connected in series as a whole,
The first to n-th delay circuits D1, D2, ..., Dn form an n-tap adaptive filter. The output of the m-th (m is an integer smaller than n) delay circuit is supplied to the m-th coefficient updating circuit and the (m + 1) -th delay circuit.

The output X of the corresponding delay circuit D1, D2, ..., Dn is provided to each coefficient updating circuit U1, U2 ,.
, Xn and the error signals E1, E2, ..., En output from the subtractor 2 are input, the filter coefficients are updated, and the filter calculation results S1, S2 for one tap are input. , Sn are output, and the filter coefficient absolute values W1, W2, ..., Wn are output. Filter calculation result S at each tap
1, S2, ..., Sn are added by the adder 3 to calculate an echo replica.

The echo replica input from the adder 3 is subtracted by the subtractor 2 from the echo signal input to the reception signal input terminal IN2. The subtraction result of the subtracter 2 is output to the output terminal OUT2 as a reception signal after echo cancellation, and at the same time, the first to n-th coefficient updating circuits U1, U2,
, Un as error signals E1, E2, ..., En. The minimum tap detector 4 includes coefficient update circuits U1 and U
2, ..., Un output filter coefficient absolute values W1, W
2, ..., Wn are input, r small values (r is an integer smaller than n) are searched, and the tap number is output to the coefficient clear circuit 5.

The coefficient clear circuit 5 sends a clear signal to the coefficient update circuit corresponding to the input tap number. At this time, the filter coefficient of the coefficient updating circuit to which the clear signal is input is cleared to zero. The coefficient is cleared by the coefficient clearing circuit 5 every predetermined q times (q is an integer) of coefficient updating.

Next, the coefficient updating circuits U1, U2, ..., U
The internal configuration of n will be described based on the block diagram shown in FIG. 2 by taking the coefficient updating circuit Un as an example. In the figure, the first multiplier 6 multiplies the input signal Xn by the error signal En and outputs the multiplication result to the second multiplier 7. The second multiplier 7 multiplies the output of the first multiplier 6 by the step size μ and outputs the multiplication result to the adder 8. The adder 8 adds the feedback signal from the delay element 9 holding the filter coefficient value at that time and the multiplication result from the second multiplier 7, and outputs the addition result to the delay element 9. The absolute value calculator 10 calculates the absolute value of the output of the delay element 9 and outputs it as the filter coefficient absolute value Wn. In addition, the third multiplier 11
Outputs the filter calculation result Sn for one tap by multiplying the input signal Xn and the updated filter coefficient value held by the delay element 9. When the clear signal Cn is input, the delay element 9 clears the filter coefficient value to zero.

The present invention is not limited to the above-mentioned embodiments, but various modifications can be made within the scope of the invention.

[0021]

As described above, according to the present invention, the coefficient between the coefficients, which has been a problem in the past, is cleared by clearing the filter coefficient having a small coefficient absolute value to zero every time the coefficient is updated a predetermined number of times. It is possible to reduce the increase in the convergence time and the increase in the residual echo amount due to the mutual interference between the two, and it is possible to effectively cancel the echo component.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an echo canceller according to the present invention.

FIG. 2 is a block diagram showing a configuration of a coefficient updating circuit used in the echo canceller of FIG.

FIG. 3 is a block diagram showing a conventional echo canceller.

[Explanation of symbols]

 D1, D2, ..., Dn Delay circuit U1, U2, ..., Un Coefficient updating circuit 1 2-line / 4-line conversion circuit 2 Subtractor 3 Adder 4 Minimum tap detector 5 Coefficient clearing circuit 6, 7, 11 Multiplier 8 Adder 9 Delay element 10 Absolute value calculator

Claims (2)

[Claims] 1. An n for generating a pseudo echo by estimating an impulse response of an echo path based on a transmission signal and an error signal.
An echo signal leaking from the transmission circuit to the reception circuit on the 4-wire side of the 2-wire / 4-wire conversion circuit by having a tap adaptive filter and subtracting this pseudo echo from the echo signal to obtain the error signal. In the echo canceling device for canceling, the first to n-th delay circuits connected in series for giving a delay amount to the transmission signal, and the delay outputs of the first to n-th delay circuits are respectively input signals. As a first to a first filter that corrects the filter coefficient based on the error signal supplied to each of them, multiplies the corrected filter coefficient and the corresponding input signal, and outputs a filter calculation result for one tap. An nth coefficient updating circuit, an adder for adding the filter calculation results output from each of the first to nth coefficient updating circuits and outputting the result as the pseudo echo, From the echo signal, a pseudo-echo output from the adder is subtracted to output the error signal, and absolute values of the filter coefficients output from the first to n-th coefficient updating circuits are input. , The smallest tap detection circuit that retrieves r with a small value among them and outputs the tap number corresponding to it, and the above filter coefficient to the coefficient update circuit that corresponds to the tap number output from this minimum tap detection circuit. An echo canceling device, comprising: a coefficient clearing circuit for outputting a coefficient clearing signal for clearing. 2. The coefficient updating circuit comprises a first multiplier for multiplying the input signal and an error signal, and a first multiplier for multiplying an output of the first multiplier by a step size for determining a coefficient update amount. 2 multiplier, an adder for adding the output of the second multiplier and the feedback signal, the output of the adder is taken in as a modified filter coefficient, and its own output is fed back to the adder. And a delay element in which the filter coefficient is cleared by the coefficient clear signal, the filter coefficient output from the delay element and the input signal are multiplied, and the third multiplier for outputting the filter calculation result is output. 2. The echo canceller according to claim 1, further comprising: an absolute value calculation circuit that calculates an absolute value of the output of the delay element and outputs the filter coefficient absolute value.