JPH05152259A - Method for chamfering semiconductor wafer - Google Patents

Abstract

PURPOSE:To prevent a decrease in polishing efficiency through an improvement in the roughness precision of a chamfered face by polishing the peripheral edge of a semiconductor wafer with the rotary shaft of a grindstone inclined in the tangential direction of the semiconductor wafer. CONSTITUTION:A wafer 20 is held by a clamping mechanism or an suction mechanism and rotated at 1-2rpm for example. A grindstone 22 is formed as a grooved grindstone, and an inclined face 24 as a polishing face. The grindstone 22 is rotated at 2500rpm for example in a direction the same as or reverse to that of a wafer. The rotary shaft O-O of the grindstone 22 inclines by thetato the rotary shaft P-P of the wafer 20. That is, the grindstone 22 is inclined by theta in the tangential direction of a wafer 20a, and the wafer is chamfered in the peripheral edge in this state. Polishing in this state increases the number of action abrasive grains and improves the face precision of a polished face.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for chamfering a semiconductor wafer, and more particularly to a method for chamfering a semiconductor wafer by abutting a rotating grindstone on the peripheral edge of the rotating semiconductor wafer to polish the peripheral edge of the semiconductor wafer.

[0002]

2. Description of the Related Art The surface of a semiconductor wafer cut by slicing is lapped, and the peripheral edge of the semiconductor wafer is also chamfered to prevent cracks and dust from adhering and generating. That is, as shown in FIG. 4, the sloping surface 14 of the rotating grooved grindstone 12 is pressed against the rotating semiconductor wafer 10 to chamfer the peripheral edge 16 of the semiconductor wafer 10.

[0003]

However, according to the conventional method for chamfering a semiconductor wafer, as shown in FIG. 5, since the moving direction A of the abrasive grains is only the circumferential direction of the wafer, the chamfering is performed by the partial cutting edge of the grindstone. The chamfered surface has a streak A ', and the roughness accuracy of the chamfered surface is insufficient. If the roughness accuracy of such a chamfered surface is insufficient, chips are generated due to partial cracks on the peripheral surface,
Dust adheres to the peripheral surface, and fine particles are caught between the cracks to cause dust generation, which adversely affects the post-process of the wafer. In order to eliminate this drawback, we tried to improve the roughness accuracy of the polished surface by raising the grindstone count, reducing the depth of cut, increasing the number of dressings, and replacing several grindstones (two steps, three steps, etc.) However, such a measure has a drawback that the grinding efficiency is lowered.

The present invention has been made in view of the above circumstances, and an object thereof is to propose a method for chamfering a semiconductor wafer which improves the accuracy of the chamfered surface roughness and does not lower the polishing efficiency.

[0005]

In order to achieve the above object, the present invention provides a method for chamfering a semiconductor wafer in which a rotating grindstone is brought into contact with the peripheral edge of a rotating semiconductor wafer to polish the peripheral edge of the semiconductor wafer. Further, the rotation axis of the grindstone is inclined in the tangential direction of the semiconductor wafer to polish the peripheral edge of the semiconductor wafer.

[0006]

According to the present invention, the periphery of the semiconductor wafer is polished by inclining the rotation axis of the grindstone in the tangential direction of the semiconductor wafer with respect to the rotation axis of the semiconductor wafer. The polishing surface on the periphery of the wafer becomes a smooth surface, and the grindstone itself has less deformation of the polishing surface, so that the life of the grindstone is extended.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of a chamfering method for a semiconductor wafer according to the present invention will be described in detail below with reference to the accompanying drawings. The wafer 20 shown in FIG. 1 is held by a known holding mechanism or suction mechanism (not shown), and is rotated at, for example, 1 to 2 rpm. On the other hand, the grindstone 22 is formed as a grooved grindstone, and the inclined surface 24 is configured as a polishing surface. This whetstone 22
The wafer 20 is rotated in the same direction or in the opposite direction at, for example, 2500 rpm.

As shown in FIG. 2, the rotational axis O- of the grindstone 22 is
O is inclined by θ with respect to the rotation axis PP of the wafer 20. That is, the grindstone 22 is tilted by θ in the tangential direction of the wafer 20, and the peripheral edge 26 of the wafer is chamfered in this state. When chamfering is performed in such a state, the abrasive grain movement direction A of the grindstone 22 becomes a direction perpendicular to the rotation axis O--O as shown in FIG. 3, and is inclined with respect to the chamfered surface of the wafer 20. ing. Therefore, the abrasive grain movement direction A is the grinding direction component force A.
It is divided into ₁ and the component force A _{2 in the} perpendicular direction, which act on the polishing of the chamfered surface of the semiconductor wafer. In the present invention, the tilt angle θ is set for the special work of chamfering in the rotating round material.
And the grinding wheel angle α is determined and chamfered at a predetermined angle. That is, by tilting the grindstone with respect to the chamfering of the wafer, it is possible to provide a movement similar to that of a general tilt grinding method. Polishing in such a state increases the number of working abrasive grains, and improves the surface accuracy of the polished surface due to the effect of averaging the working abrasive grains.

[0009]

As described above, according to the chamfering method for a semiconductor wafer according to the present invention, an accurate polished surface can be obtained by polishing with the grindstone axis inclined with respect to the rotation axis of the semiconductor wafer. Also, the life of the grindstone is extended.

[Brief description of drawings]

FIG. 1 is a front view showing a chamfering method according to the present invention.

FIG. 2 is a view taken along line 2-2 of FIG.

FIG. 3 is an explanatory view showing a moving direction of abrasive grains in the present invention.

FIG. 4 is an explanatory view showing a conventional method for chamfering a semiconductor wafer.

FIG. 5 is an explanatory view showing movement directions of abrasive grains in a conventional semiconductor wafer chamfering method.

[Explanation of symbols]

 20 ... Semiconductor wafer 22 ... Grinding stone 24 ... Inclined surface

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[Procedure amendment]

[Submission date] December 11, 1991

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] 0002

[Correction method] Change

[Correction content]

[0002]

2. Description of the Related Art The surface of a semiconductor wafer cut by slicing is lapped, and the peripheral edge of the semiconductor wafer is also chamfered to prevent cracks and dust from adhering and generating. That is, as shown in FIG. 4, the inclined surface 14 of the grooved whetstone 12 that rotates is pressed against the rotating semiconductor wafer 10, and the peripheral edges 16 and 17 of the semiconductor wafer 10 are chamfered.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be corrected] 0003

[Correction method] Change

[Correction content]

[0003]

However, the conventional method for chamfering a semiconductor wafer is the wafer peripheral edge 16 or 17.
5, the movement direction A of the abrasive grains is only the circumferential direction of the wafer, so that the chamfered surface has a streak A ′ due to the partial cutting edge of the grindstone, and the roughness accuracy of the chamfered surface is Not enough. If the roughness accuracy of such chamfered surface is insufficient, chips are generated due to partial cracks on the peripheral surface, dust adheres to the peripheral surface, and fine particles are caught between the cracks. Is caused, which adversely affects the post-process of the wafer. In order to eliminate this drawback, raise the whetstone count,
We are trying to improve the roughness accuracy of the polished surface by reducing the depth of cut, increasing the number of dressings, and replacing several grindstones (two steps, three steps, etc.), but such measures reduce the grinding efficiency. There is.

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0006

[Correction method] Change

[Correction content]

[0006]

According to the present invention, since the rotation axis of the grindstone is inclined in the tangential direction of the semiconductor wafer with respect to the rotation axis of the semiconductor wafer to polish the peripheral edge of the semiconductor wafer, the whetstone also moves in the radial direction of the wafer on the inclined surface. At the same time, the movement of the grindstone on the outer peripheral surface is also applied in the wafer rotation axis direction, the polishing surface of the peripheral edge of the semiconductor wafer becomes a smooth surface, and the grindstone itself has less deformation of the polishing surface, which extends the life of the grindstone. ─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] December 11, 1991

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Name of item to be corrected] Fig. 4

[Correction method] Change

[Correction content]

[Figure 4] ─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] November 16, 1992

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 2

[Correction method] Change

[Correction content]

[Fig. 2]

Claims (2)

[Claims] 1. A chamfering method for a semiconductor wafer, wherein a rotating grindstone is brought into contact with a peripheral edge of a rotating semiconductor wafer to polish the peripheral edge of the semiconductor wafer, wherein a rotation axis of the grindstone is tilted in a tangential direction of an outer periphery of the semiconductor wafer. A method for chamfering a semiconductor wafer, which comprises polishing the periphery of the semiconductor wafer. 2. The chamfering method for a semiconductor wafer according to claim 1, wherein the polishing surface of the grindstone is the inclined surface of the grooved grindstone and the outer circumference of the shaft.