JPH0515083B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a filter circuit formed into a solid-state circuit.

[Background of the invention]

In recent years, electronic solid-state circuits (hereinafter referred to as ICs)
This has made it possible to miniaturize electronic circuits and make their characteristics more uniform. However, in filter circuits, the characteristics of the capacitive elements and resistive elements integrated in the IC vary due to independent factors, and
In order to obtain the specified characteristics, multiple stages of partial filter circuits are connected, so the characteristics of each partial filter circuit change independently, and when integrated into an IC, it is not possible to obtain characteristics with a highly accurate cutoff frequency. For this reason, conventionally, when converting an electronic circuit equipped with a filter circuit into an IC, the filter circuit is an external component of the IC, which limits the reduction in the number of circuit components and makes it difficult to miniaturize the electronic circuit. , which had become an obstacle to lower prices.

Therefore, the inventors of the present invention first proposed a filter circuit shown in FIG. 1 to solve the above-mentioned problems associated with the use of ICs.

In Fig. 1, 1 is a DC power supply, 2 is a signal source,
3 and 4 are partial filter circuits, 5 is a buffer and level shifter, 6 is a DC power supply, 7 is an output terminal, 8 to 1
2 is a resistor, 13 is an adjustment resistor, 14 and 15 are capacitive elements, 16 and 17 are transistors, 18, 19,
20 is a terminal.

In FIG. 1, a low-pass filter circuit will be explained as an example, with a resistor 8 and a capacitor 14.
A partial filter circuit 3 of the first-order low-pass filter circuit consisting of It goes without saying that the filter circuit can be constructed by cascading three or more such partial filter circuits.

A filter circuit with such a configuration is implemented as an IC. Terminals 18, 19, and 20 are external terminals of this IC,
The DC voltage of the DC power supply 6 is supplied as a bias voltage to the buffer/level shifter 5 via terminals 18 and 19. Further, the DC voltage of the DC power supply 6 applied to the terminal 18 is divided by the resistor 12 and the adjustment resistor 13, and a voltage resulting from this division is generated at the terminal 20.

The buffer/level shifter 5 has an output voltage of
That is, the voltage at the emitter terminal of transistor 17 is equal to its input voltage, i.e., transistor 1
The voltage is the voltage that is obtained by subtracting the base-emitter voltage of transistor 16 from the voltage supplied to the base terminal of transistor 6 and adding the base-emitter voltage of transistor 17. Since the voltage between them is almost equal, the DC voltage at the connection point between the resistor 8 of the partial filter 3 and the capacitive element 14, that is, the DC voltage approximately equal to the DC voltage of the DC power supply 1, is applied to the resistor 11 of the partial filter circuit 4 and the capacitive element 15. It is given to the connection point with. Therefore, the difference voltage between the DC voltage of DC power supply 1 and the DC voltage generated at terminal 20 is applied to capacitive elements 14 and 15 as a bias voltage.

The capacitive elements 14 and 15 are formed by PN junctions in the IC substrate, and are junction capacitive elements having a junction capacitance that changes depending on the bias voltage. high,
It is reverse biased by these differential voltages,
In order to clarify this, we also express it using a diode.

Here, even if the resistance values of the resistor 8 of the partial filter circuit 3 and the resistor 11 of the partial filter circuit 4 change due to various factors, the ratio of the resistance values is maintained constant with high accuracy due to the layout. Similarly, the capacitive elements 14 and 15 are arranged so that the capacitance ratio is kept constant with high precision. Generally, resistors and junction capacitors have an absolute value accuracy of about ±20% when integrated into ICs, but resistors and junction capacitors can be made to have an accuracy of 1% in the resistance value ratio and capacitance ratio. It is easy to place.

The variation in the ratio of the cutoff frequencies of the partial filter circuits 3 and 4 is determined by the accuracy of the ratio of the resistance values of the resistors 8 and 11 and the capacitance ratio of the capacitive elements 14 and 15. Therefore, the ratio of these resistance values, By setting the capacitance ratio with high precision, the ratio of the cutoff frequencies of the partial filter circuits 3 and 4 can be kept constant with high precision. In other words, for some reason, the resistance is 8,1
Even if the absolute value of the resistance value of 1 and the absolute value of the capacitance of capacitive elements 14 and 15 change, the cutoff frequencies of partial filter circuits 3 and 4 change while their ratio remains constant with high precision. It turns out.

Therefore, since the same reverse bias voltage is applied to the capacitive elements 14 and 15, the adjusting resistor 1
By changing the resistance value of capacitive element 1
The capacitances of 4 and 15 vary while their ratio remains constant with high precision, and at the same time, the cutoff frequencies of partial filter circuits 3 and 4 also vary while their ratio remains constant with high precision. It's going to change. Therefore, the resistance in the initial state is 8,1
The resistance value of 1 and the capacitance of capacitive elements 14 and 15 are set to specified values, and the cutoff frequencies of partial filter circuits 3 and 4 are set so that the characteristics of the filter circuit as a whole have the specified characteristics. As a result, the filter circuit can be adjusted using the adjustment resistor 13 so that the predetermined characteristics are achieved with high precision.

However, since this conventional filter circuit uses junction capacitance elements as the capacitance elements 14 and 15, it is not possible to adjust the capacitance by changing the reverse bias voltage according to changes in the DC voltage generated at the terminal 20. However, there is a drawback that the capacitances of the capacitive elements 14 and 15 change depending on the amplitude of the signal supplied from the signal source 2. For this reason, the cutoff frequency of the filter circuit changes depending on the amplitude of the signal, and distortion occurs in the large amplitude output signal obtained at the output terminal 7 due to the nonlinearity of the junction capacitance elements 14 and 15. Become.

[Purpose of the invention]

The purpose of the present invention is to eliminate the drawbacks of the above-mentioned prior art,
An object of the present invention is to provide a filter circuit implemented as an IC so as to prevent fluctuations in the cutoff frequency depending on the level of a supplied signal and to obtain an output signal without distortion.

[Summary of the invention]

In order to achieve this object, the present invention configures the capacitive element of the partial filter circuit by connecting in parallel a MOS capacitive element with a constant capacitance and a junction capacitive element that is variable depending on the bias voltage. The capacitance of the capacitive element is made sufficiently smaller than the capacitance of the MOS capacitive element, and the capacitance of the junction capacitive element can be adjusted from the signal input side so that the cutoff frequency of the partial filter circuit can be set to a predetermined value. It is characterized by the fact that it is

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings, but first, the principle of the present invention will be described with reference to FIG. However, 21 and 22 are MOS capacitive elements,
23, 24 are junction capacitance elements, 25, 26, 25',
26' is a terminal, and parts corresponding to those in FIG. 1 are given the same reference numerals.

In FIG. 2, the partial filter circuit 3 is provided with a parallel-connected MOS capacitive element 21 and a junction capacitive element 23, each having a silicon oxide film as a dielectric and having a MOS (metal oxide semiconductor) capacitance. , and the resistor 8 determine characteristics such as the cutoff frequency of the partial filter circuit 3. Similarly, the partial filter circuit 4 is also provided with a MOS capacitive element 22 and a junction capacitive element 24 connected in parallel, and these and the resistor 11 determine the cutoff frequency and other characteristics of the partial filter circuit 4. .

The terminal 25 of the MOS capacitive element 21 is connected to the resistor 8, the terminal 25' of the MOS capacitive element 22 is connected to the resistor 11, and the terminal 26 of the MOS capacitive element 21 is connected to the resistor 8.
and the terminal 26' of the MOS capacitive element 22 are both grounded. The junction capacitance elements 23 and 24 are both connected to the terminal 20 between the resistors 12 and 13, and, like the junction capacitances 14 and 15 of the conventional filter circuit shown in FIG. A reverse bias voltage is applied in an adjustable manner.

Generally, a MOS capacitive element has linear characteristics, and its capacitance is constant with respect to the amplitude of a signal. Therefore,
The capacitance of the MOS capacitive elements 21 and 22 is set sufficiently larger than the capacitance of the junction capacitive elements 23 and 24, so that the cutoff frequency of the partial filter circuit 3 is almost equal to the resistance 8.
MOS capacitive element 21, and
The characteristics of the partial filter circuit 4 are almost the same as the resistance 11.
It is determined by the MOS capacitor element 22. Junction capacitance elements 23 and 24 are MOS capacitance elements 21 and 24, respectively.
This is for adjusting the variation in the absolute value of the cut-off frequency of the partial filter circuits 3 and 4 due to the variation in the capacitance of the partial filter circuits 3 and 4.

Similar to the conventional filter circuit shown in Figure 1,
Ratio of resistance values of resistors 8 and 11, MOS capacitor element 21,
22 and the capacitance ratio of the junction capacitance elements 23 and 24 are always kept constant with high precision.
Each element is arranged in a layout within the IC board.

In the initial state, the resistance values of the resistors 8 and 11 and the resistance values of the MOS capacitor elements 2
1 and 22 and the capacitances of the junction capacitance elements 23 and 24 are set. Therefore, when the adjustment resistor 13 is adjusted, the capacitances of the junction capacitance elements 23 and 24 change while keeping their ratio constant with high precision, and the cutoff frequencies of the partial filter circuits 3 and 4 are adjusted with high precision. are respectively set to predetermined values.

FIG. 3 is a configuration diagram showing a MOS capacitive element,
27 is a P type substrate, 28 is an N type epitaxial layer,
29 is a P-type diffusion layer, 30 is an oxide film, 31 and 32 are conductor layers, and 33 is a junction capacitance, and parts corresponding to those in FIG. 2 are given the same reference numerals.

In FIG. 3, an N-type epitaxial layer 28 is formed on a P-type substrate 27, and a P-type diffusion layer 29 is formed by diffusion into this N-type epitaxial layer 28. In FIG. Furthermore, an N-type epitaxial layer 28,
An oxide film 30 is provided on the P-type diffusion layer 29, a conductor layer 31 is provided on this oxide film 30 to connect the terminal 25, and a conductor layer 32 is provided on the P-type diffusion layer 29 to connect the terminal 26. do.

In such a configuration, P is placed on both sides of the oxide film 30.
MOS capacitance is generated between type diffusion layer 29 and conductor layer 31, and therefore MOS capacitance element 21 is present between terminals 25 and 26. However, along with this, a junction capacitance 33 is generated at the junction between the N-type epitaxial layer 28 and the P-type diffusion layer 29. As a result, in the equivalent circuit of FIG. 3, as shown in FIG. 4, the MOS capacitive element 21 exists in series between the terminals 25 and 26, and the junction capacitive element 33 exists in parallel. .

This junction capacitor 33 has a capacitance of about 1/2 to 1/5 of the capacitance of the MOS capacitor 21, but the terminal 2
When a signal is applied to terminals 5 and 26, the capacitance changes depending on the amplitude of this signal. Therefore, even if the capacitance of MOS capacitive element 21 is constant, terminal 2
The capacitance between 5 and 26 will change depending on the amplitude of the signal.

Therefore, in order to prevent this, the terminal 25 is connected to the resistor 8 (FIG. 2), the terminal 26 is grounded, and the P-type substrate 27 is grounded to connect the diffused capacitance element 33.
AC short circuit. With this, the terminal 25,
To prevent the capacitance between 26 and 26 from being affected by the diffusion capacitance 33.

The same applies to the MOS capacitive element 22 in FIG. 2, and the terminals 25 and 26 in FIG. 3 correspond to terminals 25' and 26', respectively.

As described above, the cutoff frequencies of the partial filter circuits 3 and 4 can be set to a predetermined value with high accuracy, and the capacitive elements forming the partial filter circuits 3 and 4 have linearity. Therefore, the output signal obtained at the output terminal 7 does not contain any distorted portion.

FIG. 5 is a circuit diagram showing an embodiment of the filter circuit according to the present invention, in which 34 and 35 are resistors, 36
37 is a transistor, 37 is a capacitor, and 38 is a terminal, and parts corresponding to those in FIG. 2 are given the same reference numerals.

This embodiment is based on the principle shown in FIG.
By using the junction capacitance element 33 that inevitably occurs when the MOS capacitance element 21 shown in FIGS. It also adjusts the voltage.

In FIG. 5, the capacitive element forming the partial filter 3 is constructed as shown in FIG.
By using the MOS capacitive element 21 and the junction capacitive element 33 that is inevitably connected in parallel with the MOS capacitive element 21, the terminal 26 is connected.
is connected to the resistor 26, the terminal 25 is grounded, and P
The mold board 27 is also grounded. As a result, the junction capacitive element 33 is inserted in parallel to the MOS capacitive element 21. Since the capacitance of the junction capacitor 33 is about 1/2 to 1/5 of the capacitance of the MOS capacitor 21, the cutoff frequency of the partial filter circuit 3 is almost equal to the resistance 8.
It is determined by the MOS capacitive element 21.

The same applies to the partial filter circuit 4,
The MOS capacitive element 22 and the junction capacitive element 33' are obtained by the configuration shown in FIG. 3, and the MOS capacitive element 21 in FIG. ', the terminal 26 corresponds to the terminal 26', and the junction capacitance element 33 corresponds to the junction capacitance element 33'.

Regarding the partial filter circuits 3 and 4 of this embodiment, the ratio of the resistance values of the resistors 8 and 11, the capacitance ratio of the MOS capacitance elements 21 and 22, and the junction capacitance elements 33 and 33'
It goes without saying that each element is arranged in a layout such that the capacitance ratio of is always held constant with high precision.

External terminal 38 of IC board and partial filter circuit 3
An emitter floor circuit consisting of a transistor 36 and a resistor 35 is provided between the two. A collector terminal of the transistor 36 is connected to the DC power supply 6 via the external terminal 18. The resistor 34 and the adjusting resistor 13 function as bias resistors for the transistor 36, the resistor 34 is connected to the external terminal 18 and the base terminal of the transistor 36, and the adjusting resistor 13 is connected to the base terminal of the transistor 36 via the external terminal 38. It is externally connected to the In addition, a capacitor 37 is connected to the external terminal 38.
A signal source 2 is connected via.

In this configuration, the DC voltage of the DC power supply 6 is divided by the resistor 34 and the adjustment resistor 13 and supplied to the base terminal of the transistor 36, and by changing the resistance value of the adjustment resistor 13, the emitter resistor 35 The DC voltage applied to changes. This DC voltage is applied to the junction capacitance element 3 of the partial filter circuit 3.
3 as a reverse bias voltage, and is further applied to the junction capacitance element 33' of the partial filter circuit 4 via the buffer/level shifter 5. Therefore, when the resistance value of the adjustment resistor 13 is changed, the capacitance of the junction capacitance elements 33, 33' changes while maintaining the capacitance ratio with high precision.

In this way, the cutoff frequencies of the partial filter circuits 3 and 4 can be set to a predetermined value with high accuracy using the adjustment resistor 13.

In this embodiment, as a junction capacitance element for adjusting the cutoff frequency of the partial filter circuits 3 and 4,
Since the junction capacitance that inevitably occurs when configuring a MOS capacitive element is used, the manufacturing process of an IC filter circuit is simplified.

In addition, in FIG. 2, the junction capacitance element 23,
Although a dedicated IC external terminal was required for adjusting the capacitance of 24, in this embodiment, this is not necessary, and the predetermined filter characteristics can be set with high accuracy by using only the minimum necessary IC external terminals. is possible.

Although the above embodiments have been described with reference to a low-pass filter circuit, the present invention may also be applied to a filter circuit including a resistor and a capacitive element, such as a high-pass filter circuit.

〔Effect of the invention〕

As explained above, according to the present invention, the cutoff frequency of the partial filter circuit is substantially determined by the MOS capacitive element, and the cutoff frequency can be adjusted by using the junction capacitive element with a sufficiently small capacitance and which is inevitably formed in the IC substrate. Since the cut-off frequency can be set to a predetermined value with high precision, it is possible to
The cutoff frequency does not change depending on the amplitude of the supplied signal and exhibits a linear characteristic, making it possible to prevent distortion components from being mixed into the signal, and eliminating the need to separately form a junction capacitive element. This simplifies the manufacturing process of the IC, and since the capacitance of the junction capacitive element is adjusted by the bias voltage superimposed on the input signal, the IC external terminal to which the means for adjusting the capacitance is connected is ICs that are no longer needed and used
The number of external terminals can be reduced to the minimum necessary, and a filter circuit with excellent functions can be provided without the drawbacks of the prior art described above.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an example of a conventional filter circuit, Fig. 2 is a circuit diagram showing the principle of a filter circuit according to the present invention, and Fig. 3 is a configuration diagram showing a specific example of the MOS capacitive element shown in Fig. 2. , FIG. 4 is a circuit diagram showing an equivalent circuit of FIG. 3, and FIG. 5 is a circuit diagram showing an embodiment of a filter circuit according to the present invention. 1...DC power supply, 2...Signal source, 3, 4...Partial filter circuit, 5...Buffer and level shifter, 6...DC power supply, 7...Output terminal, 8, 11
...Resistance, 13...Adjustment resistor, 21, 22...
MOS capacitive element, 23, 24, 33, 33'... Junction capacitive element.

Claims (1)

[Scope of Claims] 1. A filter circuit formed in a single solid-state circuit board, in which a plurality of partial filter circuits each consisting of a resistive element and a capacitive element are connected in cascade; A MOS capacitive element formed in the circuit board and a junction capacitive element inevitably generated in the solid circuit board are connected in parallel to form the capacitive element, and one end of the capacitive element of each of the partial filter circuits is connected in parallel to the junction capacitive element formed in the solid circuit board. connected to the same external connection terminal of the solid-state circuit board, and maintaining constant the resistance value ratio of the resistor element, the capacitance ratio of the MOS capacitor element, and the capacitance ratio of the junction capacitor element between the partial filter circuits; The junction capacitance element is set to be sufficiently smaller than the capacitance of the MOS capacitance element for each partial filter circuit, and an adjustment resistor is provided for changing the bias voltage superimposed on the signal supplied to the first stage partial filter circuit. A filter characterized in that the capacitance of the junction capacitance element of each of the partial filter circuits can be adjusted by changing the bias voltage, and a predetermined filter characteristic can be set. circuit.