JPH0514619Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to an A/D conversion device for correcting the level of A/D conversion in accordance with the level of a video signal in a liquid crystal television or the like.

[Prior Art and Problems Therewith] In liquid crystal televisions and the like, a video signal is A/D converted by an A/D converter to achieve display with multiple gradations. At this time, the number of gradations is 16 gradations or 8
Since the gradation level is very low, sufficient contrast cannot be obtained.

Therefore, we change the level of A/D conversion according to the level of the video signal, and always keep the A/D conversion near the average value.
It is also possible to convert.

In this way, for a video signal having a standard amplitude as shown in FIG. This can cover the small number of gradations in liquid crystal displays.

However, in the case of a video signal that has a large amplitude overall as shown in Figure 5B, the level difference between the maximum and minimum values of the video signal and the upper limit reference potential VH and lower limit reference potential VL becomes large. It becomes a crushed picture,
Furthermore, when the overall amplitude is small as shown in C in the same figure, there is a problem that the number of gradations of the liquid crystal display cannot be fully utilized, resulting in a dark picture.

This idea was made in view of the above circumstances,
It is an object of the present invention to provide an A/D conversion device that can always perform A/D conversion with optimal contrast even when the amplitude of a video signal is large or small.

[Means for Solving the Problems] This invention was made to solve the above problems, and includes an A/D converter that A/D converts a video signal between an upper limit reference potential and a lower limit reference potential; An amplification factor control means whose amplification factor is variably controlled so that the amplitude of the video signal is approximately constant, and a video signal inputted through the amplification factor control means are input to a midpoint, and a predetermined distance between this midpoint and a predetermined distance is input. resistance dividing means to obtain the upper limit reference potential by dividing the resistance between the high potential and a predetermined low potential, and to obtain the lower limit reference potential by dividing the resistance between the midpoint and a predetermined low potential; By A/D converting the video signal input to the A/D converter via the midpoint of the resistance dividing means between the upper limit reference potential and the lower limit reference potential obtained by the resistance dividing means, The present invention is characterized in that the area around the average value of a video signal whose amplitude is approximately constant is A/D converted.

[Function] With this configuration, the video signal input through the midpoint of the resistance dividing means is A/V between the upper limit reference potential and the lower limit reference potential obtained by the resistance dividing means. By converting D, A/
The upper limit reference potential and lower limit reference potential of D conversion are also changed to follow the average value of the video signal, so that the amplitude of the video signal is almost constant.
Since it is possible to perform A/D conversion around the average value of the video signal subjected to AGC, it is possible to make the most of the gradation when the gradation is not sufficient.

[Embodiment] An embodiment of this invention will be described below with reference to the drawings. 1 to 4 show an embodiment of this invention, in which FIG. 1 shows a level correction circuit for a video signal, and FIG. 4 shows an A/D circuit provided at the subsequent stage.
This is the conversion section.

In FIG. 1, 11 is an input terminal, and a video signal is applied to this input terminal 11 from the previous stage circuit.
The video signal applied to this input terminal 11 is input to, for example, the base of an NPN transistor Tr1 via a coupling capacitor C0. Also,
The base of this transistor Tr1 is connected to the Vcc power supply line 12a via a resistor R1, and
It is connected to the control circuit 13 via a resistor R2. The collector of the transistor Tr1 is connected to the power supply line 12a, and the emitter (point A) is connected to the ground line 12b via a resistor R3. The transistor Tr1 has resistors R1, R2,
A bias circuit consisting of R3 determines the bias of the emitter, that is, the point (A). Further, the emitter of the transistor Tr1 is connected to the emitter of the NPN transistor Tr2 via a capacitor C1, and is also connected to the control circuit 13 via a capacitor C2. The emitter of the transistor Tr2 is connected to the ground line 12b via the resistor R4, and the collector (point D) is connected to the ground line 12b through the resistor R4.
It is connected to the base of the NPN transistor Tr3 and also to the control circuit 13 via a resistor R5. Furthermore, the base of the transistor Tr2 is connected to the power supply line 12a via a resistor R6, and to the ground line 12b via a parallel circuit of a resistor R7 and a capacitor C3. Further, the collector of the transistor Tr3 is connected to the power supply line 1.
2a, and its emitter is connected to the ground line 12b via a resistor R8. The above transistor
Tr3 and resistor R8 constitute an impedance converter, and the signal output from the emitter (point E) of transistor Tr3 is sent to the Video terminal in FIG. 4 as a corrected video signal Video2.

On the other hand, the control circuit 13
a is connected to the power supply line 12a, and a - power supply line 14b is connected to the resistor R2. Then, the + power line 14a and the - power line 14
Resistors R9 and R10 are connected in series between
The connection point between these resistors R9 and R10 is connected in series through a forward-connected diode D1 and a resistor R11.
Connected to the base of NPN transistor Tr4. Further, the capacitor C2 is connected to the connection point (B) between the diode D1 and the resistor R11.
The resistors R9 and R10 and the diode D1 are a bias circuit for the point (B). A capacitor C4 is provided between the base of the transistor Tr4 and the - power supply line 14b. This capacitor C4 and the resistor R11 constitute a low pass filter. Further, the emitter of the transistor Tr4 is connected to the resistor R13.
The collector (point C) is connected to the + power line 14b through the resistor R12.
4a, and is also connected to the collector of the transistor Tr2 via a resistor R5. In other words, the transistor Tr4 is activated by the transistor Tr4.
A collector potential of Tr2 is applied, and the multiplication rate of the transistor Tr2 is controlled by this collector potential.

FIG. 4 shows an A/D conversion section provided after the level correction circuit in FIG. 1, and the color video signal sent from the level correction circuit in the previous stage is
The luminance signal is applied to the Video terminal, taken out by a filter consisting of a resistor R1 and a capacitor C1, and supplied to the A/D converter 1 via a coupling capacitor C2 and a terminal C. Further, the terminal C is connected to the Vcc power supply via resistors R2 and R3, and is grounded (GND) via resistors R4 and R5. Then, the divided potential at the connection point A between resistors R2 and R3 is set as the upper limit reference potential VH by A/
The divided potential at the connection point A, which is supplied to the D converter 1 and connected to the resistors R4 and R5, is used as the lower limit reference potential VL for the A/D converter.
Converter 1 is supplied. In addition, capacitors C3 and C4 are connected between the above point A and the ground, and between the point A and the ground, respectively.
is provided.

In the above configuration, the potential at point C and the potential at points A and A are created by resistor division between the Vcc power supply and ground (GND), so the potential at point C is determined according to the level of the video signal. The potential at point A (upper limit reference potential VH) and the potential at point A (lower limit reference potential VL) change.

Next, the operation of the above embodiment will be explained. Input terminal 1
The video signal input to transistor Tr1
biased to a predetermined value by
It is taken out by the emitter (A) of Tr1. This (A)
The video signal taken out from the point is connected to the capacitor C1
The signal is input to the transistor Tr2 via the capacitor C2, and is also input to the point (B) of the control circuit 13 via the capacitor C2. The video signal input to this point (B) provides a certain potential to the base of the transistor Tr4 via a low-pass filter consisting of a resistor R11 and a capacitor C4. For example, if a video signal Video1 with a large amplitude is applied to the input terminal 11 as shown in FIG.
The base potential of the transistor Tr4 increases due to the signal output to the point, and the collector current increases together with the base current of the transistor Tr4. As a result, the collector C potential of the transistor Tr4 decreases, and the collector potential applied to the transistor Tr2 also decreases. The amplification factor of this transistor Tr2 decreases when the collector supply potential decreases. Therefore, when a video signal with a large amplitude is sent from transistor Tr1 to transistor Tr2 as described above, it is not amplified much and is sent to transistor Tr2.
The two collectors (D) output the same phase. The video signal output from the transistor Tr2 is impedance-converted in the transistor Tr3, and is sent as the video signal Video2 to the A/D converter shown in FIG. 4.

Furthermore, if a video signal Video1 with a small amplitude is applied to the input terminal 11 as shown in FIG. Base current as well as collector current decrease. As a result, the transistor
The collector (C) potential of Tr4 becomes high, and as shown in FIG. 3, the collector potential applied to transistor Tr2 also becomes high. This transistor Tr2 is
As the collector supply potential increases, the amplification factor increases. Therefore, at this time, the small amplitude video signal output from the transistor Tr1 is output from the transistor Tr1.
It is sufficiently amplified by Tr2 and output in the same phase from the collector D of transistor Tr2. The video signal output from this transistor Tr2 is
The impedance is converted in the transistor Tr3, and the signal is sent as a video signal Video2 to the A/D converter shown in FIG.

As shown above, the video signal Video1 is input to the input terminal 11.
is given, the amplification factor of transistor Tr2 is controlled according to the level of this video signal, and a video signal of a constant level is always output from transistor Tr3.
Video2 is output. And this video signal
By inputting Video 2 to the A/D converter shown in Fig. 4, upper limit reference potential VH and lower limit reference potential VL are set.
The video signal can be kept constant between the two, and images with good contrast can be obtained. In this case, by amplifying the low-level video signal as described above, the image that should be dark becomes brighter, so it is no longer faithful to the original image, but the contrast is low and the number of gradations is small like LCD. When it comes to objects, increasing the contrast makes them appear clearer, even if you lose some fidelity.

[Effects of the invention] As explained above, according to this invention, the amplification factor is variably controlled so that the amplification of the video signal is approximately constant. A/D converts the video signal between the upper limit reference potential and the lower limit reference potential obtained by the resistance dividing means.
By converting, the upper limit reference potential and lower limit reference potential of A/D conversion are changed to follow the average value of the video signal, and as a result, AGC is applied so that the amplitude of the video signal is almost constant. Since it is possible to perform A/D conversion around the average value of the video signal,
When the gradation is not sufficient, it is possible to make the most of the gradation and improve the contrast.

[Brief explanation of drawings]

1 to 4 show an embodiment of this invention, in which FIG. 1 is a circuit configuration diagram, FIG. 2 is a signal waveform diagram for explaining the operation when the amplitude of the video signal is large, and FIG. Figure 3 is a signal waveform diagram for explaining the operation when the amplitude of the video signal is small, Figure 4 is a diagram showing the A/D converter, and Figure 5 is a signal waveform diagram for explaining the conventional operation. be. 1...A/D converter, 11...Input terminal, 12
a, 12b...power line, 13...control circuit,
14a...+power line 4 line, 14b...-power line 4 line.

Claims (1)

[Scope of utility model registration request] an A/D converter that A/D converts a video signal between an upper limit reference potential and a lower limit reference potential; an amplification factor control means that variably controls an amplification factor so that the amplitude of the video signal is approximately constant; The video signal input via the amplification factor control means is input to the midpoint, and resistance is divided between this midpoint and a predetermined high potential to obtain the upper limit reference potential, and the voltage between this midpoint and a predetermined low potential is obtained. resistor dividing means for obtaining the lower limit reference potential by dividing the potential between the resistor and the resistor; A/D conversion is performed between the upper limit reference potential and the lower limit reference potential obtained by the dividing means, so that the area around the average value of the video signal whose amplitude is approximately constant is A/D converted. A/D conversion device.