JPH05134618A - Display device - Google Patents

Display device

Info

Publication number
JPH05134618A
JPH05134618A JP3299473A JP29947391A JPH05134618A JP H05134618 A JPH05134618 A JP H05134618A JP 3299473 A JP3299473 A JP 3299473A JP 29947391 A JP29947391 A JP 29947391A JP H05134618 A JPH05134618 A JP H05134618A
Authority
JP
Japan
Prior art keywords
signal
circuit
timing
synchronizing signal
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3299473A
Other languages
Japanese (ja)
Inventor
Hiroyuki Ichii
博之 市井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PFU Ltd
Original Assignee
PFU Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PFU Ltd filed Critical PFU Ltd
Priority to JP3299473A priority Critical patent/JPH05134618A/en
Publication of JPH05134618A publication Critical patent/JPH05134618A/en
Pending legal-status Critical Current

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  • Controls And Circuits For Display Device (AREA)

Abstract

PURPOSE:To prevent the burn of a fluorescent surface even at the time of using a CRT device over along period of time. CONSTITUTION:The display device which displays screen at a CRT 1 is provided with a video signal transmission circuit 3, a synchronizing signal transmission circuit 4, a synchronizing signal timing changing circuit 5 controlling the timing of the synchronizing signal transmitted by the synchronizing signal transmission circuit 4, and a timer 6 periodically emitting pulse signals to change the timing of the synchronizing signal. The timing of the synchronizing signal is periodically changed by the synchronizing signal timing changing circuit 5, by which the display screen is moved vertically or laterally as time passes by.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】CRTに表示を行わせる表示装置
に関し、特に、主に静止画像を表示する際に特定の部分
の螢光面焼けを防ぐ機構を備える表示装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device for displaying an image on a CRT, and more particularly to a display device having a mechanism for preventing the fluorescent surface burning of a specific portion when displaying a still image.

【0002】[0002]

【従来の技術】図7はCRTディスプレイ装置の構成を
示す。図中、1はCRT、2はCRTドライブ回路、3
は映像信号送出回路、4は同期信号送出回路を示してい
る。
2. Description of the Related Art FIG. 7 shows the structure of a CRT display device. In the figure, 1 is a CRT, 2 is a CRT drive circuit, 3
Is a video signal sending circuit, and 4 is a synchronizing signal sending circuit.

【0003】静止画像として、例えば文字「A」を表示
すると、当該文字「A」の部分に電子ビームが照射され
その場所の螢光体が少しずつ劣化する。そして、長時間
にわたって同じ静止画像を表示すると、特定の場所の螢
光体が劣化して画面焼けを発生する。
When the character "A", for example, is displayed as a still image, the portion of the character "A" is irradiated with an electron beam, and the phosphor at that location is gradually deteriorated. Then, when the same still image is displayed for a long time, the fluorescent body in a specific place deteriorates and screen burn occurs.

【0004】上記面焼けを防止するための先行発明とし
て特願昭63−104971に開示されたCRT表示装
置が存在する。該CRT表示装置の概要を説明する。該
装置においては、同期信号送出回路とCRTドライブ回
路との間に、上記同期信号を文字行のn/m(n,mは
整数であり、N<M)分だけタイミングを変更するタイ
ミング調整回路を設け、該タイミング変更のオン・オフ
をフリップフロップ回路によって制御するようにしてい
る。即ち、文字行のn/m分だけ垂直方向に画面を移動
させるようにしている。また、該装置ではCRT表示装
置の電源投入のたびごとに上記画面移動をおこなってい
る。
There is a CRT display device disclosed in Japanese Patent Application No. 63-104971 as a prior invention for preventing the surface burning. The outline of the CRT display device will be described. In the apparatus, a timing adjusting circuit for changing the timing of the synchronizing signal by n / m (n and m are integers, N <M) of a character line between the synchronizing signal sending circuit and the CRT drive circuit. Is provided, and the on / off of the timing change is controlled by a flip-flop circuit. That is, the screen is moved vertically by n / m of the character line. In addition, the screen is moved every time the CRT display device is powered on.

【0005】[0005]

【発明が解決しようとする課題】上記の従来のCRT表
示装置では、電源投入時に画面移動を行うので、電源投
入後長い時間該装置を静止画像表示に使用する際には、
上記タイミング調整回路を設けない時と同様に螢光面焼
けを起こす欠点があった。本発明は、これを解決するも
のであり、長時間CRT装置を使用する際においても、
螢光面焼けを防ぐことを、目的とする。
In the above-mentioned conventional CRT display device, the screen is moved when the power is turned on. Therefore, when the device is used for displaying a still image for a long time after the power is turned on,
As in the case where the timing adjusting circuit is not provided, there is a drawback that the fluorescent surface is burnt. The present invention solves this, and even when using a CRT device for a long time,
The purpose is to prevent fluorescent surface burning.

【0006】[0006]

【課題を解決するための手段】図1は、本発明の原理構
成図を示す。図中、1はCRT、2はCRTドライブ回
路、3は映像信号送出回路、4は同期信号送出回路、5
は同期信号タイミング変更回路、6はタイマーを示して
いる。
FIG. 1 is a block diagram showing the principle of the present invention. In the figure, 1 is a CRT, 2 is a CRT drive circuit, 3 is a video signal transmission circuit, 4 is a synchronization signal transmission circuit, 5
Is a synchronizing signal timing changing circuit, and 6 is a timer.

【0007】同期信号タイミング変更回路5は上記同期
信号送出回路4が送出する同期信号のタイミングを制御
する。タイマー6は上記同期信号タイミング変更回路に
周期的にパルス信号を出す。
The synchronizing signal timing changing circuit 5 controls the timing of the synchronizing signal sent by the synchronizing signal sending circuit 4. The timer 6 periodically outputs a pulse signal to the synchronizing signal timing changing circuit.

【0008】[0008]

【作用】CRTドライブ回路2は上記同期信号により同
期をとりつつ上記映像信号をCRT1に映像化する。従
って、同期信号タイミング変更回路5によって、同期信
号のタイミングが変更される度に、画面が上下方向又は
左右方向に移動する。上記同期信号タイミング変更は、
電源投入中はオペレーションによらず、周期的パルスが
タイマー6によって出されるたびに行われるので、該画
面移動も周期的に行われることとなる。また、画面移動
の速度は人間の感覚でわからない程度の速度であること
が望ましい。
The CRT drive circuit 2 visualizes the video signal on the CRT 1 while synchronizing with the sync signal. Therefore, every time the timing of the synchronizing signal is changed by the synchronizing signal timing changing circuit 5, the screen moves vertically or horizontally. The above synchronization signal timing change is
Since the periodic pulse is generated every time the timer 6 is issued regardless of the operation during power-on, the screen movement is also periodically performed. Further, it is desirable that the speed of screen movement is a speed that humans cannot perceive.

【0009】[0009]

【実施例】図2は、映像信号と同期信号の関係を示す。
同期信号と映像信号との時間差が変化すると、画面は上
下方向又は左右方向へ移動する。例えば、図2の同期信
号を基準として上記時間差の変化量が水平走査周期よ
りも短かい時には、同期信号のように時間差が短かく
なると画面は左へ移動し、同期信号のように長くなる
と画面は右へ移動する。また、上記時間差の変化量が水
平走査周期以上である時には、上下方向にも移動する。
例えば、水平走査周期が60μSであるときに、上記時
間差が60μS長くなると画面は下へ水平走査線分だけ
下がる。
FIG. 2 shows the relationship between a video signal and a sync signal.
When the time difference between the sync signal and the video signal changes, the screen moves vertically or horizontally. For example, when the change amount of the time difference is shorter than the horizontal scanning period with reference to the sync signal of FIG. 2, the screen moves to the left when the time difference becomes short like the sync signal and becomes long when the time difference becomes long like the sync signal. Moves to the right. Further, when the amount of change in the time difference is equal to or greater than the horizontal scanning period, it also moves in the vertical direction.
For example, when the horizontal scanning period is 60 μS and the time difference is increased by 60 μS, the screen is lowered downward by the horizontal scanning line segment.

【0010】図3は、本発明の実施例(1)を示す。図
3に示す実施例では、同期信号タイミング変更回路とし
て同期信号を遅延する信号ディレイ回路51を用いてい
る。図4は、本発明の実施例(2)を示す。図4に示す
実施例では、同期信号タイミング変更回路として、相対
的な同期信号タイミングを変更すべく、映像信号を遅延
させる信号ディレイ回路52を用いている。図3又は図
4に示す実施例により、映像信号と同期信号との時間差
を変化させて画面を上下方向又は左右方向へ移動させる
ことができる。
FIG. 3 shows an embodiment (1) of the present invention. In the embodiment shown in FIG. 3, a signal delay circuit 51 for delaying the synchronizing signal is used as the synchronizing signal timing changing circuit. FIG. 4 shows an embodiment (2) of the present invention. In the embodiment shown in FIG. 4, a signal delay circuit 52 that delays a video signal is used as the synchronizing signal timing changing circuit to change the relative synchronizing signal timing. According to the embodiment shown in FIG. 3 or 4, the time difference between the video signal and the synchronization signal can be changed to move the screen in the vertical direction or the horizontal direction.

【0011】図5は、表示画面の一部の拡大図を示す。
図に示す如く文字Aを実施例によりa→b→c→dと移
動させる。この移動速度は人間の感覚でわからない程度
であることが望ましい。例えば、1文字が60ドット×
60ドットで構成される場合において、図5に示すよう
に右→下→左→上と移動させる場合における、図4の実
施例の動作を説明する。タイマーは、例えば、10分毎
にパルス信号を発し、信号ディレイ回路51はパルス信
号を受け取る毎に映像信号の遅延幅を1ドット分増や
す。これを30回繰り返すと300分で30ドットつま
り半文字分右へゆっくりと画面が移動する(a→b)。
次に信号ディレイ回路51はパルス信号を受け取る毎に
一走査線分だけ映像信号の遅延幅を増やす。これを30
回繰り返すと30走査線分だけ下へ画面が移動する(b
→c)。(a→b)とは逆にパルス信号を受け取る毎に
遅延幅を減らせば左へ移動する(c→d)。(b→c)
とは逆にパルス信号を受け取る毎に遅延幅を減らせば上
へ移動する(d→a)。当該a→b→c→d→aの動作
を繰り返せば、特定の箇所が面焼けを防ぐことができ
る。
FIG. 5 shows an enlarged view of a part of the display screen.
As shown in the figure, the letter A is moved as a → b → c → d according to the embodiment. It is desirable that this moving speed be a level that humans cannot understand. For example, 1 character is 60 dots ×
The operation of the embodiment of FIG. 4 in the case of moving right → down → left → up as shown in FIG. 5 in the case of 60 dots will be described. The timer emits a pulse signal, for example, every 10 minutes, and the signal delay circuit 51 increases the delay width of the video signal by one dot each time the pulse signal is received. When this is repeated 30 times, the screen slowly moves to the right by 30 dots in 300 minutes, that is, half a character (a → b).
Next, the signal delay circuit 51 increases the delay width of the video signal by one scanning line each time it receives the pulse signal. This is 30
When repeated, the screen moves downward by 30 scanning lines (b
→ c). Contrary to (a → b), if the delay width is reduced each time a pulse signal is received, the pulse signal moves to the left (c → d). (B → c)
On the contrary, each time a pulse signal is received, if the delay width is reduced, it moves upward (d → a). By repeating the operation of a->b->c->d-> a, it is possible to prevent surface burning at a specific location.

【0012】図6は、同期信号ディレイ回路の実施例を
示す。図中、53−iはフリップフロップ、54はセレ
クタ、55はカウンタ、6はタイマーを示す。フリップ
フロップ53−0のD端子には同期信号が入力され、ク
ロック端子には、左右方向の移動の場合にはドットクロ
ック、上下方向の移動の場合には水平周波数クロックが
入力される。従って、フリップフロップ53−i(i=
0〜7)のQ出力からはiドット分又はi本の水平走査
線分だけ同期信号が遅延されて出力される。タイマー6
からは周期的にパルス信号が出力される。カウンタ55
はタイマー6からのパルス信号毎にカウントを0から7
までアップ動作し、カウントが7まで達すると7から0
までダウン動作する。該カウントはセレクタ54へ入力
されて、セレクタ54は、カウント値に従ってフリップ
フロップ53−0ないし53−7の一つの出力を選択し
て出力する。従って、該信号ディレイ回路は同期信号を
遅延させて出力するとともに、その遅延幅をタイマー6
からのパルス信号毎に1ドット分又は水平走査線分変化
させる。
FIG. 6 shows an embodiment of the synchronizing signal delay circuit. In the figure, 53-i is a flip-flop, 54 is a selector, 55 is a counter, and 6 is a timer. A synchronization signal is input to the D terminal of the flip-flop 53-0, and a dot clock is input to the clock terminal for horizontal movement and a horizontal frequency clock is input for vertical movement. Therefore, the flip-flop 53-i (i =
From the Q output of 0 to 7), the synchronization signal is delayed by i dots or i horizontal scanning lines and is output. Timer 6
The pulse signal is periodically output from. Counter 55
Counts 0 to 7 for each pulse signal from timer 6.
Up until the count reaches 7, then 0 from 7
Works down to. The count is input to the selector 54, and the selector 54 selects and outputs one output of the flip-flops 53-0 to 53-7 according to the count value. Therefore, the signal delay circuit delays and outputs the synchronization signal, and the delay width is set by the timer 6
1 dot or horizontal scanning line is changed for each pulse signal from.

【0013】[0013]

【発明の効果】本発明によれば、上記の如く、長時間C
RT装置を使用する際においても、螢光面焼けを防ぐこ
とができ、CRTの寿命を長くすることができる。
According to the present invention, as described above, C
Even when the RT device is used, it is possible to prevent the fluorescent surface from being burnt and to prolong the life of the CRT.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の原理構成図である。FIG. 1 is a principle configuration diagram of the present invention.

【図2】映像信号と同期信号の関係を示す。FIG. 2 shows a relationship between a video signal and a sync signal.

【図3】本発明の実施例(1)を示す。FIG. 3 shows an embodiment (1) of the present invention.

【図4】本発明の実施例(2)を示す。FIG. 4 shows an embodiment (2) of the present invention.

【図5】表示画面の一部の拡大図を示す。FIG. 5 shows an enlarged view of a part of the display screen.

【図6】同期信号ディレイ回路の実施例を示す。FIG. 6 shows an embodiment of a synchronization signal delay circuit.

【図7】従来の構成を示す。FIG. 7 shows a conventional configuration.

【符号の説明】[Explanation of symbols]

1 CRT 2 CRTドライブ回路 3 映像信号送出回路 4 同期信号送出回路 5 同期信号タイミング変更回路 6 タイマー 51 信号ディレイ回路 52 信号ディレイ回路 1 CRT 2 CRT drive circuit 3 video signal sending circuit 4 sync signal sending circuit 5 sync signal timing changing circuit 6 timer 51 signal delay circuit 52 signal delay circuit

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 CRT(1)に表示を行わせる表示装置
において、 映像信号送出回路(3)と、同期信号送出回路(4)
と、上記同期信号送出回路(4)が送出する同期信号の
タイミングを制御する同期信号タイミング変更回路
(5)と、上記同期信号のタイミングを変更すべく周期
的にパルス信号を出すタイマー(6)とを設けて、 上記同期信号タイミング変更回路(5)が、同期信号の
タイミングを周期的に変更することにより表示画面を時
間の経過に連れて上下方向又は左右方向へ移動するよう
にしたことを特徴とする表示装置。
1. A display device for displaying on a CRT (1), comprising a video signal sending circuit (3) and a synchronizing signal sending circuit (4).
A sync signal timing changing circuit (5) for controlling the timing of the sync signal sent by the sync signal sending circuit (4); and a timer (6) for periodically outputting a pulse signal to change the timing of the sync signal. And that the synchronizing signal timing changing circuit (5) moves the display screen vertically or horizontally with the passage of time by periodically changing the timing of the synchronizing signal. Characteristic display device.
【請求項2】 CRT(1)に表示を行わせる表示装置
において、 映像信号送出回路(3)と、同期信号送出回路(4)
と、映像信号送出回路(3)が送出する映像信号を遅延
させる信号ディレイ回路(52)と、上記映像信号のタ
イミングを変更すべく周期的にパルス信号を出すタイマ
ー(6)とを設けて、 上記信号ディレイ回路(52)が、映像信号の遅延時間
幅を周期的に変更することにより表示画面を時間の経過
に連れて上下方向又は左右方向へ移動するようにしたこ
とを特徴とする表示装置。
2. A display device for displaying on a CRT (1), comprising a video signal sending circuit (3) and a synchronizing signal sending circuit (4).
A signal delay circuit (52) for delaying the video signal sent by the video signal sending circuit (3), and a timer (6) for periodically outputting a pulse signal to change the timing of the video signal. A display device characterized in that the signal delay circuit (52) moves the display screen vertically or horizontally as time elapses by periodically changing the delay time width of the video signal. ..
【請求項3】 CRT(1)に表示を行わせる表示装置
において、 映像信号送出回路(3)と、同期信号送出回路(4)
と、上記同期信号送出回路(4)が送出する同期信号を
遅延させる信号ディレイ回路(51)と、上記信号ディ
レイ回路(51)に周期的にパルス信号を出すタイマー
(6)とを設けて、 上記信号ディレイ回路(51)が、同期信号の遅延時間
幅を周期的に変更することにより表示画面を時間の経過
に連れて上下方向又は左右方向へ移動するようにしたこ
とを特徴とする表示装置。
3. A display device for displaying on a CRT (1), comprising: a video signal sending circuit (3) and a sync signal sending circuit (4).
A signal delay circuit (51) for delaying the sync signal sent by the sync signal sending circuit (4), and a timer (6) for periodically issuing a pulse signal to the signal delay circuit (51). A display device characterized in that the signal delay circuit (51) moves the display screen vertically or horizontally as time elapses by periodically changing the delay time width of the synchronization signal. ..
JP3299473A 1991-11-15 1991-11-15 Display device Pending JPH05134618A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3299473A JPH05134618A (en) 1991-11-15 1991-11-15 Display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3299473A JPH05134618A (en) 1991-11-15 1991-11-15 Display device

Publications (1)

Publication Number Publication Date
JPH05134618A true JPH05134618A (en) 1993-05-28

Family

ID=17873033

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3299473A Pending JPH05134618A (en) 1991-11-15 1991-11-15 Display device

Country Status (1)

Country Link
JP (1) JPH05134618A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2305834A (en) * 1995-09-28 1997-04-16 Daewoo Electronics Co Ltd Preventing screen-burn by periodically delaying sync signal
JP2004333751A (en) * 2003-05-06 2004-11-25 Nanao Corp Burning reducer and image display device provided with burning reducer
JP2005025161A (en) * 2003-06-13 2005-01-27 Sony Corp Device and method for image display control
JP2005148558A (en) * 2003-11-18 2005-06-09 Sony Corp Display device and driving method therefor
KR100700955B1 (en) * 2004-03-09 2007-03-28 파이오니아 가부시키가이샤 Display screen burn prevention method

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2305834A (en) * 1995-09-28 1997-04-16 Daewoo Electronics Co Ltd Preventing screen-burn by periodically delaying sync signal
GB2305834B (en) * 1995-09-28 1999-12-01 Daewoo Electronics Co Ltd Synchronization signal processing circuit for a monitor
JP2004333751A (en) * 2003-05-06 2004-11-25 Nanao Corp Burning reducer and image display device provided with burning reducer
JP2005025161A (en) * 2003-06-13 2005-01-27 Sony Corp Device and method for image display control
EP1486939A3 (en) * 2003-06-13 2009-05-27 Sony Corporation Image display control apparatus and image display control method
US7719530B2 (en) 2003-06-13 2010-05-18 Sony Corporation Image display control apparatus and image display control method
KR101032237B1 (en) * 2003-06-13 2011-05-02 소니 주식회사 Image display control apparatus and image display control method
JP2005148558A (en) * 2003-11-18 2005-06-09 Sony Corp Display device and driving method therefor
KR100700955B1 (en) * 2004-03-09 2007-03-28 파이오니아 가부시키가이샤 Display screen burn prevention method

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