JPH05129621A - Production of n0nvolatile memory device - Google Patents

Abstract

PURPOSE:To prevent the deterioration of a data maintaining characteristic and keep the threshold of a memory transistor at a high level by forming a floating gate electrode layer, polishing the surface and laminating a control gate electrode layer on the floating gate electrode layer through an insulating film. CONSTITUTION:The surface of a silicon substrate 1 is oxidized to form a first gate insulating film 2, a first layer polysilicon layer 3 which does not contain impurities is formed as a floating gate electrode layer, and phosphorus is diffused so as to provide conductivity. Then, the surface of the polysilicon layer 3 is polished so as to remove projection to be flat and a second layer polysilicon layer 5 for a control gate electrode layer is grown through a second gate insulating film 4. Since the oxide film of the second gate insulating film 4 formed on the flat surface does not have a thin part, the pressure resistance of the both electrode layers 3 and 5 is improved, and as electric field does not locally concentrate, data maintaining characteristic is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a nonvolatile memory device such as an EEPROM in which a control gate electrode layer is laminated on a floating gate electrode layer with an insulating film interposed therebetween.

[0002]

2. Description of the Related Art A non-volatile memory device such as an EEPROM for storing data by accumulating charges in a so-called floating gate electrode is known. This type of non-volatile memory device has a P-type silicon substrate 21 as shown in FIG.
Provided with an n ⁺ -type diffusion layer 22, a floating gate electrode (FG) 23 is formed via a gate oxide film (not shown) on the silicon substrate, a control gate electrode via an oxide film thereon ( In the writing, a voltage is applied to the control gate electrode 24 to inject charges from the channel forming region into the floating gate electrode 23.

The floating gate electrode (FG) 2
3 is surrounded by an insulator and is not externally connected. The method for manufacturing the nonvolatile memory device is performed as follows. First, a first gate insulating film is formed on a p-type silicon substrate serving as a semiconductor region, and a first gate insulating film serving as a floating gate electrode layer is formed on the first gate insulating film.
The polysilicon layer of the first layer is grown by the CVD method or the like.

Next, in order to make the polysilicon layer as the floating gate electrode layer conductive, POCl ₃
P (phosphorus) in the polysilicon layer by a diffusion method using
To spread. At this time, since a PSG (phosphorus glass) film or the like is formed on the polysilicon layer, the PSG film or the like is removed by etching. Thereafter, a second gate insulating film is formed on the first polysilicon layer in an oxidizing atmosphere, and a control gate electrode layer is laminated on the second gate insulating film.

[0005]

By the way, when the floating gate electrode layer is formed in the above process, the surface thereof is not flat, and as shown in FIG. ing. And
Where the projections 25 are present, the electric field is concentrated.

Therefore, the floating gate electrode 2
The second gate insulating film between the third gate insulating film 3 and the control gate electrode 24 has a portion thinned by the protrusion 25. However, when an LSI is manufactured in this state and a voltage is applied, an electric field is generated at the protrusion 25. Concentrates. And
Due to the electric field concentration, the electrons in the floating gate electrode are extracted by the electric field applied to the control gate electrode, and the retention characteristic of the signal data is generated, so that the threshold value of the memory transistor cannot be maintained at a high level. Occurs.

Therefore, an object of the present invention is to provide a method for manufacturing a non-volatile semiconductor memory which prevents deterioration of data retention characteristics and maintains the threshold value of a memory transistor at a high level.

[0008]

In order to solve the above conventional problems, the present invention provides a floating gate electrode layer laminated on a substrate with a gate insulating film interposed therebetween, and an insulating film on the floating gate electrode layer. In a method for manufacturing a non-volatile memory device having a control gate electrode formed via, after forming a floating gate electrode layer,
The surface of the floating gate electrode layer is polished, and then the control gate electrode layer is laminated on the polished floating gate electrode layer via an insulating film.

The polishing treatment may be performed by growing polysilicon for the floating gate electrode and then polishing the surface with a polishing liquid containing a required polishing agent.

[0010]

In the present invention, after forming the first polysilicon layer as the floating gate electrode layer, the surface of the first polysilicon layer is treated with, for example, a polishing liquid containing an abrasive. By polishing, the control gate electrode layer can be laminated via the insulating film in a state where the protrusions growing on the first polysilicon layer are eliminated.

Therefore, the second gate insulating film formed on the first polysilicon layer is not locally thinned, and even if the LSI is manufactured and a voltage is applied, the second gate insulating film in the floating gate electrode is not formed. The electrons are extracted by the electric field applied to the control gate voltage, and the deterioration of the data retention characteristic is prevented.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A non-volatile memory device according to a preferred embodiment of the present invention will be described below with reference to FIGS.

First, as shown in FIG. 1, a silicon substrate 1
The surface of is oxidized to form a first gate insulating film 2, and then a pure polysilicon layer 3 containing no impurities as a first layer is formed as a floating gate electrode layer. When the first polysilicon layer 3 is formed, the protrusion 6 has already been generated as shown in FIG. After that, P (phosphorus) is diffused into the polysilicon layer 3 in order to make the floating gate electrode layer conductive.

Then, for example, a PSG (phosphorus glass) film 7 or the like is formed by this diffusion, but the protrusion 6 is not eliminated as shown in FIG. 2, and rather, the PSG film 7 or the like is more naturally formed. As it grows, the height of the protrusion 6 is 500
Has reached ~ 1000Å.

Therefore, the protrusion 6 is removed. To remove the protrusions 6, first, the PSG (phosphorus glass) film 7 and the like formed during the diffusion of P (phosphorus) are removed by etching. Then, before patterning the first polysilicon layer 3, the grown protrusions 6 are polished using the following apparatus.

As shown in FIG. 4, the apparatus used for polishing the protrusions 6 comprises an upper plate 10 and a lower plate 9,
The upper plate 10 is a ceramic plate. On the other hand, lower board 9
Is provided with a polishing cloth 8 on the surface thereof. In addition,
The polishing cloth 8 of the lower plate 9 is a soft polishing cloth (soft cloth).
Is used. The top plate 10 which is this ceramic plate
Then, the silicon substrate 1 having the protrusions 6 grown on the first polysilicon layer 3 is placed facing downward. And
At least the lower plate 9 on which the polishing cloth 8 is arranged is rotated.

In an experiment conducted by the present inventor, the peripheral speed was 50 m / sec, and the pressurization was 140 g / cm ^2.
Set to each. Then, the polishing liquid is poured onto the polishing cloth 8 of the lower plate 9. The polishing liquid added with a polishing agent (colloidal silica dispersed in a strong alkaline liquid) was flowed here at a rate of 5 cc / min.

Under these conditions, the lower platen 9 is rotated to polish the protrusions 6 on the first polysilicon layer 3 serving as the floating gate electrode layer. Then, as shown in FIG. 6, the surface is polished and the projections are removed, and the flattened first polysilicon layer 3 is formed. in this way,
Polishing is performed by combining chemical polishing using an abrasive and mechanical polishing using a polishing cloth. However, when the polishing is performed under the above conditions, in the experimental example conducted by the present inventor, the polysilicon of the first layer is highly accurately It was confirmed that the surface of layer 3 could be polished.

After that, the second-layer polysilicon 5 for the control gate electrode layer is grown through the second gate insulating film 4. Then, as shown in FIG. 3, since the surface of the floating gate electrode layer 3 is already formed flat, there is no portion where the oxide film of the second gate insulating film 4 is thin. Therefore, the breakdown voltage between the floating gate electrode layer 3 and the control gate electrode layer 5 can be improved.

After that, even if an LSI is manufactured and a voltage is applied, the electric field is not locally concentrated between the floating gate electrode layer 3 and the control gate electrode layer 5 as in the conventional case. Therefore, the data retention characteristic is improved. Although the nonvolatile semiconductor memory such as the EEPROM is used in this embodiment, it may be used for a CCD or the like.

[0021]

As described above, according to the present invention, the surface projection of the floating gate electrode layer can be eliminated by polishing the surface. Therefore, the oxide film of the second gate insulating film is not partially thinned, and as a result, even when a voltage for operation is applied to the nonvolatile memory device, the electric field from the floating gate electrode causes the non-volatile memory device to operate. Electrons are not extracted and the data retention characteristics are not deteriorated.

That is, when the device is stored for a long time after the initial writing, the number of electrons emitted from the floating gate electrode by thermal energy can be reduced,
The data retention characteristics are improved. Therefore, the threshold value of the memory transistor can be maintained at a higher level.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing an embodiment of the present invention in the order of steps, showing a state in which a first polysilicon layer is grown.

FIG. 2 is a schematic cross-sectional view showing an embodiment of the present invention in the order of steps, showing a state in which a PSG film or the like is formed when phosphorus is added to the first polysilicon layer.

FIG. 3 is a schematic cross-sectional view showing one embodiment of the present invention in the order of steps, showing a state in which a control gate electrode layer is further laminated via an insulator after removing the protrusions.

FIG. 4 is a cross-sectional view showing an apparatus used in an embodiment of the present invention.

FIG. 5 is a schematic cross-sectional view showing one embodiment of the present invention in the order of steps, showing a state before removing the protrusions.

FIG. 6 is a schematic cross-sectional view showing one embodiment of the present invention in the order of steps, showing a state after the protrusions are removed.

FIG. 7 is a cross-sectional view showing a state in which an electric field is concentrated at a place where a protrusion is present in a conventional nonvolatile memory device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Silicon substrate 2 ... 1st gate insulating film 3 ... Floating gate electrode layer 4 ... 2nd gate insulating film 5 ... Floating gate electrode layer 6 ... Protrusion

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Soji Shimano 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation

Claims (1)

[Claims] 1. A method of manufacturing a non-volatile memory device having a floating gate electrode layer laminated on a substrate via a gate insulating film, and a control gate electrode formed on the floating gate electrode layer via an insulating film. In the above, after forming the floating gate electrode layer, polishing the surface of the floating gate electrode layer, and then laminating a control gate electrode layer on the polished floating gate electrode layer through an insulating film. And a method for manufacturing a non-volatile memory device.