JPH05129483A - Hybrid ic - Google Patents
Hybrid icInfo
- Publication number
- JPH05129483A JPH05129483A JP3289800A JP28980091A JPH05129483A JP H05129483 A JPH05129483 A JP H05129483A JP 3289800 A JP3289800 A JP 3289800A JP 28980091 A JP28980091 A JP 28980091A JP H05129483 A JPH05129483 A JP H05129483A
- Authority
- JP
- Japan
- Prior art keywords
- package
- heat
- hybrid
- trunks
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Abstract
Description
【0001】[0001]
【産業上の利用分野】この発明はハイブリッドIC本体
がパッケージ内に収容されたハイブリッドICに関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid IC having a hybrid IC body housed in a package.
【0002】[0002]
【従来の技術】従来のハイブリッドICの構造を図2に
示す。ハイブリッドIC本体11は例えばセラミック基
板12の上に複数のチップ部品13が搭載されたもので
あり、このハイブリッドIC本体11が、一面が開口と
された略直方体状のパッケージ14内に収容される。そ
の際、パッケージ14の底板14aには複数の端子15
が挿通され、配列して植立され、そのパッケージ底板1
4aと対接してハイブリッドIC本体11の基板12が
配置され、基板12に形成されている端子用孔12aに
各端子15が挿通され、それら端子15と基板12上に
形成されているパッド(図示せず)とがそれぞれ接続さ
れる。ハイブリッドIC本体11を収容したパッケージ
14はパッケージ上蓋16によって蓋される。2. Description of the Related Art The structure of a conventional hybrid IC is shown in FIG. The hybrid IC body 11 has a plurality of chip components 13 mounted on, for example, a ceramic substrate 12, and the hybrid IC body 11 is housed in a substantially rectangular parallelepiped package 14 having an opening on one surface. At this time, a plurality of terminals 15 are provided on the bottom plate 14a of the package 14.
The bottom plate of the package 1
4a, the substrate 12 of the hybrid IC body 11 is arranged, the terminals 15 are inserted into the terminal holes 12a formed in the substrate 12, and the terminals 15 and pads formed on the substrate 12 (see FIG. (Not shown) are respectively connected. The package 14 accommodating the hybrid IC body 11 is covered by a package upper lid 16.
【0003】[0003]
【発明が解決しようとする課題】上述した構造の従来の
ハイブリッドICが駆動され、例えばチップ部品13が
発熱すると、その熱の大部分は基板12を介してパッケ
ージ底板14aに伝達され、外部へ放熱される。このよ
うな放熱経路を有するハイブリッドICにおいて、チッ
プ部品13として例えばパワーMOSFETやパワート
ランジスタなどの発熱素子を搭載する場合、さらにはそ
のような発熱素子の高密度実装を図る場合には、放熱効
率が問題となる。即ち、発熱素子の動作時の温度が許容
温度以上にならず、所期の性能が得られるように、発熱
素子の温度上昇を抑制すべく放熱効率を向上させる必要
がある。When the conventional hybrid IC having the above-described structure is driven and, for example, the chip component 13 generates heat, most of the heat is transferred to the package bottom plate 14a via the substrate 12 and is radiated to the outside. To be done. In a hybrid IC having such a heat dissipation path, heat dissipation efficiency is improved when a heat generating element such as a power MOSFET or a power transistor is mounted as the chip component 13 and when high density mounting of such heat generating element is attempted. It becomes a problem. That is, it is necessary to improve the heat dissipation efficiency in order to suppress the temperature rise of the heating element so that the operating temperature of the heating element does not exceed the allowable temperature and the desired performance is obtained.
【0004】この発明の目的は、このような要求を鑑
み、優れた放熱効率を有するハイブリッドICを提供す
ることにある。An object of the present invention is to provide a hybrid IC having excellent heat dissipation efficiency in view of such requirements.
【0005】[0005]
【課題を解決するための手段】この発明はハイブリッド
IC本体がパッケージ内に収容されたハイブリッドIC
において、パッケージ内面に熱伝導性のよい材料からな
る放熱用中継部を取付け、その放熱用中継部とハイブリ
ッドIC本体の発熱素子とに熱伝導性のよい金属線の両
端をボンディングしたものである。SUMMARY OF THE INVENTION The present invention is a hybrid IC in which a hybrid IC body is housed in a package.
In this case, a heat dissipation relay portion made of a material having good heat conductivity is attached to the inner surface of the package, and both ends of a metal wire having good heat conductivity are bonded to the heat dissipation relay portion and the heat generating element of the hybrid IC body.
【0006】[0006]
【作 用】上記のように構成されたこの発明では、発熱
素子→基板→パッケージという従来の伝熱経路に加え
て、新たに発熱素子→金属線→放熱用中継部→パッケー
ジという伝熱経路が形成され、かつこれら金属線及び放
熱用中継部は熱伝導性のよい材料で形成されているた
め、効率よく発熱素子の発熱がパッケージに伝達され、
パッケージから放熱される。[Operation] In the present invention configured as described above, in addition to the conventional heat transfer path of heating element → substrate → package, there is newly provided heat transfer path of heating element → metal wire → relay relay → package. Since the metal wire and the heat dissipation relay are formed of a material having good thermal conductivity, the heat generated by the heat generating element is efficiently transmitted to the package.
Heat is dissipated from the package.
【0007】[0007]
【実施例】次にこの発明の一実施例を図面を参照して説
明する。図1Aはこの発明によるハイブリッドICの断
面図であり、図1Bはパッケージ上蓋16を外して示し
たその略平面図である。ハイブリッドIC本体21は、
この発明の実施に好適な構成のものを例示している。即
ち、矩形のセラミック基板22上には、その一短辺に沿
って発熱素子23が3個搭載され、一方他短辺に沿って
発熱素子24が4個搭載され、さらに基板22の中央部
に発熱素子25が1個搭載されている。なお、発熱素子
23はパワーMOSFETであり、発熱素子24,25
はダイオードである。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will now be described with reference to the drawings. FIG. 1A is a cross-sectional view of a hybrid IC according to the present invention, and FIG. 1B is a schematic plan view showing the package upper cover 16 removed. The hybrid IC body 21 is
A configuration suitable for carrying out the present invention is illustrated. That is, on the rectangular ceramic substrate 22, three heating elements 23 are mounted along one short side thereof, while four heating elements 24 are mounted along the other short side thereof, and further in the central portion of the substrate 22. One heating element 25 is mounted. The heating element 23 is a power MOSFET, and the heating elements 24 and 25 are
Is a diode.
【0008】このハイブリッドIC本体21を収容する
パッケージ26の内面に放熱用中継部が取付けられる。
矩形板状の放熱用中継部27は、その板面がパッケージ
底板26aと平行されて、パッケージ26の、ハイブリ
ッドIC本体21の両短辺と対向する両側板26b,2
6cにそれぞれひれ状に取付けられており、これら放熱
用中継部27の突出端はそれぞれハイブリッドIC本体
21の発熱素子23,24の近傍に位置される。A heat radiating relay portion is attached to the inner surface of the package 26 that houses the hybrid IC body 21.
The rectangular plate-shaped heat dissipation relay portion 27 has its plate surface parallel to the package bottom plate 26a, and both side plates 26b, 2 of the package 26 facing both short sides of the hybrid IC body 21.
Each of them is attached to each of the 6c in a fin shape, and the protruding ends of these heat radiation relay portions 27 are located near the heat generating elements 23 and 24 of the hybrid IC main body 21, respectively.
【0009】発熱素子25の近傍において、基板22に
貫通孔28が形成され、その貫通孔28を挿通して基板
22上に突出するように、柱状の放熱用中継部29がパ
ッケージ底板26aに垂直に取付けられる。これら放熱
用中継部27,29は例えばアルミニウムなどの熱伝導
性のよい材料により形成され、熱伝導性が良いようにパ
ッケージ26の内面に取付けられている。A through hole 28 is formed in the substrate 22 in the vicinity of the heat generating element 25, and a columnar heat radiating relay portion 29 is perpendicular to the package bottom plate 26a so as to be inserted into the through hole 28 and project onto the substrate 22. Mounted on. These heat radiating relay portions 27 and 29 are made of a material having a good thermal conductivity such as aluminum, and are attached to the inner surface of the package 26 so as to have a good thermal conductivity.
【0010】発熱素子23,24,25の上面には絶縁
層を介してパッド23a,24a,25aがそれぞれ形
成されており、これらパッド23a,24a,25aに
それぞれ金属線31の一端がボンディングされ、それら
の他端がその近傍に位置する放熱用中継部27あるいは
29の上面にそれぞれボンディングされる。つまり、な
るべく短い金属線31により、各発熱素子23,24,
25とそれぞれその近傍に位置する放熱用中継部27あ
るいは29とが電気的に絶縁された状態で各別に接続さ
れる。金属線31は熱伝導性のよい材料よりなり、例え
ば外径300μm のアルミニウム線などが用いられる。Pads 23a, 24a, 25a are formed on the upper surfaces of the heating elements 23, 24, 25 via an insulating layer, and one end of a metal wire 31 is bonded to each of the pads 23a, 24a, 25a. The other ends thereof are respectively bonded to the upper surfaces of the heat dissipation relay portions 27 or 29 located in the vicinity thereof. That is, each heating element 23, 24,
25 and the heat radiating relay portions 27 or 29 located in the vicinity thereof are individually connected in an electrically insulated state. The metal wire 31 is made of a material having good thermal conductivity, and for example, an aluminum wire having an outer diameter of 300 μm is used.
【0011】上述した構成により、各発熱素子23,2
4,25に対し、金属線31及び放熱用中継部27ある
いは29を介してパッケージ26に達する新たな伝熱経
路がそれぞれ形成される。放熱用中継部27,29とパ
ッケージ26とを例えばアルミニウムにより一体形成す
れば良好な熱伝導性を得ることができ、またそれらと金
属線31とを同一材料で形成することにより、良好なボ
ンディング強度を得ることができる。With the above-mentioned configuration, each heating element 23, 2
New heat transfer paths reaching the package 26 through the metal wire 31 and the heat radiation relay portion 27 or 29 are formed for the wirings 4 and 25, respectively. Good heat conductivity can be obtained by integrally forming the heat radiating relay portions 27 and 29 and the package 26 with, for example, aluminum, and good bonding strength can be obtained by forming them with the metal wire 31. Can be obtained.
【0012】さらに、図1A,Bに示すように、発熱素
子23,24,25の各パッド23a,24a,25a
の上面と放熱用中継部27,29の上面とをほぼ同一高
さとし、かつそれらをそれぞれ接続する金属線31の伸
長方向を同一方向に揃えることにより、金属線31のボ
ンディングを作業性よく行うことができる。なお、この
実施例において基板22上に搭載されている発熱素子2
3,即ちパワーMOSFETは、そのドレイン電極が基
板22上のパターンに対接して接続されており、ゲート
電極及びソース電極はそれぞれ金属線32及び33によ
り、基板22上のパターンに接続されている。また、発
熱素子24,25,即ちダイオードはP側電極及びN側
電極の両電極のうち、一方が基板22上のパターンに対
接して接続され、他方が金属線34により、基板22上
のパターンに接続されている。図1A,Bではこれら電
極及びパターンの図示は省略し、金属線32,33,3
4のみ図示している。Further, as shown in FIGS. 1A and 1B, the pads 23a, 24a, 25a of the heating elements 23, 24, 25 are formed.
The metal wires 31 to be bonded with good workability by making the upper surfaces of the metal wires 31 and the upper surfaces of the heat dissipation relay portions 27 and 29 substantially at the same height and aligning the extending directions of the metal wires 31 connecting them. You can In this embodiment, the heating element 2 mounted on the substrate 22
3, that is, in the power MOSFET, the drain electrode thereof is connected to the pattern on the substrate 22 so as to be in contact therewith, and the gate electrode and the source electrode are connected to the pattern on the substrate 22 by metal lines 32 and 33, respectively. In addition, the heating elements 24 and 25, that is, the diodes are connected to one of the P-side electrode and the N-side electrode so as to be in contact with the pattern on the substrate 22, and the other is connected to the pattern on the substrate 22 by the metal wire 34. It is connected to the. In FIGS. 1A and 1B, illustration of these electrodes and patterns is omitted, and the metal wires 32, 33, 3
Only 4 is shown.
【0013】[0013]
【発明の効果】以上説明したように、この発明によれば
パッケージ内面に放熱用中継部が取付けられ、その放熱
用中継部とハイブリッドIC本体の発熱素子とが金属線
により接続されて新たな放熱経路が形成されることによ
り、優れた放熱効率を有するハイブリッドICを得るこ
とができる。As described above, according to the present invention, the heat dissipation relay section is attached to the inner surface of the package, and the heat dissipation relay section and the heat generating element of the hybrid IC body are connected by the metal wire to newly dissipate heat. By forming the path, a hybrid IC having excellent heat dissipation efficiency can be obtained.
【図1】Aはこの発明によるハイブリッドICの一実施
例を示す断面図。Bはパッケージ上蓋を外して示したそ
の平面図。FIG. 1A is a sectional view showing an embodiment of a hybrid IC according to the present invention. B is the top view which removed and showed the package top cover.
【図2】従来のハイブリッドICを示す断面図。FIG. 2 is a sectional view showing a conventional hybrid IC.
21 ハイブリッドIC本体 23,24,25 発熱素子 26 パッケージ 27,29 放熱用中継部 31 金属線 21 Hybrid IC Main Body 23, 24, 25 Heating Element 26 Package 27, 29 Heat Dissipation Relay Section 31 Metal Wire
Claims (1)
収容されたハイブリッドICにおいて、 上記パッケージ内面に取付けられ、熱伝導性のよい材料
からなる放熱用中継部と、 その放熱用中継部と上記ハイブリッドIC本体の発熱素
子とに両端がボンディングされた熱伝導性のよい金属線
と、 を具備することを特徴とするハイブリッドIC。1. A hybrid IC in which a hybrid IC main body is housed in a package, a heat radiation relay portion which is attached to the inner surface of the package and is made of a material having good thermal conductivity, the heat radiation relay portion, and the hybrid IC body. And a metal wire having good thermal conductivity, both ends of which are bonded to the heat generating element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3289800A JPH05129483A (en) | 1991-11-06 | 1991-11-06 | Hybrid ic |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3289800A JPH05129483A (en) | 1991-11-06 | 1991-11-06 | Hybrid ic |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05129483A true JPH05129483A (en) | 1993-05-25 |
Family
ID=17747930
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3289800A Withdrawn JPH05129483A (en) | 1991-11-06 | 1991-11-06 | Hybrid ic |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05129483A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002044961A (en) * | 2000-07-19 | 2002-02-08 | Kyocera Corp | Inverter-control module |
JP2002044962A (en) * | 2000-07-26 | 2002-02-08 | Kyocera Corp | Inverter-control module |
-
1991
- 1991-11-06 JP JP3289800A patent/JPH05129483A/en not_active Withdrawn
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002044961A (en) * | 2000-07-19 | 2002-02-08 | Kyocera Corp | Inverter-control module |
JP2002044962A (en) * | 2000-07-26 | 2002-02-08 | Kyocera Corp | Inverter-control module |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A300 | Application deemed to be withdrawn because no request for examination was validly filed |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19990204 |