JPH05128192A - Power consumption calculation method - Google Patents

Abstract

PURPOSE:To calculate power consumption corresponding to the actual operation of an integrated circuit and to confirm the distribution of power consumption by defining the power consumption corresponding to the combination of input signals for each cell, reading in the signal change information of a logic simulation result and calculating the power consumption corresponding to the signal change information. CONSTITUTION:Logic simulation 5 is executed based on a circuit connection information 1, a test pattern 2 and a cell library 3 to obtain a logic simulation result (the signal change information for each cell) 6. The power consumption corresponding to the signal change information (the combination of input signals for each cell) 6 is retrieved from power consumption information 4 and the power consumption corresponding to the signal change information is calculated (7). When the calculation of the power consumption for the entire cells, color division display 8 of the calculated power consumption is made on a display and the file output of the power consumption is obtained. Thus, the power consumption corresponding to the actual operation of the integrated circuit can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power consumption calculation method for calculating dynamic power consumption of a plurality of cells when CAD designing an integrated circuit.

[0002]

2. Description of the Related Art FIG. 1 is a diagram for explaining a conventional method of calculating power consumption of a cell in an integrated circuit device, in which 11 is a power supply wiring. Three cells 12a, 12b, 12c are connected to the power supply wiring 11. Each cell 12a, 12b, 12c
Static (fixed) power consumption W _AS , W _BS , W respectively
_CS is defined. Total power consumption W of this power supply wiring 11
Is calculated by the following equation (1) as the sum of power consumption of each cell. W = W _AS + W _BS + W _CS (1)

[0003]

Since the conventional power consumption calculation is performed by the above method, the static power consumption, that is, the power consumption in one operating state of each cell,
And only the sum of them can be expressed. Therefore, the power consumption in actual use, for example, the power consumption per unit time is small, but the power consumption time is long and the total power consumption is large, and vice versa. There was a problem that it could not be calculated.

The present invention has been made in order to solve such a problem, and an object thereof is to provide a power consumption calculation method capable of calculating the power consumption according to the actual operation of an integrated circuit.

[0005]

A power consumption calculation method according to the present invention defines power consumption corresponding to a combination of input signals for each cell, reads signal change information of a logic simulation result, and converts the signal change information into signal change information. The feature is that the corresponding power consumption is calculated.

[0006]

In the power consumption calculation method of the present invention, the power consumption is calculated in this manner in correspondence with various signal change patterns in each cell, so that the power consumption is calculated according to the actual use of the integrated circuit. ..

[0007]

EXAMPLES Examples of the present invention will be specifically described below.

FIG. 2 is a flow chart showing the flow of processing in one embodiment of the present invention. In the figure, 1 is circuit connection information input under logic, 2 is a test pattern for operating a logic simulation, and 3 is a cell library having various information of each cell. The cell library 3 includes power consumption information 4 defined for each combination of input signals of each cell. Based on the circuit connection information 1, the test pattern 2, and the cell library 3, a logic simulation is executed (5 in the figure) to obtain a logic simulation result (signal change information of each cell) 6. Next, the power consumption corresponding to the signal change information 6 of each cell (combination of input signals of each cell) is searched from the power consumption information 4, and the power consumption suitable for the signal change information is calculated (7 in the figure). . When the calculation of the power consumption is completed for all the cells, the calculated power consumption is color-coded on the display 8 and the file output 9 of the power consumption is obtained.

Specific examples of the present invention will be described below.
FIG. 3 shows each cell (three cells A, B, C in this embodiment).
7 shows an example of the power consumption information 4 in FIG. The cell A has two input pins, and as shown in FIG. 3, four kinds of power consumption W _A0 , W _A1 , W _A2 , W _A3 per unit time by turning on and off a signal to each input pin. Is defined. Further, the cell B has three input pins, and as shown in FIG. 3, eight kinds of power consumption W _B0 , W _B1 , W _B2 , W per unit time are generated by turning on / off the signal to each input pin. _B3 , W _B4 , W _B5 ,
W _B6 and W _B7 are defined. Further, the cell C has two input pins, and as shown in FIG. 3, four types of power consumption W _C0 , W _C1 , W _C2 , W per unit time are generated by turning on and off the signal to each input pin. _C3 is defined.

FIG. 4 shows an example of the signal change information 6 output by the execution of the logic simulation. Three of each cell A, B, signals on to each input pin and C, off, depending on the time interval t ₁ ~t ₁₂ of 12 stages is controlled as shown in FIG.

In the step of calculating the power consumption (7 in FIG. 2), the combinations corresponding to the combinations of the input signals of the respective cells at the respective time intervals of the signal change information 6 as shown in FIG. 4 are as shown in FIG. The combination of input signals of the power consumption information 4 is searched, and the power consumption per unit time in the combination of the signals is extracted. For example, in the case of the cell A, each time interval t _n (n = n = _{n in} FIG.
1 to 12), the combination matching the signal change combination of the input pin 1 and the input pin 2 is searched from FIG. 3, and the power consumption per unit time corresponding to the combination is _calculated as W _A0
The operation of extracting from W _{A3 is} repeated from t ₁ to t ₁₂ . Specifically, since both the input pin 1 and the input pin 2 are 0 in the time interval t ₁ , the power consumption W _A0 per unit time is extracted, and the input pin 1 is 1 and the input pin 2 is in the time interval t _3. Is 0, power consumption W _A2 per unit time
To extract. FIG. 5 shows a list of power consumption per unit time corresponding to the time intervals t ₁ to t ₁₂ extracted for each cell in this way.

The total power consumption of each cell is obtained by summing the products of the time interval t _n and the power consumption per unit time.
Specifically, the total power consumption W _A of the cell _A is (2) below.
Calculated by formula. W _A = W _A0 × t ₁ + W _A0 × t ₂ + W _A2 × t ₃ + W _A2 × t ₄ + WA ₂ × t ₅ + W _A3 × t ₆ + W _A3 × t ₇ + W _A3 × t ₈ + W _A1 × t ₉ + W _A0 × t ₁₀ + _{WA 0} × t ₁₁ + _{WA 0} × t ₁₂ (2) Similarly, the total power consumption W _{B of} the cell _B and the total power consumption W _C of the cell C are expressed by the following equations (3) and (4), respectively. ) Is calculated by the formula. _{W B = W B0 × t 1} + W B4 × t 2 + W B6 × t 3 + W B7 × t 4 + W B3 × t 5 + W B1 × t 6 + W B1 × t 7 + W B5 × t 8 + W B5 × t 9 + W B5 _{× t 10 + W B7 × t} 11 + W B3 × t 12 ... (3) W C = W C2 × t 1 + W C3 × t 2 + W C3 × t 3 + W C2 × t 4 + W C0 × t 5 + W C0 × t 6 + W _C1 × t ₇ + W _C3 × t ₈ + W _C3 × t ₉ + W _C2 × t ₁₀ + W _C3 × t ₁₁ + W _C1 × t ₁₂ (4)

When the calculation of the power consumption of all the cells is completed, the calculation result is output as a file and the cells are displayed in different colors on the layout pattern according to the power consumption.
FIG. 6 shows an example of color-coded display of the power consumption distribution on the layout pattern in the display of the power consumption. In the figure, 8a is a layout pattern as a result of arranging the cells 8b. In this example, the mesh pattern has power consumption W ₁
The above cells, the shaded patterns indicate cells between the power consumptions W ₂ and W ₁ , and the white boxes indicate the cells whose power consumption is below W ₂ , and each of them is color-coded and displayed. As described above, displaying the power consumption in different colors on the layout pattern has an effect that the distribution of the power consumption can be recognized at a glance.

FIG. 7 is a flow chart showing the flow of processing of another embodiment of the present invention. In the above-described embodiment, the case where the file output of the total power consumption of each cell and the color-coded display on the layout pattern are performed has been described. However, as shown in FIG. You may enter it. In step 10 in FIG. 7, information about the power consumption of each cell as shown in FIG. 5 is output to the output file 9 for power consumption calculation, and the route of the power supply wiring is determined and connected with reference to this information. The width of the main line and the branch line of the power supply wiring is controlled by the total power consumption of the cells.

[0015]

As described above, according to the present invention, the power consumption of each cell is defined in a form corresponding to the combination of input signals, and the power consumption is calculated with reference to the result of the logic simulation. Power consumption can be calculated according to the actual operation of. Further, when the power consumption information is color-coded and displayed on the layout pattern data, the power consumption distribution can be confirmed at a glance.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a conventional power consumption calculation.

FIG. 2 is a flowchart showing a processing procedure of an embodiment of a power consumption calculation method of the present invention.

FIG. 3 is a diagram showing an example of power consumption information according to the present invention.

FIG. 4 is a diagram showing an example of signal change information according to the present invention.

FIG. 5 is a diagram showing an example of a power consumption calculation result in the present invention.

FIG. 6 is a diagram showing an example of a power consumption distribution display according to the present invention.

FIG. 7 is a flowchart showing a processing procedure of another embodiment of the power consumption calculation method of the present invention.

[Explanation of symbols]

 1 circuit connection information 2 test pattern 3 cell library 4 power consumption information 6 logic simulation result (signal change information) 8 power consumption (display) 8a layout pattern 8b cell 9 power consumption (file)

Claims (1)

[Claims] 1. A method of calculating power consumption of a plurality of cells of an integrated circuit to which a plurality of signals are respectively input, wherein power consumption information corresponding to a combination of the signals is prepared for each cell, The power consumption calculation method is characterized in that signal change information is obtained by performing a logical simulation for the combination of, and power consumption corresponding to the signal change information is calculated with reference to the power consumption information.