JPH05127608A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To automatically control the contrast and back light brightness so as to be in conformity with display contents. CONSTITUTION:This liquid crystal display device is provided with a means 105 which reads data out of a video memory 103 and decides its data structure and a contrast and back light adjusting means 106 controls the contrast or back light brightness of an LCD based on the decision result and non-input time after the data alteration of the video memory 103 to control the contrast value and back light brightness value according to the display contents, thereby obtaining a display screen where gradations or characters and an image are easily recognized at all times.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device having a contrast control function and a backlight control function.

[0002]

2. Description of the Related Art The operation of a conventional liquid crystal display device (hereinafter referred to as LCD) will be described with reference to the hardware block diagram shown in FIG. When the image data to be displayed is sent from the CPU 101, the timing or address of the data is adjusted in the LCD controller, and the VRAM 10
Written in 3. The LCD controller 102 is a VR
Gradation data in the AM 103 is sequentially read, converted into frame thinning data, and sent to the LCD module 104,
Display it.

The LCD screen adjustment includes contrast adjustment and backlight brightness adjustment, and the adjustment is performed according to the display content. For example, in the case of a screen in which there is not much difference in overall density and there are many dark densities, the contrast is increased and the backlight brightness is increased. As a result, it is possible to obtain a display screen in which it is easy to recognize gradations or recognize characters and images. The LCD module 104 is provided with a contrast adjusting means and a backlight adjusting means 106.
The control of both adjusting means was manually performed by the user of the device using the volume control. Further, as the backlight adjusting means, there is one that turns off the backlight when there is no input for a certain period of time (auto power off).

[0004]

Problems to be Solved by the Invention As mentioned above, LC
In D, the user generally operated the volume manually to control the contrast or the brightness of the backlight. However, since the optimum contrast value and backlight brightness value that facilitate gradation recognition etc. differ depending on the display content, the user must always obtain the optimum contrast value and backlight brightness value for the display content by I had to adjust the volume each time.

For this reason, the user tends to set the contrast value and the backlight luminance value to a sufficiently high value and leave them as they are. Therefore, for the user, continuing to look at the screen that is difficult to recognize may cause rapid eye fatigue. Further, in the auto power off, there is a drawback that the display contents are completely invisible because the backlight is turned off.

[0006]

In order to solve the above-mentioned problems, in the LCD according to the present invention, a means for reading the data in the VRAM and judging the data structure is provided, and the judgment result and Based on the determination result of the no-input time after changing the VRAM data, the LCD contrast or the backlight brightness is controlled.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram of a hardware structure according to an embodiment of the present invention. Here, 101 is a CPU, 102 is an LCD controller, 103 is VRAM, and 104 is LC.
D, 105 are data judging means, 106 is contrast
It is a backlight brightness adjusting means. Data determination means 10
Reference numeral 5 reads the data in the VRAM 103, makes a judgment under a predetermined condition, and controls the contrast / backlight brightness adjusting means 106 according to the judgment result.

Next, the data judging means 105 shown in FIG.
Data determination means 105 using a more detailed block diagram of
The operation of will be described.

In the VRAM write detection circuit 201,
When the controller detects that the data is written in the VRAM (step 301), the timer circuit 202 determines whether the timer is in operation (step 30).
2) If the timer is not operating, the timer is counted (step 304). If the timer is operating, the counter is reset (step 303), and the timer is counted in step 304. When the timer circuit 202 counts for a predetermined time, the read control circuit 2
In 03, a control signal and an address signal for reading the display data in the VRAM 103 are issued, and in the case of an LCD display device capable of displaying 16 gradations, 4 bits per pixel
The gradation data of is read for all pixels.

After confirming that there is no new VRAM write for a certain period of time from the VRAM write detection, VR
AM data is read when the contrast value and the backlight brightness value are changed each time the display content changes.
This is because flicker on the screen is noticeable when the display content changes frequently. Further, by making this timer time variable, it is possible to arbitrarily set the followability with respect to changes in the display contents. The VRAM data reading at this time is performed during a period when the LCD controller 102 is not reading data for refreshing the display screen.

The read VRAM data is sent to the data judgment circuit 204.

In the data judgment circuit 204, one pixel of 4 bi
16 flags are provided according to the 16 possible values of the t data, and the flag is set when the 4 bit data corresponding to each flag is read. This is done for all pixels.

Next, the difference between the highest flag and the lowest flag of the set flags is calculated, and the value R ₁ is used for controlling the contrast value. Similarly, the uppermost flag and the lowermost flag of the flags set up are averaged and the value R ₂ is used to control the backlight luminance value.

The contrast control operation will be described below with reference to the circuit configuration example of the contrast control circuit 205 shown in FIG. 4 and the operation flowchart of the circuit shown in FIG. The comparator 401 compares the R ₁ input in step 501 with the value R obtained by A / D converting the current contrast value in the A / D conversion circuit 405 (step 502). The comparison result is the up / down counter 402.
Sent to. That is, if R ₁ > R, the counter is incremented (step 504), and if R ₁ <R, the counter is decremented (step 507). The output of the counter 402 is sent to the selector 403, which serves as a selection input for selecting and connecting one of A and Q _{0 to} Q _{4 in} the selector 403. By selecting one of Q _{0 to} Q ₄ by the selection input and connecting to A, the contrast value Vout
Control (processing of Vout up control at step 505, processing of down control at step 508) is performed. Here, as the default value of the up / down counter, when the selector outputs are Q _{0 to} Q _n , Q _{n / 2} when n is an even number (n kilo), and when n is an odd number,

[0016]

[Outer 1] When the user operates the volume or when the switch is turned on, the up / down counter 402 is set to this default value.
Further, in step 503 or step 506, the selector 4 outputs a selection input such that the selector output selects Q ₀ or Q _n.
03, the comparator output stop circuit 404
Is activated, and no further up clock is output in step 503 and down clock is output in step 506.

Through the series of operations described above, R ₁
Is large, that is, when the difference between the darkest dot and the brightest dot on the screen is large, the contrast value Vo
If ut is small and the difference is small, the contrast value V
It is possible to perform control to increase out.

Similarly, the top flag and the bottom flag are equal.
Average R₂Using the same as the contrast control circuit 205
By operating the backlight control circuit of various configurations
R ₂If the value of is large, the backlight brightness value is small.
Comb, R₂If the value of is small, the backlight brightness
It is possible to perform control such as increasing the value.
It

(Second Embodiment) In the above-mentioned embodiment, VR is used.
As the method of determining the data structure in the AM 103, the difference between the maximum value and the minimum value of the data and the average are used, but of course, this may be another method.

Below, M of VRAM data is used as a determination method.
An example using the average of SB will be described.

In this embodiment, the data judging circuit 20 in the detailed block diagram of the data judging means 105 shown in FIG.
4 is configured as shown in FIG.

The control operation of the contrast value or the backlight brightness value will be described below with reference to FIG.

In the VRAM write detection circuit 201,
When a VRAM write is detected, the timer circuit 202 confirms that there is no new VRAM write for a certain period of time, and then the read control circuit 203 performs VRAM write.
It outputs an address signal and a control signal for reading data. At this time, in the above-described embodiment, the address signal and the control signal are configured so that one pixel 4-bit data is sequentially read, but in the present embodiment, M of each pixel 4-bit data is set.
The address signal and the control signal are configured so that only SB is read in units of 4 pixels to obtain 4-bit data.

FIG. 7 shows the difference between the 4-bit data read in the data determination circuit in the above-described embodiment and this embodiment.

7-A is the 4-bit data in the above-mentioned embodiment, and 7-B is the 4-bit data in this embodiment.
In the present embodiment, since only the MSB of the data is read, there is an advantage that the amount of data to be read may be 1/4 as compared with the above-mentioned embodiments. The read 4-bit data is sent to the data determination circuit shown in FIG. The parallel / serial conversion circuit 601 serially converts the 4-bit data, inputs it to the counter 602, and counts it. This is done for all pixels. At this time, display screen 640x
Assuming 480 dots, the counter 602 displays 19 bi
t is required. After all pixels have been counted, the counter 60
The output of the upper 4 bits of 2 is the average value R _{3 of} MSB.
By using this R ₃ , the contrast value control or the backlight brightness value control is performed in the same manner as in the above-described embodiment according to FIGS. 4 and 5.

(Third Embodiment) In the first and second embodiments, the contrast value or the backlight brightness value is controlled by reading the data in the VRAM 103 and determining the data structure. However, of course, determination means based on the timer circuit 202 may be added thereto. The third embodiment will be described in detail below with reference to the drawings.

FIG. 9 shows a data judging means 10 according to this embodiment.
5 shows a more detailed block diagram of FIG.

In the VRAM write detection circuit 201,
When the controller detects that the data is written in the VRAM 103, the timer circuit 902 performs the timer operation according to the flowchart shown in FIG. Here, the timer circuit 902 has two timer times T
₁ and T ₂ (provided that T ₁ << T ₂ ) can be set. When the timer circuit 902 counts for the timer time T ₁ , the display data in the VRAM 103 is transferred to the data determination circuit 204 by the control signal and the address signal output from the read control circuit 203 as in the first and second embodiments. The data structure is read, the data structure is determined based on the display data, and 4-bit determination data is output from the data determination circuit 204. The judgment data is sent to the contrast control circuit 205 or the backlight control circuit 901. Further, in the present embodiment, the timer circuit 902 inputs the timeout signal Tout, which outputs whether or not the timer time T ₂ has been counted, to the backlight control circuit 901 and the timeout signal Tou.
The CPU 101 detects that the user has operated the device for the first time after t becomes active, and the timeout reset signal Tres for notifying this is input to the backlight control circuit 901.

Next, the operation of the backlight control will be described with reference to the circuit configuration example of the backlight control circuit in this embodiment shown in FIG.

Here, 1001 is a time-out signal T
The timeout set circuit is configured to connect the terminal C and the terminal A when out is active, and connect the terminal C and the terminal B when the timeout signal Tout is non-active. Also, 1002 indicates that the timeout signal T
It is a timeout reset circuit that resets out.

When the time-out signal Tout is non-active, the time-out set circuit 1001 connects the terminal C and the terminal B, and the backlight control circuit 901.
Performs the same operation as the backlight control circuit 206 in the first and second embodiments.

When the time-out signal Tout becomes active, the time-out set circuit 1001 connects the terminal C and the terminal A to each other, so that the backlight brightness value V is increased.
halves out almost.

Further, in this state, when the timeout reset signal Tres is input, the timeout reset circuit 1002 causes the timeout signal Tout.
Is reset, the timeout setting circuit 1001 connects the terminal C and the terminal B, and the up / down counter 402 is set to a default value.

[0034]

As described above, according to the present invention, the control of the contrast value and the backlight brightness value, which has been conventionally performed only by the user manually, reads the data in the VRAM and judges the data. By using the circuit,
It becomes possible to control automatically. This makes it possible to control the contrast value and the backlight brightness value according to the display contents, and always obtain a display screen in which it is easy to recognize gradations or recognize characters and images.

Further, considering that the user tends to set the contrast value or the backlight luminance value to be sufficiently high, the use of the present invention is effective in reducing the power consumption.

Further, since the timer time until the contrast value or the backlight brightness value is controlled after the display contents are changed can be arbitrarily set, the flicker of the screen when the display contents are frequently changed. It is also possible to prevent

Further, according to the invention of the second embodiment, in addition to the above-mentioned effects,
When the no-input time continues, the backlight luminance value can be reduced to almost half, so that it is possible to keep the display content which has been completely invisible in the past to be recognizable.

[Brief description of drawings]

FIG. 1 is a block diagram of a hardware configuration according to an embodiment of the present invention.

FIG. 2 is a more detailed block diagram of the data determination means 105 of FIG.

FIG. 3 is a flowchart from VRAM write detection to read control.

FIG. 4 is a diagram of a circuit configuration example of a contrast value control circuit.

FIG. 5 is a flowchart showing the operation of FIG.

FIG. 6 is a block diagram of a data determination circuit according to a second embodiment of the present invention.

FIG. 7 is a diagram showing a difference in read data according to an embodiment of the present invention and another embodiment.

FIG. 8 is a hardware block diagram of a conventional LCD.

FIG. 9 is a data judgment 10 in the third embodiment of the present invention.
5 is a more detailed block diagram of FIG.

FIG. 10 is a diagram showing a circuit configuration example of a backlight control circuit according to a third embodiment of the present invention.

[Explanation of symbols]

 101 CPU 102 LCD Controller 103 VRAM 104 LCD Module 105 Data Determination Unit 106 Contrast / Backlight Adjustment Unit

Claims (3)

[Claims] 1. A video memory for storing display data, a liquid crystal display controller for accessing the video memory and sending display data and timing signals to the liquid crystal display section, and adjusting the contrast of the liquid crystal display section. In a liquid crystal display device having a contrast adjusting means and a backlight adjusting means for adjusting the brightness of the backlight, data display means for reading the display data in the video memory and determining the data content, and based on the result of the determination,
A liquid crystal display device comprising: a contrast control means for controlling the contrast adjustment means; and a backlight control means for controlling the backlight adjustment means. 2. A timer means for setting a waiting time from the writing of data in the video memory to the reading of the data in the video memory by the data judging means, and the length of the waiting time is variable. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is provided. 3. A video memory for storing display data, a controller for accessing the video memory and sending display data and a timing signal to the liquid crystal display section, and a contrast adjusting means for adjusting the contrast of the liquid crystal display section. A liquid crystal display device having a backlight adjusting means for adjusting the brightness of the backlight, a data judging means for reading the display data in the video memory and judging the data content, and a timer means having two outputs. A contrast control means for controlling the contrast adjusting means and a backlight control means for controlling the backlight adjusting means based on the output of the system of the timer means and the judgment result by the data judging means. Judgment of system output from writing data in the video memory A liquid crystal display device characterized in that the means is used for waiting time until the data in the video memory is read.