JPH05126881A - Device and method for detecting zero-phase current and voltage - Google Patents

Abstract

PURPOSE:To prevent an erroneous judgment of a failure by suppressing a residual signal level of a zero-phase current signal to be constantly low regardless of change in load current, temperature change of a power system, deterioration, etc., of parts. CONSTITUTION:An adder 3 for outputting a zero-phase current signal 3I0 by adding all of phase current signals + or -A1, IB1 and IC1 corresponding to each phase signal of a three-phase power system is provided and a criterion equipment 5 for determining that a failure occurred when the zero-phase current signal 3I0 which is output from the adder 3 exceeds a specified threshold is provided. Also. for minimizing a residual level of the zero-phase current signal 3I0, gain variable amplifiers IA-IC and variation equipment 2A-2C of amount of phase shift for changing an amplitude and a phase of the phase current signals IA1, IB1, and IC1 which are input to the adder 3 are provided and then a controller 4 for adjusting the gain and phase in the gain variable amplifiers 1A-1C and the variation equipment 2A-''C of amount of phase shift is provided for minimizing the residual signal level of the zero-phase current signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a three-phase power system, for example, a zero-phase current / voltage detector and a zero-phase current / voltage detector for detecting a zero-phase current or a zero-phase voltage for fault judgment.
The present invention relates to a voltage detection method.

[0002]

2. Description of the Related Art FIG. 5 shows a circuit block diagram of a conventional failure determination device for detecting a zero-phase current and making a failure determination from the magnitude of the detected zero-phase current. In FIG. 5, the variable gain amplifier 11A comprises an operational amplifier OP _1A , a resistor R _1A provided as its input resistance, and an analog potentiometer AP _1A also provided as its feedback resistance. The analog potentiometer AP _1A is adjusted. By changing the gain, the amplitude of the A-phase current signal I _A1 obtained by detecting the A-phase current in the three-phase power system with, for example, a current transformer is changed.

The variable gain amplifier 11B is an operational amplifier O.
P_1BAnd the resistance R provided as its input resistance_1BSame as
The analog potentiometer provided as the feedback resistor
AP_1BAnd an analog potentiometer AP_1B
By adjusting the gain and changing the gain
B-phase current signal I obtained by detecting the B-phase current in the series _B1
Change the amplitude of.

The variable gain amplifier 11C is an operational amplifier O.
P_1CAnd the resistance R provided as its input resistance_1CSame as
The analog potentiometer provided as the feedback resistor
AP_1CAnd an analog potentiometer AP_1C
By adjusting the gain and changing the gain
C-phase current signal I obtained by detecting the C-phase current in the series _C1
Change the amplitude of.

The phase shift amount variable device 12A is an operational amplifier OP _2A.
And an analog potentiometer AP _2A provided as its input resistance, a capacitor C _1A similarly provided as its input capacitor, and a resistor R _2A similarly provided as its feedback resistance.
By adjusting _2A to change the amount of phase shift, the phase of the A-phase current signal I _A2 after the amplitude adjustment is changed.

The phase shift amount variable device 12B is an operational amplifier OP _2B.
And an analog potentiometer AP _2B provided as its input resistance, a capacitor C _1B similarly provided as its input capacitor, and a resistor R _2B similarly provided as its feedback resistance.
By adjusting _2B to change the amount of phase shift, the phase of the B-phase current signal I _B2 after the amplitude adjustment is changed.

The phase shift amount variable device 12C is an operational amplifier OP _2C.
And an analog potentiometer AP _2C provided as its input resistance, a capacitor C _1C similarly provided as its input capacitor, and a resistor R _2C similarly provided as its feedback resistance.
By adjusting _2C to change the phase shift amount, the phase of the C-phase current signal I _C2 after the amplitude adjustment is changed.

The adder 3 is an operational amplifier OP.₃And its input
Resistance R provided as a resistance_3A, R _3B, R_3CSame as
Resistor R provided as a feedback resistor of_FourConsisting of and amplitude
And each phase current signal I of A, B and C after the phase adjustment_A3，
I_B3, I_C3Is added vectorically. The determiner 5 is A,
B and C phase current signals I_A3, I_B3, I_C3Vectorically
Zero-phase current signal 3I obtained by addition₀Is a predetermined threshold
Compare, zero-phase current signal 3I₀Exceeds the specified threshold
When the condition continues for a certain period of time or more, it is determined as a failure.

Variable gain amplifiers 1A, 1B, 1C
Uses the same circuit constant as each component, and
Phase amount variable circuits 2A, 2B and 2C are also circuits as respective constituent elements.
The same constant is used. In addition, adder 3
Resistance R_3A, R_3B, R _3CHave the same resistance
Of each phase current signal I of A, B, C_A3, I_B3, I
_C3So that the coefficients when adding
It

The A-phase current signal I _A1 , the B-phase current signal I _B1 , and the C-phase current signal I _C1 corresponding to the currents of the A, B, and C phases are input to the variable gain amplifiers 11A, 11B, and 11C, respectively. A-phase current signal I _A2 , B-phase current signal I _B2 , and C-phase current signal I whose amplitudes have changed and whose amplitudes have been adjusted.
_C2 is obtained. A-phase current signal I _A2 after the amplitude changes,
The B-phase current signal I _B2 and the C-phase current signal I _C2 are the phase shift amount changer 1
2A, 12B, 12C are input to change the phase,
Phase-adjusted A-phase current signal I _A3 , B-phase current signal I _B3 , and C-phase current signal I _C3 are obtained at these output terminals.

The A-phase current signal I _A3 , the B-phase current signal I _B3 , and the C-phase current signal I _C3 are added by the adder 3 to form a zero-phase current signal 3I ₀ . This zero-phase current signal 3I ₀ is
Analog potentiometers AP _1A , AP _1B , A
P _1C , AP _2A , AP _2B and AP _2C are adjusted to minimize the residual signal level. With the residual signal level adjusted to the minimum level as described above, the magnitude of the zero-phase current signal is determined, and when the state in which the zero-phase current signal exceeds the predetermined threshold value continues for a certain time or more, 3 It is considered that some failure has occurred in the power system of the phase.

When the residual signal is large, a residual removing circuit may be provided to take the change. In some cases, a failure of the three-phase power system may be determined based on the magnitude of the zero-phase voltage. In this case, the input signal is changed from a current signal to a voltage signal, and otherwise the same as in the case of current determination. is there.

[0013]

In the above-described failure determination device, gain adjustment and phase adjustment are performed by analog potentiometers AP _1A , AP _1B , AP _1C , AP _2A , A.
_P2B , _AP2C , that is, by adjusting the resistance value of the variable resistor, but the residual signal level of the zero-phase current / voltage signal is high due to changes in load current, temperature changes in the power system, deterioration of components, etc. The residual level may be close to 100 A when converted to the actual load current, and the zero-phase current (× 3) changes by about 1.5 A when the load current changes by 20 A, and the zero-phase current or zero-phase voltage is accurate. If it becomes impossible to detect well and the residual signal level exceeds a certain threshold value, a failure will occur depending on whether the zero-phase current / voltage signal level exceeds the threshold value, even if the power system is normal. There is a problem that the judgment means malfunctions.

Therefore, an object of the present invention is to always suppress the residual signal level of the zero-phase current / voltage signal to a low level regardless of changes in load current, temperature changes in the power system, deterioration of components, etc. A zero-phase current / voltage detection device and a zero-phase current / voltage detection method capable of detecting a voltage with high accuracy.

[0015]

A zero-phase current / voltage detecting device according to claim 1 is a vector-type detector for all phase current / voltage signals corresponding to the current or voltage of each phase of a three-phase power system. An adding means is provided for adding and outputting a zero-phase current / voltage signal corresponding to the zero-phase current or zero-phase voltage. Further, in order to minimize the residual level of the zero-phase current / voltage signal, two of the phase current / voltage signals input to the adding means are used.
A variable gain amplifying means for changing the amplitude of the phase is provided, and a controlling means for adjusting the gain in the variable gain amplifying means is provided so as to minimize the residual signal level of the zero-phase current / voltage signal.

In the zero-phase current / voltage detection method according to the present invention, all the phase current / voltage signals corresponding to the current or voltage of each phase of the three-phase power system are added like a vector by addition means. This is a zero-phase current / voltage detection method for calculating a zero-phase current / voltage signal corresponding to a zero-phase current or zero-phase voltage, and the gain can be varied by the control means in order to minimize the residual level of the zero-phase current / voltage signal. The amplifying means is controlled by combining the first to fourth control modes.

In the first control mode, the amplitude of one of the two-phase current / voltage signals of each phase current / voltage signal input to the adding means is changed by the variable gain amplifying means provided on the input side of the adding means. By doing so, the residual signal level of the zero-phase current / voltage signal is minimized. In the second control mode, the residual signal level of the zero-phase current / voltage signal is minimized by changing the amplitude of the other of the two-phase current / voltage signals by the variable gain amplifying means.

In the third control mode, the amplitudes of both the two-phase current / voltage signals are changed in the same direction by the variable gain amplifying means to minimize the residual signal level of the zero-phase current / voltage signals. In the fourth control mode, the amplitudes of both the two-phase current / voltage signals are changed in opposite directions by the variable gain amplifying means to minimize the residual signal level of the zero-phase current / voltage signals.

A zero-phase current / voltage detection device according to a third aspect of the present invention is a zero-phase current obtained by vector-wise adding all of the phase current / voltage signals corresponding to the current or voltage of each phase of the three-phase power system. Alternatively, addition means for outputting a zero-phase current / voltage signal corresponding to the zero-phase voltage is provided. Further, in order to minimize the residual level of the zero-phase current / voltage signal, a gain / phase shift amount varying means for changing the amplitude and phase of each phase current / voltage signal input to the adding means is provided, and the zero-phase current / voltage signal is changed. There is provided control means for adjusting the gain and the amount of phase shift in the gain / phase shift amount varying means so as to minimize the residual signal level of the voltage signal.

[0020]

According to the structure of the first aspect, by controlling the variable gain amplifying means by the controlling means, the amplitudes of two phases of the current / voltage signals of each phase input to the adding means are changed to the remaining one phase. The amplitude of is automatically adjusted. As a result, the zero-phase current
The residual signal level of the voltage signal can be minimized.
The adjustment to match the amplitude of these two phases with the amplitude of the remaining one phase is
This is effective when the phases of the three-phase current / voltage signals are not greatly deviated.

By automatically adjusting the amplitudes of the two phases in this way, changes in load current, changes in temperature of the power system,
Even when the residual signal level of the zero-phase current / voltage signal increases due to deterioration of components, the residual level of the zero-phase current / voltage signal can be automatically minimized. As a result,
The zero-phase current / voltage can be detected with high accuracy. According to the configuration of claim 2, the amplitude of one of the two-phase current / voltage signals of the current / voltage signals of each phase is changed by the variable gain amplifying means provided on the input side of the adding means. The first control mode of minimizing the residual signal level of the current / voltage signal and the residual signal of the zero-phase current / voltage signal by changing the amplitude of the other of the two-phase current / voltage signals by the variable gain amplifying means. The residual signal level of the zero-phase current / voltage signal is minimized by changing the amplitudes of both the two-phase current / voltage signals in the same direction by the second control mode of minimizing the level and the variable gain amplifying means. And a third control mode
By combining the fourth control mode in which the residual signal level of the zero-phase current / voltage signal is minimized by changing the amplitudes of both the two-phase current / voltage signals in the opposite directions by the variable gain amplifying means, it is possible to achieve zero. It is possible to quickly minimize the residual signal level of the phase current / voltage signal.

According to the third aspect of the invention, the amplitude / phase of each phase current / voltage signal input to the adding means is adjusted by controlling the gain / phase shift amount varying means by the control means. As a result, the residual signal level of the zero-phase current / voltage signal can be minimized. By automatically adjusting the amplitudes of the two phases in this way, even when the residual signal level of the zero-phase current / voltage signal increases due to changes in load current, changes in the temperature of the power system, deterioration of components, etc. The residual level of the zero-phase current / voltage signal can be automatically minimized. As a result, the zero-phase current / voltage can be detected accurately.

[0023]

Embodiments of the present invention will now be described with reference to the drawings.
Explain. FIG. 1 is a failure judgment of the first embodiment of the present invention.
Shows a circuit diagram of the device (including zero-phase current detection device)
It This failure determination device is a variable gain amplifier 11 of FIG.
Variable gain amplifiers 1A, 1 instead of A, 11B, 11B
B and 1C are also used, and the phase shift amount variable devices 12A, 12B,
Phase shift amount changers 2A, 2B and 2C are used instead of 12C,
Further, the zero-phase current signal 3I output from the adder 3₀Enter
As the force, the gain of the variable gain amplifiers 1A, 1B, 1B
While changing the phase shift amount changer 2A, 2B, 2C
A controller 4 for changing the amount of phase shift is provided. Above gain
The variable amplifiers 1A, 1B, 1C are variable gain amplifiers 11
Analog potentiometer for A, 11B, 11B
AP_1A, AP_1B, AP_1CDigital potentiometer D
P_1A, DP _1B, DP_1CIt has been changed to
The transformers 2A, 2B, 2C are phase shift amount varying devices 12A, 12
B, 12C analog potentiometer AP_2A, A
P_2B, AP _2CDigital potentiometer DP_2A, DP
_2B, DP_2CIt has been changed to.

The other structure is the same as that of the failure determination device of FIG. In the failure determination device having the above-described configuration, the controller 4 is always operated, the gains of the variable gain amplifiers 1A, 1B, 1C are changed based on the magnitude of the zero-phase current signal 3I ₀ , and the phase shift amount variable device is changed. By changing the amount of phase shift of 2A, 2B, and 2C, the amplitude and phase of each phase current signal of A, B, and C input to the adder 3 are changed, and the residual signal level of the zero-phase current signal is constantly minimized. to, when the zero-phase current signal 3I ₀ output from the adder 3 in this state determiner 5 is compared with the threshold value, the state in which the zero-phase current signal 3I ₀ exceeds the threshold persisted predetermined time Then, it is determined that the three-phase power system has a failure.

The control operation of the controller 4 will be specifically described. The controller 4 controls the zero-phase current signal 3 at regular intervals.
The magnitude of I ₀ is determined, and the gain variable amplifiers 1A, 1B, 1C and the phase shift amount changer 2A, in the direction in which the zero-phase current signal 3I ₀ decreases according to a predetermined control algorithm.
A gain up / down command or phase shift amount up / down command is selectively given to 2B and 2C.

Variable gain amplifiers 1A, 1B, 1C described above
When the gain up command is given from the controller 4,
Digital potentiometer DP_1A, DP_1B, DP_1CResistance
The value is changed by one step each and the gain is changed by one step.
Increase by minutes. Conversely, a gain down command is given
Then, the digital potentiometer DP _1A, DP_1B, DP
_1CChange the resistance value of each one step in the opposite direction
Then, the gain is reduced by one step.

Similarly, the phase shift amount changer 2A, 2B, 2C
When the controller 4 gives a phase shift amount up command,
Digital potentiometer DP_2A, DP_2B, DP_2CResistance
The value is changed by one step each and the phase is changed by one step.
Proceed. Conversely, if a phase shift amount down command is given,
Digital potentiometer DP _2A, DP_2B, DP_2COf
Change the resistance value in the opposite direction by one step each
Delay the phase by one step.

As described above, the controller 4 causes the digital potentiometers DP _1A , DP _1B , DP _1C and DP to operate at regular intervals.
_The zero-phase current signal 3I ₀ is minimized by changing the resistance values of _2A , DP _2B and DP _2C step by step. In this case, in order that the failure determination by the failure determiner 5 can be performed without trouble, it is set sufficiently longer than the control cycle by the controller 4 compared to the zero-phase current continuation time for determining failure.

Alternatively, the controller 4 may set a digital signal for each cycle.
Tarpot potentiometer DP_1A, DP _1B, DP_1C, D
P_2A, DP_2B, DP_2CZero phase by adjusting step by step
Current signal 3I₀Of the change width of the
Set it small enough. Or one cycle by the controller 4
Digital potentiometer DP for each_1A, DP_1B, D
P_1C, DP_2A, DP_2B, DP_2CFor each step adjustment
Due to zero-phase current signal 3I₀Change width of the failure threshold
It is set to be sufficiently smaller than the
The control cycle by the controller 4 is
Be sufficiently long.

For example, when the zero-phase current continuation time for determining a failure is 100 msec, for example, the control cycle by the controller 4 is set to 500 msec. Alternatively, the zero-phase current continuation time for determining a failure is 100 m, for example.
In the case of sec, when the threshold value is set so that it is regarded as a failure when the value of the zero-phase current exceeds 1 A, the adjustment width is set to 10 mA, and the control cycle is 100 mse.
Set to c.

Alternatively, when the zero-phase current continuation time for determining a failure is 100 msec, for example, the zero-phase current value is 1
When the threshold value is set so as to be regarded as a failure when A is exceeded, the adjustment width is set to, for example, 10 mA, and
The control cycle by the controller 4 is set to, for example, 500 msec. According to this embodiment, the variable gain amplifiers 1A, 1
By controlling B, 1C and the phase shift amount varying devices 2A, 2B, 2C by the controller 4, the amplitude and phase of each phase current signal I _A1 , I _B1 , I _C1 input to the adder 5 are automatically controlled. Since the adjustment is performed, even when the residual signal level of the zero-phase current signal 3I ₀ increases due to a change in load current, a temperature change in the power system, deterioration of components, etc., the residual level of the zero-phase current / voltage signal is automatically adjusted. Can be minimized. As a result, the zero-phase current or the zero-phase voltage can be detected with high accuracy, and the zero-phase current signal 3I ₀ is compared with the threshold value to determine 3
It is possible to prevent erroneous determination of a failure when determining a failure of the phase power system.

FIG. 2 shows a circuit block diagram of a failure judging device according to a second embodiment of the present invention. This example
There is little phase difference between the A, B, and C phase currents (approximately ± 1 ° each)
Within) An example is shown in which the phase adjustment can be omitted. Further, the difference in the amplitudes of the A, B, and C phase currents is not so large (the variation in the amplitude of the A, B, and C phases is within about ± 10% in total), and the amplitude adjustment is performed in three phases. It is not necessary to adjust all of the above, and only one of the amplitudes of one phase may be fixed and the amplitudes of the remaining two phases may be adjusted.

In FIG. 2, the variable gain amplifier 6A is
It is composed of an operational amplifier OP _1A , a resistor R _{5A serving as} its input resistance and a digital potentiometer DP _3A and a resistor R _{6A serving} as its feedback resistance. The amplitude of the A-phase current signal I _{A1 is} , for example, a reference value times ± 10%. Change in the range. The fixed gain amplifier 6B is composed of an operational amplifier OP _1A , a resistor R _{5B as} its input resistance, and a resistor R _{6B as} its feedback resistance, and multiplies the amplitude of the B-phase current signal I _B1 by a reference value.

The variable gain amplifier 6C is an operational amplifier OP.
_1CAnd the resistance R that becomes the input resistance_5CAnd digital pot
Schometer DP_3CThe resistor R which becomes the feedback resistance as well as_6C
And a C-phase current signal I_C1The amplitude of
Change within the range of ± 10%. In this case, as above
And the A-phase current signal I_A1And C-phase current signal I_C1The amplitude of
To change in the range of ± 10% times the reference value, the resistance R
_5AAnd resistance R_5CThe resistance value of
Meter DP_3AAnd digital potentiometer DP _3CWith
The resistance values are the same, and the series combined resistance values are
Set each resistance value so that it can be changed within ± 10%.
There is.

Further, the resistance R _5B is set to a resistance value obtained by adding the resistance R _5A (or the resistance R _5C ) and the resistance value at the midpoint of the digital potentiometer DP _3A (or the digital potentiometer DP _3C ). The digital potentiometers DP _3A and DP _3C have a resolution of, for example, 51
There are two steps. Further, the adjustment cycle by the controller 4 is once every 100 msec, for example.

Further, the gain adjustment by the controller 4 can be converged at high speed by combining the following four control modes and repeating these control modes, and the zero-phase current signal 3I ₀ remains. It is possible to rapidly bring the signal level close to zero. The procedure is
First, in the first control mode, the gain of the zero-phase current signal 3I ₀ is minimized by changing the amplitude of the A-phase current signal I _A1 input to the adder 3 by the variable gain amplifier 6A. The A-phase control mode for controlling the variable amplifier 6A is executed.

Next, as the second control mode, the adder 3
Input to C phase current signal I_C1Amplitude can be gained for
The zero-phase current signal can be changed by changing with the amplifier 6C
No. 3I₀Gain adjustable to minimize the residual signal level of
The C-phase control mode for controlling the amplifier 6C is executed. One
As the third control mode, the A-phase current signal I_A1And
And C phase current signal I _C1Variable gain for both
By changing in the same direction by the amplifiers 6A and 6C,
Zero phase current signal 3I₀Minimize the residual signal level of
Control the variable gain amplifiers 6A and 6C (A + C)
Execute phase control mode.

Next, as the fourth control mode, the A-phase power is supplied.
Stream signal I_A1And C-phase current signal I _C1Shake for both
The width is changed in the opposite direction by the variable gain amplifiers 6A and 6C.
The zero-phase current signal 3I₀Residual signal level of
Control variable gain amplifiers 6A and 6C to minimize
(A-C) Phase control mode is executed. 4 types mentioned above
Zero phase current 3
I₀Can be quickly converged to zero as shown in FIG.
As is clear from the current vector diagram of (A + C)
A mode current signal I in control mode_A1Is vectorally ΔA
Change and the C-phase current signal I_C1Is vector
Since it changes by ΔC, this composite vector ΔF₁Is phase B
Current signal I_B1It becomes almost parallel to (A-C)
A mode current signal I in control mode_A1Is vectorally ΔA
Change and the C-phase current signal I_C1Is vector
Since it changes by −ΔC, this composite vector ΔF₂Is B
Phase current signal I_B1This is because the state becomes substantially orthogonal to.

That is, the (A + C) phase control mode and the (A-
C) By performing control in the phase control mode, the change in the current vector obtained by combining the A-phase current signal I _A1 and the C-phase current signal I _C1 is in a direction substantially parallel to the vector of the B-phase current signal I _B1 or This is because it occurs in the orthogonal direction. In the A-phase control mode, the A-phase current signal I _A1 changes vectorally by ΔA, and in the C-phase control mode, the C-phase current signal I _C1 changes vectorally by ΔC.

Next, a specific configuration of the controller 4 will be described with reference to FIG. In FIG. 4, 21 is a zero-phase current signal 3I.
A sample-and-hold circuit for detecting ₀ , 22 is an A / D converter for converting the output signal of the sample-and-hold circuit 21 into a digital signal, and 23 is an unnecessary component from the digital signal output from the A / D converter 22 [eg, , Ground fault is 60Hz
When the component changes by 100 mA (in the case of I ₀ ), it is judged to have occurred. Therefore, it is a filter for eliminating frequency components other than 60 Hz (even if the needle-shaped waveform is determined by the 60 Hz component). Reference numeral 24 is a zero-phase current absolute value calculation circuit that obtains the absolute value of the zero-phase current signal using the output signal of the filter 23 as input, 25 is a sign inversion circuit that inverts the output signal of the zero-phase current absolute value calculation circuit 24, and 26 is A delay circuit that holds the output signal of the zero-phase current absolute value calculation circuit 24 one sample period before, and 27 represents the output signal of the inverting circuit 25 (corresponding to the zero-phase current signal 3I ₀ at the current sampling time) and the delay circuit 26. Output signal (zero-phase current signal 3I at the time of previous sampling
(Corresponding to ₀ ) and.

28 is a timer circuit for generating a sample clock for determining the sampling period of the sample and hold circuit 21, 29 is a frequency divider for dividing the sample clock of the timer circuit 28, and 30 is an output signal of the frequency divider 29. Digital potentiometers DP _3A , DP _3B , DP _3C as control signals
Is a control condition setting circuit for setting the control condition of the digital potentiometer DP _3A , DP _3B , DP _3C under the previous control condition without changing the control condition when the positive output signal is generated from the adder 27. The zero-phase current signal 3I ₀ is brought close to zero by selectively stepping up or down.

Reference numeral 31 is a gain selection circuit for switching between increasing and decreasing the gain each time a negative output signal is generated from the adder 27. This gain selection circuit 31 is a negative output from the adder 27. The switch 32 is reversed each time a signal is generated. When the switch 32 is switched to the terminal a side, the increment signal (+
1) The input device 33 is selected, the control condition of the control condition setting unit 30 is in the increment mode, and the control condition setting unit 3
0 is a digital potentiometer DP _3A , DP _3B , DP _3C
One of the above is increased by one step. When the switch 32 is switched to the b side, the decrement signal (-1) input device 34 is selected and the control condition of the control condition setting unit 30 is the decrement mode.
The control condition setting unit 30 is a digital potentiometer D.
P _3A, DP _3B, a state that reduces by one step either the DP _3C.

Reference numeral 35 is a counter that counts up each time a negative output signal is generated from the adder 27. Reference numeral 36 denotes a phase selection circuit that selects a control phase according to the count value of the counter 35, and selectively switches the switch 37 to any of the a side, the b side, the b'side, and the c side according to the count value of the counter 35. Switch to. When the switch 37 is switched to the side a, the A-phase signal input device 38 is selected and the control condition of the control condition setting unit 30 is the A-phase control mode. At this time, the gain selection circuit 31 causes the switch 31
Is switched to the a side, the operation of increasing the gain of the A-phase variable gain amplifier 6A by one step is performed, for example, until the negative output signal is generated from the adder 27.
Execute every msec. On the contrary, if the switch 31 is switched to the b side by the gain selection circuit 31, the operation of decreasing the gain of the A-phase variable gain amplifier 6A by one step is performed until the negative output signal is generated from the adder 27. For example, it is executed every 100 msec.

When the switch 37 is switched to the c side, the C-phase signal input device 39 is selected and the control condition setting section 3 is selected.
The control condition of 0 is the C-phase control mode. At this time, if the switch 31 is switched to the a side by the gain selection circuit 31, the operation of increasing the gain of the C-phase variable gain amplifier 6C by one step is performed until the negative output signal is generated from the adder 27. For example, it is executed every 100 msec. On the contrary, the switch 31 is switched to b by the gain selection circuit 31.
If it is switched to the side, the C-phase variable gain amplifier 6C
The operation of decreasing the gain of 1 by one step is performed by the adder 27.
From the output signal of negative polarity to 100 mse
Run every c.

When the switch 37 is switched to the b side, both the A-phase signal input device 38 and the B-phase signal input device 39 are selected and the control condition of the control condition setting unit 30 is (A +
The C) phase control mode is set, and similarly, in the state of switching to the b ′ side, the (AC) control mode is set. If the control mode is, for example, the (A + C) phase control mode, and the switch 31 is switched to the a side by the gain selection circuit 31 at this time, the A-phase and C-phase variable gain amplifiers 6A and 6A are provided.
The operation of increasing the gain of C by one step is executed, for example, every 100 msec until the negative output signal is generated from the adder 27. On the contrary, the gain selection circuit 31
If the switch 31 is switched to the b side by, the gains of the A-phase and C-phase variable gain amplifiers 6A and 6C are set to 1
The operation of reducing the number of steps is executed every 100 msec, for example, until a negative output signal is generated from the adder 27.

If the control mode is the (A-C) control mode and the switch 31 is switched to the side a by the gain selection circuit 31 at this time, the gain of the A-phase variable gain amplifier 6A is reduced by one step. The operation of increasing the gain and decreasing the gain of the C-phase variable gain amplifier 6C by one step is executed, for example, every 100 msec until the negative output signal is generated from the adder 27. On the contrary, if the switch 31 is switched to the b side by the gain selection circuit 31, the gain of the A-phase variable gain amplifier 6A is decreased by one step and the gain of the C-phase variable gain amplifier 6C is increased by one step. Is executed every 100 msec, for example, until a negative output signal is generated from the adder 27.

Here, the mutual relationship of the series of control modes will be described. In the first control mode, when the output signal of the adder 27 is positive (the value obtained by subtracting the current sample value from the previous sample value is positive, the zero phase current signal 3
I ₀ has become smaller than the previous time), and the A-phase component is increased by the increment signal (+1) input device 33 and the A-phase signal input device 38.

When the output signal of the adder 27 is inverted negatively, it means that the zero-phase current signal 3I ₀ has started to increase. At this time, the gain selection circuit 31 uses the switch 3
1 is switched to the b side, and "1" is counted by the counter 35. In the control condition setting unit 30, the decrement signal (−1) input device 34 and the A-phase signal input device 38
Reduce Phase A component.

After that, when the adjustment range of the phase A is exceeded, the polarity of the output signal is repeated in the adder 27 for each sample such as positive, negative, positive, negative. Counter 3
If the count value of 5 is set to “3”, for example, when the polarity of the output signal of the adder 27 becomes negative three times, a signal is sent from the counter 35 to the phase selection circuit 36 and the phase selection circuit 36 switches the switch 37 to the C side, which shifts to the second control mode to perform the C-phase adjustment operation. Here, the same adjustment operation as above is repeated.

After that, when the adjustment range of the C phase is exceeded, a signal is sent from the counter 35 to the phase selection circuit 36 in the same manner as described above, and the phase selection circuit 36 switches the switch 37 to the b side, and the third control mode. Then, the adjustment operation of the (A + C) phase is performed. After that, when the adjustment range of the (A + C) phase is exceeded, the counter 35 changes the phase selection circuit 3 in the same manner as above.
6 is sent, the phase selection circuit 36 switches the switch 37 to the b'side, and shifts to the fourth control mode (A-
C) Phase adjustment operation is performed.

After that, the adjustment operation of the A phase is repeated, and the zero phase current I ₀ is controlled to be the minimum. As a control method, if the control condition setting unit 30 performs the control operation 5 times for the A phase, then the control operation is performed 5 times for the C phase and further 5 times for the (A + C) phase.
Further, the same result can be obtained by repeating the control operation with a group of 20 times as a series of control operations such as performing the control 5 times for the (A-C) phase.

According to this embodiment, since the gain control for only two phases is required, the circuit structure can be simplified and the cost can be reduced. Other effects are similar to those of the first embodiment. In each of the above-mentioned embodiments, the one for detecting the zero-phase current has been described, but the present invention can be similarly applied to the one for detecting the zero-phase voltage.

[0053]

According to the zero-phase current / voltage detection device of the first aspect, by controlling the variable gain amplifying means by the control means, two phases of each phase current / voltage signal inputted to the adding means are supplied. Since the amplitude of the minute is automatically adjusted to the amplitude of the remaining one phase, even when the residual signal level of the zero-phase current / voltage signal increases due to changes in load current, changes in the temperature of the power system, deterioration of components, etc. , It is possible to automatically minimize the residual level of the zero-phase current / voltage signal. As a result, the zero-phase current or zero-phase voltage can be accurately detected.

According to the failure determination method of the second aspect, first, the amplitude of one of the two-phase current / voltage signals of each phase current / voltage signal is adjusted by the variable gain amplifying means provided on the input side of the adding means. Then, the amplitude of the other of the two-phase current / voltage signals is changed by the variable gain amplifying means, and then the amplitudes of both of the two-phase current / voltage signals are changed in the same direction by the variable gain amplifying means. Next, the amplitudes of both the two-phase current / voltage signals are changed in the opposite directions by the variable gain amplifying means to minimize the residual signal level of the zero-phase current / voltage signals, and this is repeated, so that the zero-phase current / voltage signals are repeated. It is possible to quickly minimize the residual signal level of the current / voltage signal.

According to the failure determination device of the third aspect, by controlling the gain / phase shift amount varying means by the controlling means, the amplitude / phase of each phase current / voltage signal input to the adding means is automatically controlled. Since the adjustment is performed, even if the residual signal level of the zero-phase current / voltage signal increases due to changes in load current, temperature changes in the power system, deterioration of components, etc., the residual level of the zero-phase current / voltage signal is automatically adjusted. Can be minimized. As a result, the zero-phase current or zero-phase voltage can be accurately detected.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a failure determination device according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a failure determination device according to a second embodiment of the present invention.

FIG. 3 is a current vector diagram showing the failure determination method of the present invention.

FIG. 4 is a block diagram showing an example of a specific configuration of a controller.

FIG. 5 is a circuit diagram showing a conventional example of a failure determination device.

[Explanation of symbols]

 1A, 1B, 1C Gain variable amplifier 2A, 2B, 2C Phase shift amount variable device 3 Adder 4 Controller 5 Judgment device

Claims (3)

[Claims] 1. A zero-phase current or voltage corresponding to a zero-phase current or zero-phase voltage by adding all of the phase-current / voltage signals corresponding to the current or voltage of each phase of a three-phase power system in a vector manner. In the zero-phase current / voltage detecting device provided with an adding means for outputting a signal, two of the phase current / voltage signals input to the adding means are used.
Variable gain amplifying means for changing the amplitude of the phase is provided, and control means is provided for adjusting the gain in the variable gain amplifying means so as to minimize the residual signal level of the zero-phase current / voltage signal. Zero-phase current / voltage detector. 2. A zero-phase corresponding to a zero-phase current or a zero-phase voltage by vector-wise adding all the respective phase current / voltage signals corresponding to the current or voltage of each phase of a three-phase power system by adding means. In a zero-phase current / voltage detection method for calculating a current / voltage signal, the amplitude of one of the two-phase current / voltage signals of each phase current / voltage signal input to the adding means is input to the adding means. A first control mode in which the variable gain amplifying means is controlled by the controlling means so as to minimize the residual signal level of the zero-phase current / voltage signal by changing the gain variable amplifying means provided in the second phase; By changing the amplitude of the other of the current / voltage signals of (1) by the variable gain amplifying means, the gain control is possible so as to minimize the residual signal level of the zero-phase current / voltage signals. By changing the amplitudes of both the second control mode for controlling the amplifying means by the control means and the two-phase current / voltage signals in the same direction by the gain variable amplifying means, the zero-phase current / voltage signal of A third control mode in which the gain variable amplification means is controlled by the control means so as to minimize the residual signal level, and both amplitudes of the two-phase current / voltage signals are reversed by the gain variable amplification means. A zero-phase current / a fourth control mode in which the variable gain amplifying means is controlled by the control means so as to minimize the residual signal level of the zero-phase current / voltage signal by changing the zero-phase current / voltage signal. Voltage detection method. 3. A zero-phase current or voltage corresponding to zero-phase current or zero-phase voltage by adding all of the phase-current / voltage signals corresponding to the current or voltage of each phase of the three-phase power system in a vector manner. In a zero-phase current / voltage detecting device provided with an adding means for outputting a signal, gain / phase shift amount varying means for changing the amplitude and phase of each phase current / voltage signal input to the adding means is provided, and the zero phase A zero-phase current / voltage detection device comprising a control means for adjusting the gain and the phase shift amount in the gain / phase shift amount varying means so as to minimize the residual signal level of the current / voltage signal.