JPH0512452A - Data processor - Google Patents

Abstract

PURPOSE:To provide the data processor which enables high-speed measurement and the high-accuracy measurement of pulse signals. CONSTITUTION:A storage part 3 is provided to store data measured by a measurement part 1 together with correction data for offset and gain control each time the measurement is executed so as to resolve problems. After the measurement, a processing part 2 corrects the measured data stored in the storage part 3 according to storage correction data. The data of pulse signals to be measured are stored together with the set value of a digital filter for removing noise contained in the measurement part 1. After the measurement, the processing part 2 advances a time base for the measured data, which are stored in the storage part 3, delayed by the digital filter.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processing device. In particular, the present invention refers to improvements that facilitate high speed measurement of data processing devices.

[0002]

2. Description of the Related Art FIG. 8 is a diagram showing a first conventional data processing apparatus. The main components of this figure are signal sources 101 and 102, operational amplifiers 103 and 104 that constitute a differential amplifier of the signal sources 101 and 102, an offset adjusting resistor 105, and an offset voltage Vofs connected to the resistor 105. It includes a buffer amplifier 106 that generates a signal, an operational amplifier 107 that amplifies the result of offset adjustment of the difference signal between the signal sources 1 and 2, and a resistor 108 that adjusts the gain G of the operational amplifier 107.

In this data processor, an analog signal source 1
And 2 of the voltages V ₁ and V _2, V ₁ in the differential amplifier
Offset adjustment contrast as -V ₂ V ₁ -V ₂ -
Vofs, adjust gain for span adjustment, and adjust V ₀
= (V ₁ −V ₂ −Vofs) × G, this is converted to ADC (Ana
log-to-digital converter) and convert it to a digital signal for data analysis.

FIG. 9 is a diagram showing a second conventional data processing apparatus. The configuration of this figure has a resistor 1 that limits the inrush current.
A buffer unit 12 for converting a high impedance into a low impedance; an ADC 13 for converting an analog signal into a digital signal; a CPU 110 for performing an offset adjustment process and a gain adjustment process; and the offset correction data and the gain adjustment correction data. And the CPU 11
A storage unit 111 for storing data processed by 0 and a display unit 4 for displaying data processed by the CPU 110 are included.

The second conventional example is different from the first example in that it is an analog signal process, but is different in that it is a digital signal process. The offset Vofs and the gain G are offset from the storage unit 11 at each sampling cycle. To call the CPU110
Then, V = V ₀ −Vofs and V = (V ₀ −Vofs) × G are calculated and stored in the storage unit 11 and displayed on the display unit 4.

FIG. 10 is a diagram showing a third conventional data processing apparatus. The configuration of this figure includes a low-pass filter 120 for removing disturbance noise, a pulse processor 112 for measuring the period, pulse width, and phase difference of a pulse to be measured, a CPU 110 for controlling the entire apparatus, and measurement data. 111a and IC memory 11 for storing
1b and the display part 4 which displays measurement data are included.

Memory 111a and IC memory 111b
Includes the period measured by the pulse processor, the pulse width,
Measurement values such as phase difference are stored. Further, these measured values are also displayed on the display unit 4.

[0008]

However, in the conventional first data processing apparatus, in order to measure a plurality of analog signals with high accuracy, it is necessary to correct the measured value in each measuring apparatus, but many circuit elements are required. For example, there is a problem that adjustment of a correction circuit including an operational amplifier and a resistor is complicated and leads to high cost.

Further, in the second conventional data processing apparatus, A
The above problem is solved because it is processed by the microprocessor after D conversion, but it takes time to correct the measurement value for each measurement, and for example, a cycle of about 10 msec is possible, but for a signal of about 1 msec, There is a problem in that high-speed measurement that shortens the sampling cycle cannot be performed.

Further, in the third conventional data processing apparatus,
The low-pass filter alone cannot remove spike-shaped noise with a short width, and thus the pulse to be measured cannot be accurately measured. In view of the above problems, it is an object of the present invention to provide a data processing device capable of high speed measurement and high precision measurement of pulse signals.

[0011]

FIG. 1 is a diagram showing the principle configuration of the present invention. In order to solve the problem, the first aspect of the invention includes the storage unit 3 that stores the data measured by the measurement unit 1 for each measurement together with the correction data for adjusting the offset, the gain, and the like.

After the measurement, the processing unit 2 corrects the stored measurement data in the storage unit 3 with the stored correction data. In the second invention, the data of the measured pulse signal is stored together with the setting value of the digital filter for noise removal included in the measuring unit 1. After the measurement, the processing unit 2 advances the time axis of the measurement data stored in the storage unit 3 forward by the amount delayed by the digital filter.

[0013]

In FIG. 1, before measurement, the offset, gain, etc. of each measuring instrument constituting the measuring unit 1 is adjusted, and the adjusted offset, gain, etc. correction data is stored in the storage unit 3.
Memorized in. When the measurement unit 1 measures the data, the storage unit 3 stores the measurement data in association with the correction data for each measurement, and after the measurement, the processing unit 2 corrects the stored measurement data in the storage unit 3 with the correction data. Since the storage operation and the correction processing operation can be performed separately by the processing, the speed of the storage operation is increased, the sampling period for the high frequency signal can be shortened, and high speed measurement can be performed. The data measured at high speed in this way is used for data analysis after adjustment of offset, gain, etc. by the correction data after measurement.

When the input signal is a pulse signal, the set value of the digital filter included in the measuring unit 1, that is, the time width of spike noise to be removed is stored before measurement. When the pulse signal is input, the measurement data such as the period, pulse width and phase difference of the pulse signal is stored in association with the set value of the digital filter. After measurement, the time axis of the stored pulse signal is delayed by the time width of spike noise to be removed, which is the set value of the digital filter, and the time axis of the stored pulse signal is corrected and output after matching with the time axes of other signals. .

[0015]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 2 shows a data processing device according to an embodiment of the present invention. The configuration of this figure will be described. The data processing device of this figure includes a resistor 11 for limiting an inrush current and a buffer unit 12 for converting a high impedance into a low impedance.
And ADC (A
nalog-To-Digital Converter) 13, a measurement unit 1 including a measurement control unit 14 that starts up the ADC, controls the start-up cycle, and stores data in a memory, an input signal V, and correction data. The processing unit 2 that performs processing such as offset correction V = V−Vofs and span correction V = V × G for Vofs and G, and the data V output from the measurement unit 1 are stored for each sampling cycle. Correction data V in advance
a storage unit 3 that stores the ofs, G, etc., and outputs the input signal V, the correction data Vofs, G, etc. to the processing unit 2 each time a request is made;
The display unit 4 displays the processing data in the processing unit 2.

FIG. 3 is a diagram showing the main configuration of the data processing apparatus according to this embodiment. Although FIG. 2 shows the one-channel ADC 13 as data input, as shown in this figure, the measuring unit 1 may be an ADC 13 that inputs N-channel analog signals at different measurement points. A device for measuring periodic pulse width, phase difference, etc., equipped with a clock and timer for measurement, capturing the state transition of the input pulse, storing the transition occurrence time, storing the state and calculating the desired data Pulse processor 15 that can be obtained, and digital I / F (interface) 16 that also inputs a digital signal
2, an input I / F (interface) 21 for inputting an operation (offset, gain, etc.) of the data processing device, and a ROM (Read Only) for storing a program necessary for processing in the processing unit 2 shown in FIG. 2, for example. Memory) 22, a microprocessor 23 including at least the measurement control unit 14 and the processing unit 2 shown in FIG. 2, and a storage unit 3 shown in FIG. 2 at the time of calculation or control of the data processing device. RAM required for temporary storage (Random Acc
ess Memory) 23, an IC memory card 24 for storing measured data, and a personal computer,
Data is transferred by communication to an external data analysis device 30 that performs various analyzes based on the data stored in the IC memory card. RS232C I / F (interface)
25 and a monitor (LDC: Liquid Crystal Displa) for displaying data processed by the microprocessor 23.
y) 4 and a power supply 8 for supplying the necessary power to the data processing device.

When the input signal is a pulse signal, spike-like noise having a duration of a predetermined time or less is often superimposed. It is also possible to incorporate a digital filter in the pulse processor 15 in order to remove such spike noise. This digital filter has a characteristic of outputting only a pulse signal of which the duration is a preset time or more out of the input pulse signals and blocking the passage of the pulse signal of a predetermined time or less.

FIG. 4 is a diagram showing the structure of the IC card memory of FIG. The IC card memory 24 shown in the figure has, for example, an IM byte capacity, and has an address 0 in hexadecimal display.
The number of measurement channels, resolution,
A data formation area for storing data formats such as data type and record length, a measurement mode for storing measurement conditions such as sample period and measurement method in 00050-0009F, and a single card in the condition area 000A0-00FF AD input adjustment when there is only one type of adjustment data,
An adjustment data area in which correction data (Vofs, G, etc.) is stored, a head address memory area in 000100 to 007FF, and a data area in 00800 to FFFFF are included.

FIG. 5 shows 1 in the data area of FIG.
It is a figure which shows the content of the measurement data of one time. As shown in this figure, a header indicating the beginning of the data as a data format, an error code for inserting an error during measurement is written in one measurement data, and the adjustment data is written for each adjustment, and one record is recorded. a _1, a _2, as a to example analog signal _{..., a n, D 1,} D 2 as a digital _{signal, ...,} D _n, P as a pulse signal processors
_1, P _2, ... _, P _n are written for high frequency every 1 msec.

Next, a series of operations of this embodiment will be described. FIG. 6 is a flow chart for explaining a series of operations of this embodiment. As shown in this figure, the IC memory card 24 is initialized (step 1). While monitoring the measurement data (step 2), the measurement conditions such as the number of measurement channels, resolution, data type, record length, sample period (for example, 1 msec), measurement method, AD input adjustment are set (step 3). Further, the input level described later is adjusted (step 4). When the measurement is started (step 5), data measurement is performed with a sampling cycle of, for example, about 1 msec (step 6), and the data is stored in the data area of the IC memory card 24 for each measurement (step 7). A correction request is made, for example, about every 100 msec (step 8), the offset Vofs is called from the storage unit 3 between the measurements, and the gate G is called to calculate V = V-Vofs (step 9), and V =
The V × G calculation process (step 10) is performed, and the display unit 4
Is displayed on the screen, and the processing status of the data logger is monitored (step 11). It should be noted that the input value that is not corrected for display may be confirmed in the above-described cycle. This data measurement, correction processing, and display are repeated (step 1
2). In this way, the data processing device can collect data in a short sampling period and improve the accuracy of high frequency signal processing. The data stored in the IC memory card 24 is R
Since the data processing device is separated from the data analysis device 30 by being transferred to the data analysis device 30 via the S232C I / F 25 for analysis processing, the data processing device can be downsized and the place of use can be restricted. Becomes smaller.

When noise is removed from the pulse signal by a digital filter, the pulse signal is stored in the IC memory card 24 with a predetermined time axis delayed. Therefore, the processing of step 9 and step 10 is processing for advancing the pulse signal stored in the IC memory card 24 for a predetermined time so as to match the time axis with other signals.

FIG. 7 is a flow chart for explaining the input level adjustment (step 4) in FIG. As shown in the figure, in the adjustment of the input level, the current setting state including the display of the measured value is displayed (step 41). Next, an input switch (not shown) gives an operation instruction through the input I / F 21 to select an input channel (step 42), select an adjustment item (step 43), and adjust the offset for each measuring instrument (step 42). In step 44), the adjusted offset Vofs is stored in the IC memory card 24. The gain is further adjusted (step 46), and the adjusted gain is stored in the IC memory card 24 (step 4).
7). These adjustments are made for all channels (step 48).

Thus, the correction data (Vof
(s, G, etc.) are stored at the same time as the measurement data, data analysis is easily performed using these correction data.

[0024]

As described above, according to the present invention, the measurement data is stored together with the correction data for each measurement, and after the measurement, the stored measurement data is corrected by the stored correction data. Will be possible. Further, when the input signal is a pulse, spike-like noise included in the input signal is removed, and a time axis shift due to the noise removal processing is corrected.

[Brief description of drawings]

FIG. 1 is a diagram showing a principle configuration of the present invention.

FIG. 2 is a diagram showing a data processing device according to an embodiment of the present invention.

FIG. 3 is a diagram showing a configuration of a data processing device according to the present embodiment.

FIG. 4 is a diagram showing a structure of the IC memory card of FIG.

5 is a diagram showing the contents of one measurement data in the data area of FIG.

FIG. 6 is a flowchart illustrating a series of operations of this embodiment.

FIG. 7 is a flowchart illustrating adjustment of the input level of FIG.

FIG. 8 is a diagram showing a first conventional data processing device.

FIG. 9 is a diagram showing a second conventional data processing device.

FIG. 10 is a diagram showing a third conventional data processing device.

[Explanation of symbols]

1 ... Measuring unit 2 ... Processing unit 3 ... Storage unit

Claims (2)

[Claims] 1. A data processing device comprising a measuring unit (1) for measuring data and a processing unit (2) for correcting the measured data and processing it into a desired signal. A data processing device, comprising: a storage unit (3) for storing together with the storage unit, wherein the processing unit (2) corrects the stored measurement data in the storage unit (3) with storage correction data after measurement. 2. The measuring unit (1) includes a digital filter capable of setting a time width for removing spike-like noise included in a pulse signal which is measurement data, and the correction process includes The data processing device according to claim 1, wherein the time axis of the measured pulse signal is advanced by a time width set in the digital filter.