JPH05110901A - Picture quality improving device - Google Patents

Abstract

PURPOSE:To naturally execute edge emphasis without giving the sense of incompatibility to observers and to obtain the device easily turned into a digital circuit by exactly applying a waveform step to the midpoint of the inclined part of an input signal. CONSTITUTION:An input signal S1, output signal S2 of a delay circuit 1 and output signal S3 of a delay circuit 2 are supplied to a signal selecting circuit 7. A control signal Sc is obtained from the signals S1-S3 by subtracters 3-5 and a control signal forming circuit 6 and corresponding to this control signal Sc, the signal selecting circuit 7 selectively outputs one of the three supplied signals S1-S3. Then, an edge-emphasized output signal So is obtained. This output waveform So is exactly edge-emphasized by sharply inclining a waveform inclining part by applying the waveform step to the almost midpoint of the waveform change part (edge part) of the input waveform S1. Therefore, a contour-corrected image can be obtained by reproducing the output signal So, and the edge emphasis processing does not exceed the amplitude of the source signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION This invention relates to a television (TV).
The present invention relates to an image quality improving device suitable for various video devices such as a receiver, a video tape recorder (VTR), a printer, and various image processing devices that handle image data. Further, the present invention particularly provides edge enhancement in a natural form without giving discomfort to a viewer, can improve the sharpness and resolution of a reproduced image, and provides an image quality improving device suitable for digital circuitization. Has a purpose.

[0002]

2. Description of the Related Art Conventionally, in the contour correction used for improving the image quality, the contour correction component is obtained by quadratic differential processing,
This correction component is added to the original signal in an appropriate amount. In this method, the secondary differential waveform, which is the contour correction component, has a peak considerably outside the midpoint of the waveform change portion (edge portion) of the original signal. Therefore, if this secondary differential waveform is added to the original signal, preshoot or overshoot may occur, resulting in unnatural contour correction such as white or black edging on the edge of the reproduced image. was there.

[0003]

The problem to be solved by the present invention is to pre-shoot or overshoot by edge enhancement by adding a waveform step at the midpoint position of the waveform change portion (edge portion) of the original signal. To prevent unnatural contour correction due to shooting, improve the sharpness and resolution in a natural manner without giving discomfort to the viewer, and to provide an image quality improvement device suitable for digital circuits. , What kind of measures should be taken?

[0004]

In order to solve the above problems, the present invention provides a second signal obtained by delaying a first signal, which is an input signal, by a predetermined time, and the second signal by the predetermined signal. A delay circuit that outputs a time-delayed third signal,
A fourth signal obtained by subtracting the second signal from the first signal
A first subtractor for outputting a signal, a second subtractor for outputting a fifth signal obtained by subtracting the third signal from the second signal, and a fourth subtractor for outputting the fifth signal. A third subtractor that outputs a sixth signal obtained by subtracting the fifth signal, and the fourth, fifth, and sixth signals are supplied, and the fourth, fifth, and sixth A control signal forming circuit that outputs a seventh signal that is a control signal, which changes according to the combination of the polarities of the signals, and the first, second, third, and seventh signals are supplied and controlled. A signal selection circuit that selects and outputs one of the first, second, and third signals in accordance with the seventh signal that is a signal, When the values of the fourth, fifth, and sixth signals have the same polarity values that are simultaneously positive or negative at the same time, the third signal is output, and The values of the 4th and 5th signals are the same polarity values that are positive or negative at the same time, and the value of the 6th signal is of a polarity different from the polarities of the values of the 4th and 5th signals. When the value is a value, the first signal is output, and when the combination of the values of the fourth, fifth, and sixth signals is a combination other than the above, the second signal is output. ,
It is an object of the present invention to provide an image quality improving apparatus, which obtains an output signal in which an edge of the first signal which is the input signal is emphasized.

[0005]

FIG. 1 shows an embodiment of the image quality improving apparatus of the present invention. 2 is a diagram showing the characteristics of the subtractor, FIG. 3 is a diagram showing a concrete configuration example of the control signal forming circuit and the signal selecting circuit, and FIG. 4 is an operation explanatory diagram of the embodiment shown in FIG. ..
In FIG. 4, the steps of the corrugated slope are exaggerated for the sake of clarity. Further, even when a digital circuit is taken as a specific circuit example, the signal waveform of the circuit is shown as an analog waveform in FIG. 4 in order to make the description of the operation easy to understand. In FIG. 1, 1
And 2 are delay circuits having the same delay time, 3 to 5 are subtractors, 6 is a control signal forming circuit, and 7 is a signal selecting circuit. For convenience of explanation, a signal delay due to the processing time of each circuit itself, and a delay circuit or the like normally used only for correcting the delay will be omitted. Input signals handled by this image quality improvement device are various video signals,
A luminance signal, an RGB signal, etc. can be considered. First, line L
A case will be described in which the input signal S1 coming from 1 is a signal having a bar pulse waveform as shown in FIG.
This signal is an example of a waveform of the luminance signal of the TV video signal,
It is assumed that frequency components are band-limited up to the upper limit frequency of 4 MHz. The input signal S1 is supplied to the delay circuit 1. The delay time T of the delay circuit 1 is

[0006]

[Equation 1]

[0007] The value of the delay time T is a value set on the basis of a sampling frequency fs (fs = 4fsc) normally used when the TV video signal is quantized and signal processing is performed in a digital system. It is consistent with the conversion cycle. If the frequency component of the TV video signal is band limited to 4MHz, the impulse response of the following equation obtained from the ideal characteristics,

[0008]

[Equation 2]

From the full width at half maximum of (about 150.8 ns), the delay time T
The value of

[0010]

[Equation 3]

That is, the object of the present invention is achieved by setting the value to 1/2 or less of the half width. With delay circuit 1,
The output signal S2 delayed by the time T is shown in FIG.
The delay circuit 2 at the next stage is a circuit having the same function as the delay circuit 1, and outputs the signal S3 (see FIG. 4C) obtained by further delaying the supplied signal S2 by the time T. The subtractor 3 subtracts the output signal S2 of the delay circuit 1 from the input signal S1 and outputs a signal S4 shown in the following equation.

[0012]

[Equation 4]

The subtractor 4 has the same function as the subtractor 3, and subtracts the output signal S3 of the delay circuit 2 from the output signal S2 of the delay circuit 1 and outputs a signal S5 shown in the following equation.

[0014]

[Equation 5]

The subtractor 5 also has the same function as the subtractor 3, and the output signal S4 of the subtractor 3 to the output signal S of the subtractor 4 is also included.
5 is subtracted, and the signal S6 shown in the following equation is output.

[0016]

[Equation 6]

The impulse responses of the subtractors 3-5 are shown in FIG.
It shows in (a)-(d). The impulse response waveform shown is
The relative time relationship of each signal is shown, and the origin of t = 0 is defined with reference to the signal S2 and displayed. Figure 2
2A is represented by the equation (4), FIG. 2B is represented by the equation (5), and FIG.
(C) corresponds to equation (6), respectively. Figure 2 (d)
Corresponds to the following Expression (7) obtained by substituting Expression (4) and Expression (5) into Expression (6).

[0018]

[Equation 7]

2 (e) and 2 (f) are shown in FIGS.
The imaginary part I (f) and the real part R (f) of the frequency response obtained by Fourier transforming the impulse response shown in (d) are respectively shown. 2 in FIGS. 2E and 2F correspond to the frequency responses in FIGS. 2A to 2D, respectively.

[0020]

[Equation 8]

The above equation (8) and FIGS. 2 (e) and 2 (f).
Indicates that the subtractors 3, 4, and 5 operate as a high-pass filter that is orthogonal to the signal S2. However, the operation timing of the subtracters 3 and 4 is T /
It is shifting back and forth by 2. Furthermore, equation (8) and
2 (e) and 2 (f), if the respective operations of the subtracters 3, 4, and 5 are integrated, the subtractors 3, 4, and 5 work as a common-mode high-pass filter for the signal S2. It means that there is. The control signal forming circuit 6 in the next stage includes subtractors 3, 4, 5
The respective output signals S4, S5, S6 of are supplied. And
The control signal forming circuit 6 forms the control signal Sc in accordance with the combination of the polarities of the signals S4, S5 and S6. The control signal Sc is the three signals Sc1, Sc2, Sc3 shown in the following equation (9).
Is a low active (negative logic) logic signal. Waveform diagrams of the signals Sc1, Sc2, Sc3 are shown in FIG.
Shown in (i) and (g).

[0022]

[Equation 9]

As described above, when the values of the signals S4, S5 and S6 are both positive or negative and have the same polarity, the signal Sc3 is 0.
(Low), the values of the signals S4 and S5 are both positive or negative and have the same polarity, and the value of the signal S6 is the signal S.
4, the signal Sc1 is 0 (Lo) when the polarity is different from that of S4.
w), and when the combinations of the values of the signals S4, S5, S6 are combinations other than the above, the signal Sc2 becomes 0 (Low).

A circuit example for realizing the control signal forming circuit 6 is shown in FIG. In FIG. 3A, the converters 3-1 to 3-1
3-3 converts the signals S4 to S6 into 1 when it is positive, 0 when it is zero, and -1 when it is negative, and outputs it as a 2-bit signal in 2's complement notation. The conversion table of each converter is shown in Table 1, and 2bi in 2's complement notation of the signals S4 to S6.
The t-converted signals are shown in the following equations (10).

[0025]

[Table 1]

[0026]

[Equation 10]

The converters 3-1 to 3-3 are TTL-ICs.
And a table look-up method such as ROM, and PLA (Programmable Logic Array)
Etc. can also be realized. The output of the three converters is the AND circuit 3
-4 to 3-8, the OR circuits 3-9 and 3-10, the NAND circuits 3-11 and 3-13, and the NOR circuit 3-12, the control signals Sc1, Sc2, and Sc3 shown in the following equation are obtained.

[0028]

[Equation 11]

In FIG. 3A, each signal name Sc1,
Although Sc2 and Sc3 are described as mere names, in the above formula (11), in order to clarify the purpose and operation of the signal, a low active (negative logic) logical formula (that is, a bar is added) is used. Then, each signal is shown. The aforementioned signal S4
Since S5 and S6 are output signals of the subtractor that functions as a high-pass filter, there is a danger that they generally contain a lot of high-frequency noise components. In order to improve the performance of the control signal forming circuit 6 with respect to such noise components, the converter 3-1
The reference value in 3-3 is a positive value β which is not 0 but is small.
Set to (a value close to the level of the high frequency noise component). Then, the comparators 3-1 to 3-3 convert the signals S4 to S6 into 1 when larger than β, 0 when −β or more and β or less, and −1 when smaller than −β, The signal is output as a 2-bit signal in 2's complement display. By setting this reference value β,
The noise resistance performance of the control signal forming circuit 6 is improved. Referring back to FIG. 1, the control signal Sc (signals Sc1, Sc2, Sc
3) and the signals S1, S2, S3 are supplied to the signal selection circuit 7 in the next stage. The signal selection circuit 7 selectively outputs one of the signals S1, S2 and S3 according to the control signal Sc. The output So of the signal selection circuit 7 is given by the following equation (12).
It will be as shown in.

[0030]

[Equation 12]

That is, the signal selection circuit 7 selectively outputs the signal S1 when the control signal Sc1 is 0 (Low), selectively outputs the signal S2 when the control signal Sc2 is 0 (Low), and outputs the control signal Sc3. Is 0 (Low), the signal S3 is selectively output.

A circuit example for realizing the signal selection circuit 7 is shown in FIG.
It shows in (c). Blocks 3-14, 3-15, 3-16
Is a switch circuit. Each switch circuit 3-14 to 3-
Signals S1 to S3 are supplied to 16 respectively, and when one of the control signals Sc1 to Sc3 is 0 (Low), the switch circuit to which the control signal is supplied is turned on, and Any one of them is output from the common output terminal. Each switch circuit 3-14 to 3-16
Are circuits having the same configuration. In FIG. 3B, the switch circuit 3-14 is shown as a representative as a specific circuit example of the switch circuits 3-14 to 3-16. Signals S1 and So are 8b
It, 2's complement display. Block 3-20 ~
A buffer circuit 3-27 is provided with a control terminal, and the control signal Sc1 is supplied to the common control terminal. When the control signal Sc1 is 0 (Low), the input signal S
1, that is, S10 (LSB) to S17 (MSB) is directly output So (that is, S00 (LSB) to S07 (MSB)).
Is output as. When the control signal Sc1 is 1 (High), the output is in the tristate or high impedance state. The output signal So (output of this image quality improving device) of the signal selection circuit 7 obtained in this way has a waveform shown in FIG. 4 (j).

Comparing this output waveform So with the input waveform S1, the output waveform So has a waveform step added at approximately the midpoint of the waveform change portion (edge portion) of the input waveform S1, and the inclination of the waveform inclination portion is steep. It can be seen that the waveform has a properly edge-enhanced waveform. By reproducing the output signal So, a contour-corrected image can be obtained. Further, as can be seen from the output waveform So shown in FIG. 4 (j), the edge enhancement processing of this image quality improving apparatus is performed on an edge exceeding the amplitude of the original signal such as preshoot and overshoot as in the conventional contour correction. It is not the enhancement process but the edge enhancement process within the amplitude of the original signal. Therefore, even if a device incorporating this image quality improving device is configured with a digital circuit, the overflow problem does not occur, and the device can perform good image quality improvement. Thus, the signal So output from the line L2
As a result of the edge enhancement, a new sideband component is formed, resulting in a signal to which a spectrum exceeding the band originally possessed by the input signal S1 is newly added. The addition of this new spectrum equivalently gives the viewer the impression that the resolution of the original signal has improved, and serves to improve the sharpness of the image.

Here, the steepness of the edge portion of the signal So (the degree of edge enhancement) depends on the frequency characteristic of the edge portion of the original signal before the edge enhancement. The rising part and the falling part (edge part) of the original signal are shown in FIG.
As shown in (k), if the slope is steeper, edge enhancement with a strong degree as shown in (l) of FIG.
On the other hand, as shown in FIG.
Edge enhancement with a weak degree is performed as shown in FIG. As described above, since the degree of edge enhancement processing depends on the frequency of the input signal and has a perfect correlation with the input signal, this image quality improving device does not give a sense of discomfort to the viewer and gives a natural shape. Thus, the sharpness and resolution can be improved.

Further, the illustrated embodiment uses a low-cost subtractor with a circuit configuration simpler than those filters without using an expensive quadrature high-pass filter and in-phase high-pass filter with a complicated circuit configuration. The control signal Sc can be formed, and a signal with a proper edge emphasis is obtained. Therefore, the previous patent application by the present inventor (filed on February 27, 1991, reference number H03000
046), the cost of the entire device can be reduced.

In the above embodiment, the luminance signal band-limited to the upper limit frequency of 4 MHz is used as the input signal.
The image quality improving device of the present invention can handle video signals and image signals of all baseband systems such as RGB signals.
The image quality improving device is also suitable for an image processing device that handles CG (computer graphics) images and natural images. Particularly, for digitalized image data, contour correction processing and edge enhancement processing equivalent to the present invention are performed.
It can also be realized by software processing using a computer, and the present invention can also be applied to processing of image data by software. Furthermore, the present invention is also effective in improving the deterioration of the eye pattern caused by the waveform distortion of the digital transmission system.

[0037]

As described above, the image quality improving device of the present invention has the following effects. (A) Edge enhancement is performed by appropriately adding a waveform step to the midpoint of the slope of the input signal, and as a result, an output signal to which a frequency component outside the frequency band of the input signal is added can be obtained. The contour correction of the reproduced image can be performed. (B) It is an edge enhancement process within the amplitude of the original signal rather than the edge enhancement over the amplitude of the original signal such as preshoot and overshoot as in the conventional contour correction. Therefore,
Even if a device incorporating this image quality improving device is configured by a digital circuit, the overflow problem does not occur, and the device can perform good image quality improvement. (C) Since the degree of edge enhancement for an input signal depends on the frequency of the input signal and has a perfect correlation with the input signal, this image quality improving device does not give a feeling of discomfort to the viewer and gives a natural image The shape can improve sharpness and resolution. (D) Since the control signal Sc can be formed by a low-cost subtractor with a simple circuit configuration without using a filter having a complicated circuit configuration, the cost of the entire device can be reduced. (E) Since each constituent element of the present invention can be configured by combining conventional circuits, the image quality improving apparatus of the present invention can be easily manufactured and has a wide range of applications.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment.

FIG. 2 is a diagram showing characteristics of a subtractor.

FIG. 3 is a diagram showing a specific configuration example of a control signal forming circuit and a signal selecting circuit.

FIG. 4 is an operation explanatory diagram of the embodiment shown in FIG.

[Explanation of symbols]

 1, 2 Delay circuit 3, 4, 5 Subtractor 6 Control signal formation circuit 7 Signal selection circuit

─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] February 12, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] 0027

[Correction method] Change

[Correction content]

The converters 3-1 to 3-3 are TTL-ICs.
And a table look-up method using a ROM or the like, and PLA (Programmable
It can also be realized by a Logic Array) or the like. The outputs of the three converters are the AND circuits 3-4 to 3-8 and the OR circuit 3-.
9, 3-10, NAND circuits 3-11, 3-12, 3-
13 through control signals Sc1, Sc2, Sc
It becomes 3.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0028

[Correction method] Change

[Correction content]

[0028]

[Equation 11]

[Procedure 3]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 3

[Correction method] Change

[Correction content]

[Figure 3]

Claims (1)

[Claims] 1. A delay circuit for outputting a second signal obtained by delaying a first signal as an input signal for a predetermined time, and a third signal obtained by delaying the second signal for the predetermined time, A fourth signal obtained by subtracting the second signal from the first signal
A first subtractor for outputting the signal of No. 5, and a fifth subtracter obtained by subtracting the third signal from the second signal.
A second subtractor for outputting the signal of No. 6, and a sixth subtracter obtained by subtracting the fifth signal from the fourth signal.
And a fourth subtractor for outputting the signal, and the fourth, fifth, and sixth signals are supplied, and change according to a combination of polarities of the fourth, fifth, and sixth signals. A control signal forming circuit that outputs a seventh signal that is a control signal, and the first, second, third, and seventh signals are supplied, and according to the seventh signal that is a control signal, And a signal selection circuit that selects and outputs one of the first, second, and third signals, and the signal selection circuit includes three of the fourth, fifth, and sixth signals. When the values of the signals are the same polarity values that are simultaneously positive or simultaneously negative, the third signal is output, and the values of the fourth and fifth signals are the same polarity values that are simultaneously positive or simultaneously negative. And the value of the sixth signal has a polarity value different from the polarities of the values of the fourth and fifth signals, the first signal When the combination of the values of the fourth, fifth, and sixth signals is a combination other than the above, the second signal is output, and the second signal that is the input signal is output. An image quality improving apparatus, wherein an output signal in which an edge of the signal No. 1 is emphasized is obtained.