JPH0511000A - Active matrix array inspection device - Google Patents

Abstract

PURPOSE:To enable inspecting surely and rapidly without hurting the element surface. CONSTITUTION:A gate signal generator means 17 and a source signal generator means 18 are planned to generate a constant voltage signal and square wave signal of a constant voltage and variable period. The gate signal lines, X1, Xn+1 of the inspected active matrix array 11 are connected selectively to either of the output terminals, the open terminals or the ground terminals of the gate signal generation means 17 through the selective switches S11 to S1n+1. The source signal lines, Y1, Yn+1 of the inspected active matrix array 11 are connected selectively to either of the output terminals, the open terminals or the ground terminals of the source signal generation means 18 through the selective switches S21 to S2n. A non-touch optical probe 21 receives an incident laser beam at the drain of thin film transistor or a picture element electrode connector, receives the reflector light beam with corresponding reflection ratio to the charge density at the incidence point and detects the electric state at the incidence point based on the intensity thereof.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix array inspecting device used in an active matrix array type liquid crystal display device and driving pixel electrodes through thin film transistors arranged in rows and columns.

[0002]

2. Description of the Related Art In recent years, the number of scanning lines has increased due to the increase in the number of picture elements associated with the increase in size and definition of liquid crystal display devices, and the display contrast and response speed of conventional simple matrix display devices have decreased. Therefore, an active matrix type liquid crystal display device in which a switching element is arranged in each picture element is being used. However, in the active matrix array used in the active matrix type liquid crystal display device, it is necessary to form tens of thousands of thin film transistors including thin film transistors as switching elements and thin film circuits on one substrate. Therefore, manufacturing an active matrix array entirely without defects requires a very high technology. In the current technology, it is necessary to inspect the quality of the active matrix array, judge the quality, detect the defect, and correct the defective portion.

FIG. 11 shows an active matrix array used in an active matrix type liquid crystal display device.
A plurality of gate signal lines X _{1 to} X _{m + 1} and a plurality of source signal lines Y _{1 to} Y _n orthogonal to these gate signal lines are provided, and thin film transistors T _{11 to} T _mn are provided at intersections thereof, and each of them is provided. the drain electrode of the thin film transistor is connected to the picture element electrode P ₁₁ to P _mn respectively, further the pixel electrode P ₁₁ to P
_The gate signal lines X _{2 to} X _{m + 1} are connected to _mn through auxiliary capacitors C ₁₁ to C _mn , respectively.

When the short-circuit defect 12 occurs between the gate and the drain like the thin film transistor T ₂₁ , when the liquid crystal display device is constructed, the display state of the picture elements connected to them becomes abnormal, resulting in a line defect in the display characteristics. Therefore, the display quality is remarkably reduced. Further, when a gate-drain short-circuit or a source-drain short-circuit defect 13 like the thin film transistor T ₁₂ occurs, the display state of the picture element becomes abnormal due to this short circuit in a liquid crystal display device. It becomes a defect and becomes a factor of deteriorating the display quality like the line defect. Therefore, it is important to detect the above-mentioned line defect and point defect and correct the defect.

Therefore, in the past, active mats have been used.
The Lix Array was inspected as follows. Gate
Signal line X₁~ X_{m + 1}Is the switch S₁₁~ S_{1m + 1}To
Connected to the resistance measuring means 14 through the source signal line Y₁
~ Y_nIs the switch S _{twenty one}~ S_2nResistance measurement through
Connected to the means 14. Test probe positioning means 1
5, the test probe 16 is positioned and any picture element is
The test probe 16 can be positioned on the electrode
It In addition, the resistance value measuring means 14 also works with the test probe 16.
Connected and any gate signal line or source signal
Line and the drain terminal of any thin film transistor.
The resistance value between the pixel electrode and
It Hereinafter, the same symbols and the same numbers have the same configurations.

Conventionally, the transistor T₁₁The gate of
・ To inspect for defects between drains, source signal line Y₁of
Switch S_{twenty one}Gate signal line X₁Su
Itch S₁₁Close. Next, test probe positioning hand
Step 15 is a thin film transistor T ₁₁Connected to the drain terminal of
Picture element electrode P₁₁Position test probe 16 on
To do. Next, the resistance value measuring means 14 is a thin film transistor element.
T₁₁Measure the resistance between the gate and drain of. Measured
The defect can be detected from the resistance value obtained. The same
Thin film transistor T_{twenty one}For the gate signal line X₁of
Switch S₁₁Open the gate signal line X₂Switch S
₁₂And close the test probe 16 to the thin film transistor T_{twenty one}
Picture element electrode P connected to the drain terminal of₁₂Positioned in
The resistance value measuring means 14_{twenty one}
The operation of measuring the resistance value between the gate and drain of
Just repeat. Thin film transistor T_m1End up
Then the source signal line Y₂Switch S_{twenty two}Open and thin
Membrane transistor T₁₂~ T_m2The same operation as above
Return, resistance between gate and drain of each transistor
Just measure the value. Thin film transistor
T_mnYou just have to repeat.

Next, a method for detecting a source-drain defect
Will be described. In this case, first the gate signal line X₁of
Switch S₁₁Source signal line Y₁Su
Itch S_{twenty one}Close. Next, test probe positioning hand
Step 15 is a thin film transistor T ₁₁Connected to the drain terminal of
Picture element electrode P₁₁Position test probe 16 on
To do. After that, the resistance value measuring means 14 causes the thin film transistor T
₁₁Measure the resistance value between the source and drain of. Measured
It is possible to detect a defect from the resistance value. In the same way
Thin film transistor T_{twenty one}For the gate signal line X₂Su
Itch S₁₂The test probe 16 with a thin film transistor.
Dista T_{twenty one}Pixel electrode P connected to the drain terminal of_{twenty one}To
Position and its transistor T_{twenty one}Source / drain
It suffices to repeat the operation of measuring the inter-resistance value. Thin
Membrane transistor T_m1When the resistance value measurement is completed up to
Gini source signal line Y₁Switch S₁₂Open the sauce
Signal line Y₂Switch S_{twenty two}Close this time thin film transistor
T₁₂Again, repeat the same operation as above, and change the resistance value.
Just measure. The above operation is performed by the thin film transistor T
_mnIt is good to repeat until.

[0008]

However, since the test probe 16 is used in the above structure, it is necessary to directly contact the test probe 16 with the drain or the pixel electrode connected to the drain terminal of the thin film transistor, and thus the device surface. May be damaged. In addition, defect detection due to poor contact of the test probe 16 is likely to occur. In addition, it is necessary to detect a defect while moving the test probe 16, and since all the mechanical positioning is performed, there is a problem that a huge amount of time is required for the positioning.

In view of the above problems, an object of the present invention is to provide an active matrix array inspecting apparatus which can easily detect a defect detection of an active matrix array in a non-contact manner.

[0010]

According to the present invention, a gate signal generating means and a source signal generating means are provided, and each gate signal line of the active matrix array to be inspected is gated by the gate signal line selecting means. The output terminal of the generation means, the open terminal, and the ground terminal are switched and connected, and each source signal line is connected to the output terminal of the source signal generation means by the source signal line selection means, the open terminal, and the ground terminal. Is switched and connected.
The electrical state of the drain terminal of the thin film transistor connected to the gate signal line and the source signal line is detected by the non-contact probe in a non-contact manner. The detection output determines whether the thin film transistor is good or bad.

According to the second aspect of the present invention, the gate signal generating means is connected through the gate switch to the gate signal line short ring that short-circuits the gate signal lines in the active matrix array, and the source signal lines are short-circuited. The source signal generating means is connected to the short ring for the source signal line through the switch for the source. The non-contact probe and the judging means are used in the same manner as in the invention of claim 1.

According to a third aspect of the present invention, there is provided an inspection device for an active matrix array having a drive circuit built therein.
A signal capable of operating the built-in vertical shift register to sequentially drive the gate signal lines is generated from the gate signal generation means, and the source signal is operated by operating the built-in horizontal shift register and the source line drive circuit. A signal is generated that can drive the lines sequentially. The gate signal generating means is connected to the vertical shift register by the gate switch means, and the source signal generating means is connected to the horizontal shift register and the source line drive circuit by the source switch means. The non-contact probe and the judging means are used in the same manner as in the invention of claim 1.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of the invention of claim 1, and FIG.
The same reference numerals are given to the portions corresponding to 1. In the present invention, a gate signal generating means 17 and a source signal generating means 18 are provided. The gate signal line selecting means 19, that is, the switches S _{11 to} S _{1m + 1} , respectively, controls the gate signal lines X _{1 to} X.
_{m + 1} is an open terminal, an output terminal of the gate signal generating means 17,
Is selectively connected to one of the ground terminal, a source signal line selecting means 20, i.e. the switch S ₂₁ to S source signal lines Y ₁ to Y _n are each open terminal by _2n, the output terminal of the source signal generator 18, a ground Selectively connected to any of the terminals. The gate signal generating means 17 and the source signal generating means 18 are capable of generating a constant voltage signal or a square wave voltage signal having a constant amplitude, and changing the period of the square wave voltage signal.

A non-contact probe 21 for detecting the electrical state of the drain terminal of any thin film transistor in a non-contact manner is provided. A case where a charge optical probe is used as an example of the non-contact probe 21 will be described. Charge optical probe 2
1, the laser light beam 23i from the laser light source 22 is reflected by the reflecting mirror 24 as shown in FIG.
5, the light is further condensed by the condenser lens 26 and is incident on the active matrix array 11. The active matrix array 11 is mounted on the XY stage 27. From the control unit (control function) 29 of the processing control device 28 including an electronic computer to the XY stage 27 and the optical deflector 2
5 are controlled to set the incident position of the light beam 23i in the XY plane within the active matrix array 11.

The wavelength of the laser beam 23i is selected so as not to generate electron-hole pairs in the thin film transistor, and the refractive index of the semiconductor has a value corresponding to the charge density in the semiconductor. The intensity of the reflected light beam 23r from the active matrix array 11 corresponds to the refractive index of the incident point, that is, the reflectance, and thus the charge density at that point, that is, the electrical state (voltage or the like).
The reflected light beam 23r is condensed by the condenser lens 26, reflected by the reflecting mirror 31, received by the light receiver 32, and converted into an electric signal. The control unit 29 generates each signal of the gate signal generating means 17 and the source signal generating means 18, its voltage value,
The cycle is controlled, and the gate signal line selecting means 19 and the source signal line selecting means 20 are selectively controlled.

The information processing unit (information processing function) 33 detects the electrical state of the output electric signal of the light receiver 32 at the incident point of the light beam 23i by referring to the applied gate signal and the source signal, and the thin film transistor (picture The degree of non-defectiveness / defectiveness of the raw material is determined, and when it is determined to be defective, the determination result is displayed on the display 34 together with the defective portion. The determination result or electrical information is stored in the storage unit 3 as necessary.
It stores in 5 together with incident position information.

Next, the detection of various defects will be specifically described. First, the gate-drain short-circuit defect will be described. Figure 3 is a block diagram for explaining detection of a gate-drain short-circuit defects, the thin film transistor T ₁₂
A short circuit 12 between the gate and the drain has occurred. The gate signal line X ₁ and the gate signal generating means 17 are connected only by the switch S ₁₁ , and a high level signal of an appropriate magnitude enough to turn on the thin film transistor is generated by the gate signal generating means 1
7 is applied to the gate signal line X ₁ . All the gate signal lines other than the gate signal line X ₁ are connected to the ground by the switches other than the switch S _{11 of the} gate signal line selection means 19, and all the switches of the source signal line selection means 20 are connected to the open terminals. , All source signal lines Y _{1 to} Y
_n is open. If there is no defect in the thin film transistor, the drain terminal D _{1i of the} thin film transistor T _1i (i is an integer from 1 to n, and so on) connected to the gate signal line X ₁ and the pixel electrode connected to the drain terminal P _1i is kept at the ground potential. However, since the thin film transistor T ₁₂ connected to the gate signal line X ₁ has the gate-drain short circuit 12, the drain terminal D ₁₂
Further, a signal is applied from the gate signal line X ₁ to the pixel electrode P ₁₂ connected to the drain terminal thereof and the pixel electrode P 12 through the short-circuit portion 12, and the pixel electrode P ₁₂ is brought to a high level state. By detecting the electrical state of the drain terminal D ₁₂ or the pixel electrode P _{12 in} the high level state by the non-contact probe 21, it can be seen that the thin film transistor T ₁₂ has a defect. The pixel electrode is usually made of ITO, which is also a kind of semiconductor, and in particular, the auxiliary capacitor is made of a semiconductor, and the state of drain potential can be detected from the charge density of the connection portion with the pixel electrode. .

Further, the thin film transistor T₁₂Defect status,
The following can be used to detect the degree of a round defect.
The defect state has a finite resistance value in the short-circuit defect portion.
If the resistance is very high, the thin film transistor
The transistor can operate normally, in the case of a complete short circuit
It becomes abnormal. However, from a few kilo-ohms to a mega-ohm
When the resistance is high, the display state of the picture element becomes somewhat abnormal. Near
As the number of point defects and line defects decreases,
It also detects short circuits, measures their status, and improves the process.
It is becoming necessary to go. Detect this defect condition
Switch S ₁₁The gate signal generating means 17 and
Signal line X₁And the switch S of the selection means 19
₁₁The gate signal line X by a switch other than₁All except
Connect all gate signal lines to ground. Also selection means
20 source switches for all source signal lines Y_j(J is 1
Source signal generating means 1
8 and turn on the transistor as shown in Figure 4A.
High level voltage and low level to turn off the transistor
The gate signal generator generates a gate signal that alternates with voltage.
Output from stage 17, and a constant voltage as shown in FIG. 4B.
The source signal of
It The period of the gate signal is T_P, Turn on the transistor
Time T_ONAnd If there is a short circuit defect as described above,
Time when gate is closed, that is, transistor is off
Time T_P-T_ONTo auxiliary capacitance C₁₂Short charge
It discharges through the junction 12. Therefore, the gate signal
Membrane transistor T₁₂Drain terminal D₁₂And its dray
Terminal D₁₂A pixel electrode P connected to₁₂The potential of
The bell and the low level are alternately repeated. However
Gate opening time T_ONLong or cycle T_PShorten
Therefore, the thin film transistor T₁₂Drain terminal D₁₂Well
Or a pixel electrode P connected to this₁₂Always high potential
Auxiliary capacitance C when the level is reached₁₂And short circuit 12
Depending on the time constant with the anti. Therefore thin film transistor
T₁₂Drain terminal D₁₂Or a picture attached to this
Elementary electrode P₁₂Non-contact probe 21 to detect the electrical state of
And then T _ONAnd T_PFrom the value of
You can know the falling state.

Next, detection of a source-drain short circuit will be described. FIG. 5 is a block diagram for explaining a source-drain short-circuit defect.
_A source-drain short-circuit portion 13 has occurred at ₁₂ . In FIG. 5, all the gate signal lines X _{1 to} X _{m + 1} are connected to the ground by the switch of the selection unit 19, and the selection unit 2
Consider a case where all the source signal lines Y _{1 to} Y _n are connected to the source signal generating means 18 by the switch of 0 and a high level signal having an appropriate magnitude other than zero is applied to the source signal lines. If all thin film transistors are not defective,
The electrical states of the drain terminals of all thin film transistors and the pixel electrodes connected to the drain terminals are in a low level state. However, a short circuit between the source and the drain 1 occurs in the thin film transistor T ₂₁ connected to the source signal line Y _2.
3 exists, the drain terminal D of the thin film transistor T _12
12 and the electrical state of the picture element electrode P ₁₂ connected thereto becomes a high state. The electrical state of the drain terminal of the thin film transistor T ₁₂ or the picture element electrode P ₁₂ connected to this in the high level state is determined by the non-contact probe 21.
It can be seen that the defect 13 has occurred in the thin film transistor T ₁₂ when detected by.

The defect state of the thin film transistor T ₁₂ can be detected as follows. In FIG. 5, the switch S ₁₁ is used to connect the gate signal line X ₁ and the gate signal generating means 17, and the gate signal lines other than the gate signal line X ₁ are grounded by the switch of the selecting means 19.
Further, all the source signal lines Y _{1 to} Y _n are connected to the source signal generating means 18 by the switch of the selecting means 20,
The gate signal as shown in C and the source signal as shown in FIG. 4D are synchronized from the gate signal generating means 17 and the source signal generating means 18, respectively, and a high level voltage and a low level voltage are alternately repeated. Generate each.
If the short-circuit defect 13 is present as described above, when the source signal voltage is at a low level, the charge stored in the auxiliary capacitance C ₁₂ will be discharged. Therefore, the potentials of the drain terminal D ₁₂ of the thin film transistor T ₁₂ and the pixel electrode P ₁₂ connected to the drain terminal D ₁₂ are in a state of repeating high level and low level. However, by shortening the long or period T _P time T _ON for turning on the transistors, to a high state at all times the potential of the picture element electrode P _12, which is connected to the drain terminal D ₁₂ and to the thin film transistor T ₁₂ Is possible. The non-contact probe 21 detects when this is always in a high level state,
The defect state can be known from the values of T _ON and T _P at that time.

Next, detection of a short circuit defect between the auxiliary capacitance and the gate signal line will be described. FIG. 6 is a block diagram for explaining detection of a short circuit defect between the auxiliary capacitance and the gate signal line,
Short circuit defect 36 between the auxiliary capacitance C ₁₁ and the gate signal line X _2.
Is occurring. In FIG. 6, the gate signal line X ₂ is connected to the gate signal generating means 17 by using the switch S _12, and a high level signal having an appropriate non-zero level is applied from the gate signal generating means 17 to the gate signal line X _2. To do. All the gate signal lines other than the gate signal line X ₂ are selected by the selecting means 19.
Consider a case in which the switch is used to ground to ground, and all the source signal lines are opened or grounded to ground using the switch of the selection means 20. If there is no short circuit defect, the potentials of the drain terminal of the thin film transistor and the pixel electrode connected thereto are in the low level state. But the potential of the drain terminal D ₁₁ and a picture element electrode P _11, which is connected to the thin film transistor T ₁₁ because there is a short circuit portion 36 becomes a high state. The drain terminal D ₁₁ or the drain terminal D ₁₁ of the thin film transistor T ₁₁ that has reached this high level
_By detecting the electrical state of the pixel electrode P ₁₁ connected to ₁₁ with the non-contact probe 21, it is possible to detect that a short circuit defect 36 has occurred between the auxiliary capacitance C ₁₁ and the gate signal line X ₂ .

Next, there is a short circuit defect between the auxiliary capacitance and the source signal line.
The detection will be described. Figure 7: Auxiliary capacitance / source signal line
It is a block diagram for explaining the detection of a short circuit defect,
Storage capacity C₁₁And source signal line Y₂Short-circuit defect between
are doing. In FIG. 7, the switch of the selection means 20 is used.
Source signal line Y₁~ Y_nAnd source signal means 18
To connect all source signals from the source signal generating means 18.
A high level signal of appropriate magnitude is applied to the signal line. Also
All gate signal lines X are switched using the switches of the selection means 19.
₁~ X_{m + 1}Consider the case of opening or grounding
It If there is no short circuit defect 37, the thin film transistor
The picture elements connected to the rain terminal and its drain terminal
The potential of the electrode is in the low level state. However, the short circuit part 37
Thin film transistor T₁₁Drain terminal D₁₁as well as
The pixel electrode P connected to this ₁₁Potential is high level
It becomes a state. This high level thin film transistor T₁₁
Drain terminal D₁₁Or a picture element connected to this
Pole P₁₁If the non-contact probe 21 detects the electrical state of
Auxiliary capacity C₁₁・ Source signal line Y₂Short circuit defect 37 occurs
It can detect that it is alive.

Next, the characteristics of a normal thin film transistor are inspected.
A method for performing the above will be described with reference to FIGS. 1 and 4. for example
Thin film transistor T₁₂To inspect the characteristics of
Touch S₁₁Gate signal line X₁The gate signal generator hand
Gate signal line X connected to stage 17₁All gates except
Connect the signal line to the ground using the switch of the selection means 19.
Ground And all the source signal lines are switched by the selection means 20.
Connected to the source signal generating means 18 using a switch, as shown in FIG.
Alternating high-level voltage and low-level voltage shown in
Gate signal line X that returns the gate signal₁The height shown in Figure 4D.
A saw that alternately repeats high-level voltage and low-level voltage
Applied to all source signal lines in synchronization with each other.
It Then the auxiliary capacitance C₁₂Is charged to the thin film transistor
Dista T ₁₂Drain terminal D₁₂And connected to this
Picture element electrode P₁₂Potential becomes high level. Next tiger
Time to turn on the register T_ONShorter or cycle T_PThe long
If it goes down, thin film transistor T₁₂Drain terminal D
₁₂And a pixel electrode P connected to this₁₂The potential of is
High level and low level alternate alternately depending on the
In this state, the thin film transistor T₁₂of
Drain terminal D₁₂Or drain terminal D₁₂Connected to
Picture element electrode P₁₂If non-contact probe 21 detects
Membrane transistor T₁₂The characteristics of can be inspected.

FIG. 8 shows an embodiment of the invention of claim 2. A
The active matrix array 11 is electrostatically destroyed during the manufacturing process.
As a measure to prevent breakage, the short rings 38 and 39 are placed around the substrate.
(The short rings 38 and 39 are
It has been removed when it was flannel). In such cases
It is necessary to carry out the inspection with the auto rings 38 and 39 attached.
It To this end, the gate signal line and source shown in FIG.
When inspecting the short circuit 12 with the electrode, as shown in FIG.
Switch signal generating means 17 to switch S₁Through the gate
Signal line X₁~ X_{m + 1}Connect to the short ring 38
Continue, switch S ₂To turn on the source signal line Y₁~ Y
_nThe short ring 39 that short-circuits the source signal generating means
18 to connect all gates from the gate signal generating means 17.
Signal line X₁~ X_{m + 1}Apply a high level signal to
All low-level signals from the signal generator 18
Signal line Y₁~ Y_nApply to. At this time, the pixel electrode
A bell is judged to be defective.

Source-drain short circuit 1 shown in FIG.
In order to detect 3, the low level signal is applied from the gate signal generating means 17 to all the gate signal lines X _{1 to} X _{m + 1} ,
A high level signal is applied from the source signal generating means 18 to all the source signal lines Y _{1 to} Y _n , and it is judged that a pixel electrode having a high level has a defect. When detecting the short circuit 36 between the auxiliary capacitance and the gate signal line shown in FIG. 6, all the gate signal lines X _{1 to} X _{m + 1} are set to the high level, all the source signals are set to the low level, and the pixel is set. A high level electrode is considered a defect. To detect the short circuit 37 between the auxiliary capacitance and the source signal line shown in FIG. 7, all the gate signal lines X ₁
~ X _{m + 1} is applied to the low level and all source signal lines Y ₁
The high level is applied to the to Y _n, as the picture element electrodes of the high level of the defect. Note that the defect 12 and the defect 36, and the defect 13 and the defect 37 cannot be distinguished from each other by the above-described inspection. If this distinction is required, another inspection is performed.

FIG. 9 shows an embodiment of the invention of claim 3. There is also one in which a drive circuit for driving a thin film transistor is built in a substrate of an active matrix array. That is, for example, as shown in FIG. 9, the vertical shift register 4 is formed on the substrate 41 on which the active matrix array 11 is formed.
2 are formed, and each shift stage has gate signal lines X _{1 to} X.
_{m + 1} are respectively connected, and first and second horizontal shift registers 43 and 44 are formed, and each shift stage of each of the first and second source line driving circuits 45 and 46 corresponds to the corresponding driving thin film transistor. The output side of each of the driving thin film transistors of the first and second source line driving circuits 45 and 46 connected to the gate is connected to every other _one of the source signal lines Y _{1 to} Y _n alternately corresponding thereto. A circuit 47 and a terminal 48 are provided so that a disconnection or a short circuit of the gate signal line can be inspected by a conventional contact inspection, and circuits 49 and 51 can be inspected for a disconnection or a short circuit of the source signal line.
And terminals 52 and 53 are provided.

As the gate signal generating means 54 shown in FIG.
The shift clocks φ _v and the inverted φ _{v, which are shown in FIG.}
And a start signal SP _v having a one-clock period width (1 bit) shown in FIG. 10C is generated and can be supplied to the corresponding input terminal of the vertical shift register 42 through the switch means S _v . Also, the source signal generating means 55
From which two shift clocks similar to those shown in FIGS. 10A, 10B, and 10C and a 1-bit activation signal are generated,
To the corresponding terminals of the second horizontal shift register 43, is it possible to supply through the switch means S _h1, S _h2, and a color image signal (a mere high-level signal) is generated, the switching means S _s1, Through S _s2 ,
The source line driving circuits 45 and 46 can be commonly supplied to the drains of the driving thin film transistors. In short, the gate signal generating means 54 uses the gate signal line X
A signal capable of sequentially driving the ₁ to X m + ₁ occur,
The source signal generating means 55 generates a signal which can sequentially drive the source signal line Y ₁ to Y _n.

In order to detect the defect 12 in FIG. 3, the switch signal S _h1 , S _h2 , S _s1 , S _s2 is opened and the source signal lines Y _{1 to} Y _n are opened or grounded. Then, the switch means S _v is closed by the gate signal generating means 54, and φ _v shown in FIGS.
The inverted φ _v and SP _V are given to the vertical shift register 42,
Signals shown in FIGS. 10D and 10E (...) are gate signal lines X.
Add to ₁ , X ₂ (... X _{m + 1} ). At this time, the pixel electrode having the defect 12 shows a potential change as shown in FIG. 10F, and the potential change of the pixel electrode in the normal state without the defect 12 is as shown in FIG. 10G. It is possible to determine normality or short circuit by monitoring the potential change of the pixel electrode in synchronization with the start pulse SP _v by the non-contact probe.

The settings for detecting the defect 13 in FIG. 5 are the same as those for detecting the defect 12. At this time, signals as shown in FIGS. 10D and 10E (...) Are applied to the gate signal lines X ₁ and X ₂ (... X _{m + 1} ). The pixel electrode having the defect 13 shows almost no potential change as shown in FIG. 10H. However, the potential change of the pixel electrode in the normal case where there is no defect 13 changes as shown in FIG. 10I. Depending on the difference between the two, it is possible to determine whether the defect 12 is normal or short-circuited by the same method as when detecting the defect 12.

The setting for detecting the defect 36 in FIG. 6 is the same as that for detecting the defect 12. At this time, signals as shown in FIGS. 10D and 10E (...) Are applied to the gate signal lines X ₁ and X ₂ (... X _{m + 1} ). The pixel electrode having the defect 36 exhibits a potential change as shown in FIG. 10J. The change in the potential of the pixel electrode when there is no defect 36 and is normal changes as shown in FIG. 10K. Depending on the difference between the two, it is possible to determine whether the defect 12 is normal or short-circuited by the same method as when detecting the defect 12. The defect 12 and the defect 36 are distinguished from each other by determining that the defect 12 is a defect 12 when the potential change of the defective pixel electrode has the same phase as the signal applied to the gate signal line X ₁ and the signal applied to the gate signal line X _2. In the case of the phase, the defect 36 is determined.

For the setting for detecting the defect 37 in FIG. 7, the switch means S _v is opened and the gate signal lines X _{1 to} X _{m + 1} are left in the open state or the ground state. The switch means S _h1 , S _h2 , S _s1 , S _s2 are closed, and signals as shown in FIGS. 10D, E (...) Are applied to the source signal lines Y ₁ , Y ₂ (...). At this time, the pixel electrode having the defect 37 is shown in FIG.
The potential change as shown by L is shown, and the potential of the pixel electrode in the normal case without the defect 37 remains at the low level as shown in FIG. 10M. Due to the difference between the two, it is possible to determine whether the defect 37 is normal or short-circuited by the same method as when detecting the defect 12.

In the above-described embodiment, the time T _ON or the period T _P for turning on the transistor is changed, but the charge amount to the auxiliary capacitance can be changed even if the gate voltage or the source voltage is changed. In this way, the characteristics of the thin film transistor may be inspected. In this embodiment, a charge optical prober is used as the non-contact probe 21, but an electro-optical probe (for example, Japanese Patent Laid-Open No. 2-134584).
“Electro-optical signal measurement”) or an electron beam probe. In the above, the inspection method of the active matrix array using the additional capacitance method in which one of the auxiliary capacitances is connected to the pixel electrode and the other to the adjacent gate signal line is described as the auxiliary capacitance. The present invention can also be applied to inspection of a storage capacitor type active matrix array in which element electrodes and the other are connected to a common electrode.

[0033]

Since the non-contact probe is used as described above, there is no possibility of damaging the surface of the thin film transistor or the like. In addition, there is no risk of defect detection due to poor contact, reliable detection is possible, and non-mechanical deflection of the light beam or electron beam enables high-speed positioning with respect to the detection point, reducing inspection time. Can be short.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the invention of claim 1;

FIG. 2 is a block diagram showing an example of a charge optical probe as a specific example of the non-contact probe 21.

3 is a diagram showing a connection for detecting a gate / drain short-circuit defect 12 in the apparatus of FIG.

FIG. 4 is a waveform diagram showing an example of a signal for detecting a defect having a resistance value.

5 is a diagram showing a connection for detecting a drain-source short-circuit defect 13 in the device of FIG.

6 is a diagram showing a connection for detecting a short circuit defect 36 between an auxiliary capacitance and a gate signal line in the device of FIG.

7 is a diagram showing a connection for detecting a short circuit defect 37 between an auxiliary capacitance and a source signal line in the device of FIG.

FIG. 8 is a block diagram showing an embodiment of the invention of claim 2;

FIG. 9 is a block diagram showing an embodiment of the invention of claim 3;

10 is a waveform chart showing an example of signals for explaining the operation of the embodiment of FIG.

FIG. 11 is a block diagram showing a conventional inspection device.

Claims (3)

[Claims] 1. A gate signal generating means, a source signal generating means, and each gate signal line of an active matrix array to be inspected is selectively switched to any one of an output terminal, an open terminal and a ground terminal of the gate signal generating means. Gate signal line selecting means to be connected, and each source signal line of the active matrix array to be inspected, selectively the output terminal of the source signal generating means,
A source signal line selection means that is switchably connected to either an open terminal or a ground terminal, and a non-contact probe that detects the electrical state of the drain terminal of the thin film transistor connected to the gate signal line and the source signal line in a non-contact manner. An active matrix array inspecting apparatus, comprising: means for determining whether the thin film transistor is defective or non-defective based on the detection output from the non-contact probe. 2. A gate signal generating means, a source signal generating means, a gate switch for connecting the gate signal generating means to a gate signal line short ring of the active matrix array to be inspected, and an active matrix array to be inspected. A source switch for connecting the source signal generating means to the source signal line short ring and a gate signal line of the active matrix array to be inspected and a drain terminal of a thin film transistor connected to the source signal line are electrically connected in a non-contact manner. An active matrix array inspecting apparatus, comprising: a non-contact probe for detecting; and a means for judging whether the thin film transistor is defective or non-defective by a detection output from the non-contact probe. 3. A gate signal generating means for operating a vertical shift register built in the tested active matrix array to generate a signal capable of sequentially driving gate signal lines, and a built-in active matrix array. Source signal generating means for operating the horizontal shift register and the source line driving circuit to generate a signal capable of sequentially driving the source signal lines, and the gate signal generating means are connected to and disconnected from the vertical shift register. Gate switch means for performing, source switch means for connecting and disconnecting the source signal generating means to the horizontal shift register and the source line drive circuit, and drain terminal of the thin film transistor connected to the gate signal line and the source signal line And a non-contact probe that detects the electrical state of Active matrix array inspection apparatus having the above detection outputs from touch probe means for determining good or bad of the thin film transistor, a.