JPH05108551A - Frame transfer bus constitution system - Google Patents

Abstract

PURPOSE:To realize extensibility for the capacity and scale of a bus by hierarchizing the constitution of the bus concerning the system for constituting the bus to transfer data in a frame form. CONSTITUTION:In the system to transmit/receive information in the frame form between plural modules 1, the respective modules 1 are connected with a first-order transfer bus 2, the respective first-order transfer buses 2 are connected with second-order transfer bus 3 each other, a first-order bus arbitrating function 4 arbitrates the right of using the bus on the first-order transfer bus 2 and manages the transfer of a frame between the respective modules 1 on the same first order transfer bus 1 and between this first-order transfer bus 1 and the second-order transfer bus 3, and an up frame storing function 5 stores the frame outputted from the first-order transfer bus 2 to the second-order transfer bus 3. Then, a second-order bus arbitrating function 6 arbitrates the right of using the second-order transfer bus 3 and manages the transfer of the frame between the second-order transfer bus 3 and each first-order transfer bus 2, and a down frame storing function 7 stores the frame outputted from the second-order transfer bus 3 to the first-order transfer bus 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a system for constructing a bus for transferring frame format data, and more particularly to a frame transfer bus which realizes expandability of bus capacity and scale by adopting a hierarchical bus structure. It relates to the configuration method.

A device for exchanging frame format data such as a packet format frame or a LAN protocol format frame requires a frame transfer bus for coupling modules for transmitting and receiving frames to be exchanged.

In such a frame transfer bus,
It is desirable that the transfer capacity can be expanded as a building block by hierarchizing the bus configuration and that the number of participating modules in the entire system can be expanded in stages.

[0004]

BACKGROUND ART FIG. 11, there is outlined the frame exchange device, 11 1, _{11 2,} ..., 11 _n represents a frame transceiver module for transmitting and receiving frames, 1
Reference numeral 2 denotes a bus which connects these modules and transfers a frame transmitted and received between the modules.

The conventional techniques relating to buses for exchanging frames in such a device are roughly classified as follows. Time-sharing bus Transfer cycles on the bus are time-divided and fixedly assigned to each bus participation module. Arbitration type bus The bus is equipped with an arbitration function for the bus usage right of each module,
Each participating module makes a request for a bus use right to the arbitration function, and the arbitration function considers the request from each module and sequentially allocates the data transfer right to each module according to a predetermined algorithm.

[0006]

The frame transfer bus as shown in FIG. 11 has the following various problems. In the case of the time-division bus, the bus cannot be effectively allocated when the transmission information amount of each module varies. However, each module has a fixed service time, does not require a bus arbitration function, and
No arbitration overhead is required either.

In the case of the arbitration type bus, it is possible to dynamically allocate the bus usage right, but on the other hand, a function of monitoring the request of each module is required. In addition, processing time for monitoring and arbitration is required, and this time is consumed as overhead, which may lead to a decrease in bus efficiency. In the case of the time division bus and the arbitration type bus, the information frame transmitted by a module is broadcasted to all the modules participating in the bus. Therefore,
The total transfer capacity of the bus is required by the number of modules times the average input / output traffic amount.

From the above viewpoint, the conventional frame transfer bus has the following problems. (1) In order to gradually increase the scale (number of modules) in terms of device configuration, it is necessary to achieve the final bus speed (number of modules x average input / output traffic amount) from the beginning. This means an increase in the bus interface speed of each module.

(2) Extending a bus having a sufficient bus speed up to a physical distance corresponding to a sufficient number of modules is in terms of electrical characteristics (propagation characteristics) and physical characteristics (circulation of the bus). Because it is difficult. (3) Especially in the case of an arbitration type bus, when monitoring requests and transmitting / receiving information necessary for arbitration on this bus, depending on the extension of the distance, the overhead of the bus transfer time required for arbitration increases. At bus distances above a certain level, the time required for arbitration becomes an issue, and an increase in bus speed does not lead to an improvement in effective transfer capacity.

The present invention is intended to solve the problems of the prior art as described above. The bus capacity and scale can be expanded by physically and functionally layering the bus in two stages. The purpose is to provide a frame transfer bus configuration system that has been realized.

[0011]

FIG. 1 shows the basic configuration of the present invention. According to the frame transfer bus configuration method of the present invention, in a system for transmitting and receiving frame format information between a plurality of modules 1, a primary transfer bus 2 connecting each module 1 and a secondary transfer bus connecting each primary transfer bus 2 to each other. A primary that arbitrates the bus usage right on the transfer bus 3 and the primary transfer bus 2 to manage the transfer of frames between the modules 1 on the same primary transfer bus 2 and between the primary transfer bus 2 and the secondary transfer bus 3. Bus arbitration function 4 and primary transfer bus 2
Between the secondary transfer bus 3 and each primary transfer bus 2 by arbitrating the upstream frame accumulation function 5 for accumulating frames output from the secondary transfer bus 3 to the secondary transfer bus 3 It is provided with a secondary bus arbitration function 6 for managing frame transfer and a downstream frame storage function 7 for storing frames output from the secondary transfer bus 3 to the primary transfer bus 2.

The present invention further includes a frame filter function 8 in the above frame transfer bus configuration system,
Among the frames on the primary transfer bus 2, the output of the frames destined for the module on this primary transfer bus to the secondary transfer bus 3 is blocked.

Further, according to the present invention, in the frame transfer bus configuration system described above, a frame filter function 9 is provided so that among the frames on the secondary transfer bus 3, the frames not destined for the module on the primary transfer bus 2 are The output to the primary transfer bus is blocked.

Further, according to the present invention, in the above frame transfer bus configuration method, the primary bus arbitration function 4 monitors the capacity accumulated in the upstream frame accumulating function 5 and the capacity exceeds a predetermined amount. At this time, the frame transfer on the primary transfer bus 2 for the upstream frame storage function 5 is stopped.

Further, according to the present invention, in the above frame transfer bus configuration method, the secondary bus arbitration function 6 monitors the capacity accumulated in the downstream frame accumulating function 7 and the capacity exceeds a predetermined amount. When it is present, the transfer of the frame on the secondary transfer bus 3 to the downstream frame storage function 7 is stopped.

[0016]

FIG. 2 is a diagram showing the concept of the method of the present invention.
21 _11, 21 _12, … _, 21 _1n, 21 _21, 21 _22, … _, 2
1 _2n, ... _, 21 _m1, 21 _m2, ... _, 21 _mn are frame transmission / reception modules, 22 _1, 22 _2, ..., 22 _m are primary buses connecting the respective frame transmission / reception modules, 23 _1, 2
3 _2, ..., 23 _m each of the primary transfer bus connected to bus adapter 24 is the secondary transfer bus connecting each bus adapter.

The system shown in FIG. 2 has the following features. It has a two-layer structure of a primary transfer bus and a secondary transfer bus. The primary transfer buses independently monitor transfer requests, arbitrate bus usage rights, and execute frame transfers on individual buses. A frame transmitted from each primary transfer bus to another primary transfer bus is temporarily stored in the bus adapter, and then a transfer request is output to the secondary transfer bus.
Request monitoring and bus arbitration are arbitrated on the secondary transfer bus.

As a result, the following problems can be solved. It is possible to improve the feasibility of the bus in small and small configurations. In this case, the primary transfer bus has a bus transfer capacity sufficient to handle the amount of traffic input / output to / from the modules participating in this bus. To this end: -The bus interface speed of each module is equivalent to the primary transfer bus.・ The speed of each individual bus should be commensurate with the number of participating modules. The bus is electrically terminated once with the bus adapter.

It is possible to maintain the total transfer capacity. In this case, the monitoring of requests and the arbitration of bus usage rights are performed in two stages. Therefore, there is a pipeline effect because the transfer is independently executed on the primary transfer bus and the secondary transfer bus. -The arbitration time for the output from the module is the arbitration time on the primary transfer bus, and can be shortened sufficiently.

[0020]

FIG. 3 shows an embodiment of the present invention.
31_11,31_12,…_,31 _1n,…_,31_m1,31
_m2,…_,31_mnIs a frame transmission / reception module, 32
_1,…, 32_mEach frame transmission / reception module
Upstream primary transfer bus to connect, 33_1,…, 33_mIs it
Downlink primary connecting each frame transceiver module
Transfer bus, 34_1,…, 34_mSend and receive each frame
Control line connected to the signal module, 35_1,…, 35_mIs
Bus adapters connected to each primary transfer bus, 3
6_1,…, 36_mIs the primary for each bus adapter
Upstream for accumulating frames from the transfer bus to the secondary transfer bus
Frame accumulation function, 37_1,…, 37_mIs each
From the secondary transfer bus to the primary transfer bus on the adapter
Downstream frame accumulation function for accumulating frames, 38
_1,…, 38_mIs the primary bus for each bus adapter.
Arbitration function, 39 is a secondary transfer connecting each bus adapter
Bus, 40 is a control line connected to each bus adapter, 41
Is a secondary bus arbitration function.

FIG. 4 shows a configuration example of the primary bus arbitration function and the secondary bus arbitration function. In the primary bus arbitration function 38, 42 is a transfer request receiving circuit connected to the request line of each frame transmitting / receiving module, and 43 is a transfer module that determines the transfer module and transmits the module address for which the transfer right is designated to the response line. It is a decision circuit. In the case of the secondary bus arbitration function, the configuration of each unit is the same, but the request line is connected to the upstream frame accumulation function in the primary transfer bus.

FIG. 5 shows an example of the structure of the upstream frame storage function. In the frame accumulation function 36,
Reference numeral 44 is a bus receiving circuit for receiving frames from the primary transfer bus, 45 is a frame storage buffer for storing received frames, 46 is a transfer control circuit for controlling transfer of frames from the frame storage buffer 45, and 47 is a frame storage buffer. It is a bus transmission circuit for transmitting the frame output from 45 to the secondary transfer bus.

FIG. 6 shows an example of the structure of the downlink frame storage function. In the frame accumulation function 37,
Reference numeral 48 is a bus receiving circuit for receiving frames from the secondary transfer bus, 49 is a frame storage buffer for storing received frames, 50 is a transfer control circuit for controlling transfer of frames from the frame storage buffer 49, and 51 is frame storage. It is a bus transmission circuit that transmits the frame output from the buffer 49 to the primary transfer bus.

The frame transfer operation in the embodiment shown in FIGS. 3 to 6 is performed as follows.

(1) The frame transmission / reception module raises the request line for the primary bus arbitration function in the bus adapter to which the frame transmission / reception module belongs when the frame to be transmitted is generated. (2) The primary bus arbitration function arbitrates each request received from each frame transmission / reception module to which it is connected by a fixed algorithm such as random, round robin, fixed order, etc., and sends the module address to the response line. To specify one module that acquires the bus usage right.

(3) The designated frame transmission / reception module sends the frame to the primary transfer bus. (4) Each frame transmission / reception module recognizes the frame addressed to itself by the destination address mounted at the beginning of the frame and takes in the frame.

(5) The upstream frame storage function captures all frames, and at the same time as capturing the frames,
A transfer request is sent to the secondary bus arbitration function via a request line. (6) The secondary bus arbitration function, like the primary bus arbitration function, arbitrates requests from each frame accumulation function and specifies one upstream frame accumulation function that acquires the bus usage right.

(7) The designated upstream frame accumulation function transmits a frame on the secondary transfer bus. (8) In all bus adapters, the downstream frame storage function receives a frame and fetches the frame, and at the same time, sends a transfer request to the respective primary bus arbitration function via the request line.

(9) When the downstream frame accumulation function acquires the bus use right, it transmits the frame to the primary transfer bus. (10) As in the case of (4), the frame transmission / reception module specified by the address captures the frame.

FIG. 7 shows another embodiment of the present invention, showing only another configuration example of the upstream frame accumulation function shown in FIG. 3, and the other portions are the same as those of FIG. Same as the example. In the frame accumulating function 52, the same elements as those in FIG. 5 are indicated by the same numbers, 53 is an address list for storing the addresses of the frame transmitting / receiving modules on the primary transfer bus to which the own frame accumulating function belongs, and 54 is the address list 53. This is a frame filter function that blocks frames that specify an address that exists in the destination.

The operation of the upstream frame accumulation function shown in (5) in the embodiment shown in FIG. 3 is as follows in this embodiment. (5) 'The upstream frame storage function 52 stores the address of the frame transmission / reception module on the primary transfer bus to which it belongs in the address list 53. The frame filter function 54 recognizes the address of the frame received by the bus receiving circuit 44 and collates it with the address in the address list 53. A frame whose designated address exists on the list is blocked because it does not need to be transferred onto the secondary transfer bus, and therefore the frame storage buffer 45 does not store a frame. For a frame that specifies an address that does not exist in the address list, the same operation as (5) above is performed.

FIG. 8 shows still another embodiment of the present invention, showing only another structural example of the downlink frame accumulating function shown in FIG. 3, and other portions are shown in FIG. Same as the embodiment. In the frame accumulating function 55, the same elements as those in FIG. 6 are indicated by the same numbers, and 56 is an address list for storing the address of the frame transmitting / receiving module on the primary transfer bus to which the own frame accumulating function belongs,
Reference numeral 57 is a frame filter function for blocking a frame that does not specify an address existing on the address list 56 as a destination.

The operation of the downlink frame accumulating function shown in (8) in the embodiment shown in FIG. 3 is as follows in this embodiment. (8) ′ The downstream frame storage function 55 stores the address of the frame transmission / reception module on the primary transfer bus to which it belongs in the address list 56. The frame filter function 57 recognizes the address of the frame received by the bus receiving circuit 48 and compares it with the address in the address list 56. Then, only the frame whose designated address exists on the list is passed, and therefore the frame accumulation buffer 49 performs frame accumulation. Subsequent operations are the same as in the case of the above (8).

FIG. 9 shows still another embodiment of the present invention, showing only another configuration example of the upstream frame accumulating function and the primary bus arbitration function shown in FIG.
The other parts are the same as in the embodiment of FIG. In the frame storage function 58, the same components as those in FIG. Further, in the primary bus arbitration function 60, the same components as those in FIG. 4 are indicated by the same numbers, and 61 is a transfer module determination circuit that determines the transfer module and outputs it to the response line.

The operation of the primary bus arbitration function shown in (2) in the embodiment shown in FIG. 3 is as follows in this embodiment. (2) ′ The transfer module determination circuit 61 arbitrates each request received via the transfer request reception circuit 42 and determines the transfer module that acquires the bus use right.
After the transfer module is determined, the storage amount in the frame storage buffer 45 is monitored, and if the storage amount exceeds a certain amount, the issuance of the response line to the transfer module is delayed and the primary transfer bus Pause the transfer. When the accumulated amount decreases due to the transfer on the secondary transfer bus and falls below a certain amount, the transfer is restarted.

FIG. 10 shows still another embodiment of the present invention, showing only another configuration example of the upstream frame storage function and secondary bus arbitration function shown in FIG. Is the same as in the embodiment of FIG. In the upstream frame accumulation function 62, the same elements as those in FIG. 5 are indicated by the same numbers, and 63 is an accumulation amount monitoring circuit for monitoring the accumulation amount in the frame accumulation buffer 45. In the secondary bus arbitration function 64, 65 is a transfer request receiving circuit that receives a request line indicating a transfer request from each upstream frame storage function, and 66 is a buffer storage from the downstream frame storage function connected to the secondary transfer bus. A storage amount monitoring circuit that monitors the storage amount notification indicating the amount, and 67 is a transfer request receiving circuit 6
5 is a transfer source determination circuit that determines the upstream frame accumulation function of the primary transfer bus that is the transfer source based on the information of 5.

The operation of the primary bus arbitration function shown in (2) in the embodiment shown in FIG. 3 is as follows in this embodiment. (2) ′ The transfer source determining circuit 67 determines the upstream frame accumulation function as the transfer source based on the information from the transfer request receiving circuit 65. After that, the secondary bus arbitration function 64 monitors the storage amount notification indicating the buffer storage amount from the destination downstream frame storage function in the storage amount monitoring circuit 66, and when the storage amount exceeds a certain amount, Transfer source determination circuit 6
By delaying the issuance of the response line to the upstream frame storage function of the transfer source from 7, the frame transfer on the secondary transfer bus is temporarily stopped. When the amount of data stored in the destination downstream frame storage function decreases due to transmission on the primary transfer bus and falls below a certain amount, frame transfer from the source upstream frame storage function is restarted.

[0038]

As described above, according to the present invention, in a bus for transferring frame format data, it is possible to construct a bus capable of expanding the transfer capacity like a building block. It is possible to increase the number of participating modules in stages.

[Brief description of drawings]

FIG. 1 is a diagram showing a principle configuration of the present invention.

FIG. 2 is a diagram showing the concept of the system of the present invention.

FIG. 3 is a diagram showing an embodiment of the present invention.

FIG. 4 is a diagram showing a configuration example of a primary bus arbitration function and a secondary bus arbitration function.

FIG. 5 is a diagram showing a configuration example of an upstream frame storage function.

FIG. 6 is a diagram showing a configuration example of a downlink frame storage function.

FIG. 7 is a diagram showing another embodiment of the present invention.

FIG. 8 is a diagram showing still another embodiment of the present invention.

FIG. 9 is a diagram showing still another embodiment of the present invention.

FIG. 10 is a diagram showing still another embodiment of the present invention.

FIG. 11 is a diagram showing an outline of a frame exchange device.

[Explanation of symbols]

 1 module 2 primary transfer bus 3 secondary transfer bus 4 primary bus arbitration function 5 frame accumulation function 6 secondary bus arbitration function 7 frame accumulation function 8 frame filter function 9 frame filter function

Claims (5)

[Claims] 1. In a system for transmitting and receiving frame format information between a plurality of modules (1), a primary transfer bus (2) connecting each module (1) and each primary transfer bus (2) are connected to each other. Between the secondary transfer bus (3) and the module (1) on the same primary transfer bus (2) and the primary transfer bus (2) by arbitrating the bus usage right on the primary transfer bus (2). Primary bus arbitration function (4) for managing frame transfer between the secondary transfer buses (3) and upstream frame accumulation for accumulating frames output from the primary transfer bus (2) to the secondary transfer bus (3) Function (5)
And a secondary bus arbitration function (6) for arbitrating the bus usage right on the secondary transfer bus (3) and managing frame transfer between the secondary transfer bus (3) and each primary transfer bus (2). And a downstream frame storage function (7) for storing frames output from the secondary transfer bus (3) to the primary transfer bus (2). 2. The frame transfer bus configuration method according to claim 1, wherein, among frames on the primary transfer bus (2), a frame addressed to a module on the primary transfer bus is sent to the secondary transfer bus (3). A frame transfer bus configuration method characterized in that a frame filter function (8) for blocking the output of the above is provided. 3. The frame transfer bus configuration method according to claim 1, wherein among frames on the secondary transfer bus (3), a frame not addressed to a module on the primary transfer bus (2) is sent to the primary transfer bus. A frame transfer bus configuration method characterized in that a frame filter function (9) for blocking the output of the above is provided. 4. The primary bus arbitration function (4) monitors the capacity stored in the upstream frame storage function (5), and when the capacity exceeds a predetermined amount, the upstream frame storage function (5) is stored. The frame transfer bus configuration system according to claim 1, wherein transfer of a frame on the primary transfer bus (2) to the function (5) is stopped. 5. The secondary bus arbitration function (6) monitors the capacity stored in the downlink frame storage function (7), and when the capacity exceeds a predetermined amount, the downlink frame is stored. 2. The frame transfer bus configuration system according to claim 1, wherein transfer of frames on the secondary transfer bus (3) to the storage function (7) is stopped.