JP3573008B2 - Packet switch device - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a packet switch device for switching packet data, and more particularly, to a packet switch device in which a switch unit for switching packet data has a duplex configuration.
[0002]
[Prior art]
Conventionally, this type of packet switch device has a dual configuration including an active system and a standby system, and switches from the active system to the standby system to maintain the original packet data switching function when a failure occurs in the active system. To improve reliability.
[0003]
FIG. 6 shows an outline of the configuration of a packet switch device in a first conventional example of a conventionally proposed duplex configuration. In this packet switch device, packet data 10 input from a plurality of input ports (not shown)₁-10_N, A first to an N-th input interface (hereinafter abbreviated as IF) units 11 provided corresponding to the respective ports.₁~ 11_NIs entered. First to Nth input IF units 11₁~ 11_NIs the buffer 12₁~ 12_NIn the packet data 10₁-10_NIs buffered by M packets. Buffer 12₁~ 12_NThe acknowledgment (ACK: hereinafter abbreviated as ACK) signal 13₁~ 13_NAs a result, the 0-system and 1-system switch units 14₀, 14₁Is output to Selection ACK signal 13₁~ 13_NAre SEL units 15 each of which is a two-input one-output selector.₁~ 15_NThus, based on the switching control signal 16, the 0-system switch unit 14₀ACK signal 17 from₁~ 17_NAnd 1 system switch section 14₁ACK signal 18 from₁~ 18_NIs generated by selecting one of them.
[0004]
The first to N-th input IF units 11₁~ 11_NRepresents packet data 10 in each buffer.₁-10_NIs input, a route request signal (not shown) for specifying the output port of the outgoing route is sent to the 0-system and 1-system switch units 14.₀, 14₁To be sent to. 0-system and 1-system switch unit 14₀, 14₁An ACK signal is sent from the route request signal to the input IF unit that is the source of the route request signal when switching is enabled as a result of assignment or scheduling of an output port as a destination by a scheduler (not shown). Reply.
[0005]
0-system and 1-system switch unit 14₀, 14₁Switches the packet data output by each input IF unit after the request by the route request signal is approved by the ACK signal to the output port requested by the corresponding route request. 0-system and 1-system switch unit 14₀, 14₁Packet data 19 switched at₁~ 19_N, 20₁~ 20_NAre the first to N-th output IF units 21 corresponding to the requested output ports, respectively.₁~ 21_NIs output to First to Nth output IF units 21₁~ 21_NIs a SEL unit 22 which is a two-input one-selector₁~ 22_N, The 0-system and 1-system switch units 14₀, 14₁One of the switched packet data is selected, and the output packet data 23₁~ 23_NIs output as
[0006]
The switching control signal 16 is generated by the common control unit 24. The common control unit 24 monitors the reception of the switching instruction signal 26 input from a higher-level device (not shown) by the switching instruction receiving unit 25, and when the signal is detected, is distributed to each unit by the switching control unit 27.
[0007]
When such a packet switch device receives the switching instruction signal 26 from the higher-level device in the common control unit 24, the packet switching device transmits the switching control signal 16 generated through the switching instruction receiving unit 25 and the switching control unit 27 to the first to N-th Input IF unit 11₁~ 11_NSEL section 15₁~ 15_NAnd the first to N-th output IF units 21₁~ 21_NSEL section 22₁~ 22_NOutput to Each SEL unit selectively outputs according to the input switching control signal 16. As a result, system switching is performed from the active system 0 to the standby system 1. Here, for example, the 1-system switch unit 14 which is initially the standby system and becomes the active system after executing the switching.₁Transmits a dummy ACK signal for each input IF unit after switching is performed for the number M of route requests corresponding to the maximum M packets buffered in the input IF unit. After that, the switching operation is performed in the switched one system.
[0008]
The technical concept of such a packet switch device is disclosed, for example, in Japanese Patent Application Laid-Open No. 1-274543, "Packet Switching System".
[0009]
Further, Japanese Patent Application Laid-Open No. 6-216928 discloses a technique for avoiding loss of switching data due to a difference in delay time due to a difference in an initial state of a switch unit of both systems. ing.
[0010]
FIG. 7 shows an outline of a configuration of a packet switch device according to a second conventional example to which the technology disclosed in Japanese Patent Application Laid-Open No. 6-216928 is applied. In this packet switch device, the packet data 31 input to the input IF unit 30 is transmitted to the 0-system and 1-system switch units 32 here.₀, 32₁Distributed to 0 system switch section 32₀Then, the packet data input from the input IF unit 30 is₀To buffer. Buffer 33₀Is a buffer control unit 34₀By the timer 35₀The input and the output are controlled based on the timer time measured in. Buffer control unit 34₀Buffer 33₀Is input to the two-input / one-output selector 37 of the output IF unit 36.
[0011]
Similarly, the 1-system switch unit 32₁Then, the packet data input from the input IF unit 30 is₁To buffer. Buffer 33₁Is a buffer control unit 34₁By the timer 35₁The input and the output are controlled based on the timer time measured in. Buffer control unit 34₁Buffer 33₁Is input to the two-input / one-output selector 37 of the output IF unit 36. Buffer control unit 34₀, 34₁The selector 37 is controlled by a common control unit 38.
[0012]
In the packet switch device having such a configuration, the common control unit 38 detects a switching instruction signal from a higher-level device (not shown). When the common control unit 38 detects the switching instruction signal, the common control unit 38₀Buffer control unit 34₀And 1-system switch section 32₁Buffer control unit 34₁To the system switching signal 39 at the same time.₀, 39₁Is sent. In the following, the 0-system switch unit 32₀Is the active system, 1 system switch section 32₁Is the standby system, and the selector 37 is operated by the system selection signal 40 to switch the 0-system switch unit 32 which is the active system.₀The following description is based on the assumption that the packet data from is selected.
[0013]
System switching signal 39₀0 switch unit 32 that has received₀Buffer control unit 34₀Is the buffer 33₀Is instructed not to receive the packet data from the input IF unit 30. On the other hand, the system switching signal 39₁System switch unit 32 that has received the₁Buffer control unit 34₁Is the buffer 33₁Is instructed to reset the remaining data, and thereafter, the output of the packet data from the input IF unit 30 to the output IF unit 36 is stopped. Further, the buffer control unit 34₁Is the timer 35₁The system 0 switch unit 32 which is the active system₀Buffer 33₀The measurement of the time until all the packet data stored in the device is discharged is started.
[0014]
Buffer control unit 34₁Is the timer 35₁When the timeout due to is detected, the common control unit 38 is notified of the timeout. In response to this, the common control unit 38 sends the selector 37 a 1-system switch unit 32₁Buffer 33₁A system selection signal 40 is transmitted so as to select the packet data from. At the same time, the first system switch unit 32₁Buffer control unit 34₁Buffer 33 for₁Release of packet data output from
[0015]
As described above, the input of the active system is stopped at the time of system switching, the buffer of the standby system is cleared, packet data is accumulated, and the output is stopped. Then, when the time for discharging all the packet data accumulated in the active system by the timer elapses, the system is switched to the standby system and the suspension of the output of the buffer of the standby system is released, and the switching in the standby system is performed. Start.
[0016]
[Problems to be solved by the invention]
However, in the packet switching device of the first conventional example, since the common control unit 24 immediately performs the system switching by the switching control signal 16 after receiving the switching instruction signal 26, the response of the ACK signal of the working system after the system switching is performed. Is performed on the standby system. Therefore, when the buffering state of the route request differs between the active system and the standby system, packet data corresponding to the route request buffered in the switch unit which was the active system before system switching may be lost. There is a problem that a so-called instantaneous interruption occurs at the time of system switching.
[0017]
On the other hand, in the packet switching device according to the second conventional example, the system switching is not executed until the data accumulated in the buffer of the active system is discharged, thereby avoiding the occurrence of instantaneous interruption. However, for packet data for which data flows are individually defined, scheduling may be performed in the switch unit because output ports corresponding to the output routes of packet data input via different input ports may overlap. You need to go and adjust these. Therefore, if a buffer such as the packet switch device in the second conventional example is simply provided in the switch unit or the input IF unit, the route request and the acknowledgment corresponding to the route request extend over both systems. There is a problem that instantaneous interruption occurs. Further, in the packet switching device according to the second conventional example, since a timeout is detected in each switch unit, it is necessary to notify the common control unit once and then perform system switching, which makes the device complicated. There is a problem that a delay in processing and processing time is caused.
[0018]
Therefore, an object of the present invention is to provide a packet switching device that performs switching processing by performing scheduling with a simple configuration and realizes system switching of a redundantly configured switch unit without instantaneous interruption.
[0019]
[Means for Solving the Problems]
According to the first aspect of the present invention, (a)Indicates the destination output port of the packet data input corresponding to each of the multiple input portsRoute request sending means for sending a route request signal;theseSent by route request sending meansrootRequest signalInput packet data accumulating means for sequentially accumulating packet data corresponding to the input port when a predetermined acknowledgment signal is not responded in response to the request signal; Output port allocating means for allocating, response means for responding to the source of the route request signal to which the output port is allocated by the output port allocating means, and a route to which no output port is allocated by the output port allocating means A route request storage unit for storing a request signal, and a connection for switching packet data read from the input packet data storage unit to an output port allocated by the output port allocation unit in response to the acknowledgment signal returned by the response unit 2 provided with switching means First and second switch means configured as described above, and (d) the first and second acknowledgment signals responded by the response means of the first and second switch means, based on the active approval signal. Data transmitting means for transmitting corresponding packet data, and (e) data selecting means for selectively outputting the active packet data from the packet data switched by the connection switching means of the first and second switch means. (F) switching instruction receiving means for detecting reception of a predetermined switching instruction signal, and (g) when the switching instruction signal is received by the switching instruction receiving means, the active system among the first and second switching means. Instructs the response means to respond to all the route requests stored in the active route request storage means.Processing instruction means;(H) timer means for measuring the maximum time required for response processing to all the route requests stored in the predetermined route request storage means when the switching instruction signal is received; When time is measuredA system switching executing unit for performing system switching of the first and second switch units is provided in the packet switch device.
[0024]
IeClaim 1In the invention described above, when packet data is input, first, a route request signal for specifying a destination output port is transmitted to the first and second switch means having a duplex configuration by the route request transmitting means. In the first and second switch means, an output port is assigned by the output port assigning means based on the route request signal. When the response means assigns the output port as a result, the output port assigning means sends the route request signal to the source of the route request signal. Respond with a predetermined approval signal. On the other hand, the route request signal to which the output port is not assigned is stored in the route request storage means, and the packet data is sequentially stored in the input packet data storage means provided corresponding to the input port assuming that there is no corresponding acknowledgment signal. accumulate. When a response is received by the active system approval signal, the connection switching unit switches the active system packet data transmitted by the data transmitting unit according to the allocation information, and the data selection unit switches the active system packet data by the active system switching unit. Selectively output the switched packet data. Here, when the switching instruction signal for instructing the predetermined system switching is detected by the switching instruction receiving means, the switching accumulated in the route request accumulating means by the processing instruction means is applied to all the unprocessed route request signals. In response, an instruction is issued to perform switching by the active switch means. Then, the maximum time required for the switching processing for all the route requests stored in the route request storage means determined in advance by the timer means is measured, and after the lapse of the time, the first and second systems are switched by the system switching execution means. The system switching of the switch means is executed.
[0025]
Claim 2According to the invention described above, (a) route request transmitting means for transmitting a route request signal indicating a destination output port of packet data input corresponding to each of the plurality of input ports, and (b) transmitting by the route request transmitting means. Input packet data accumulating means for sequentially accumulating packet data corresponding to the input port when a predetermined acknowledgment signal is not responded in response to the received route request signal, and (c) a request signal transmitted by the route request transmitting means. Output port allocating means for allocating an output port based on the output port allocating means, response means for responding to the transmission source of the route request signal to which the output port has been allocated by the output port allocating means an acknowledgment signal, Route request signal not assigned Request storage means for storing packet data, and connection switching means for switching the packet data read from the input packet data storage means to the output port allocated by the output port allocation means in response to the acknowledgment signal returned by the response means First and second switch means having a duplex configuration comprising: (d) a working approval signal among the first and second approval signals responded by the first and second switch means; (E) data selecting means for selecting and outputting the active packet data from the packet data switched by the first and second switch means, (F) switching instruction receiving means for detecting reception of a predetermined switching instruction signal, and (g) receiving this switching instruction. Processing instructing means for instructing the active response means of the first and second switch means to respond to all route requests stored in the active route request storage means when the switching instruction signal is received by the stage; (H) response processing end monitoring means for monitoring the end of the response processing instructed by the processing instruction means, and (i) first and second when the response processing end monitoring means detects the end of the response processing. And a system switching executing unit for performing system switching of the second switch unit.
[0026]
IeClaim 2In the described invention,Claim 1In the invention described in the above, the response processing end monitoring means monitors the end of the response processing instructed by the processing instruction means, and the system switching executing means detects the end of the response processing by the response processing end monitoring means. The system switching of the first and second switch means is executed.
[0027]
Claim 3In the described invention,Claim 1 or Claim 2In the packet switch device described above, the input packet data storage means stores the packet data input from the time when the switching instruction signal is received by the switching instruction receiving means to the time when the processing instructed by the processing instruction means is completed. It is characterized by having a storage capacity.
[0028]
IeClaim 3In the described invention, the storage capacity of the input packet data storage means is configured to store all the packet data input from the time when the switching instruction signal is received to the time when the system switching is executed by the system switching executing means. Therefore, it is possible to reduce extra processing time such as requesting retransmission of packet data input so far in order to avoid loss of packet data, and to quickly start switching operation after execution of system switching.
[0029]
Claim 4In the described invention,Any one of claims 1 to 3In the packet switch device described above, when the system switchover is executed by the system switchover execution unit, the route request accumulation unit of the switch unit of the first and second switch units that was the standby system before the reception of the switching instruction signal. It is characterized by having a route request initializing means for clearing the contents.
[0030]
IeClaim 4In the described invention, the route request storage means of the standby system is initialized together with the execution of the system switch. Therefore, the route request signal buffered in the standby system before the execution of the system switch becomes unnecessary after the execution of the switch. It is not necessary to perform a response process, and the speed of the system switching process can be increased.
[0031]
BEST MODE FOR CARRYING OUT THE INVENTION
[0032]
【Example】
Hereinafter, the present invention will be described in detail with reference to examples.
[0033]
First embodiment
[0034]
FIG. 1 shows an outline of a configuration of a packet switch device according to a first embodiment of the present invention. In the packet switch device according to the first embodiment, an input IF unit 50 and an output IF unit 51 are connected via a switch unit 52. The input IF unit 50, the output IF unit 51, and the switch unit 52 perform system switching control by a switching control signal 55 generated by the common control unit 54 to which the switching instruction signal 53 is input.
[0035]
The input IF unit 50 includes first to N-th input IF units 56 corresponding to N input ports (not shown).₁~ 56_NIt has. First to Nth input IF units 56₁~ 56_NIs the packet data 57₁~ 57_NEach time is input, a route request signal indicating a destination output port is transmitted to the switch unit 52 with reference to the output route information added as header information of each packet data. First to Nth input IF units 56₁~ 56_NWhen receiving the ACK signals corresponding to these route request signals, the PDU outputs packet data corresponding to each route request signal to the switch unit 52. If there is no response by the ACK signal corresponding to the transmitted route request signal, the packet data 57 input through the input port₁~ 57_NAre the first to N-th input IF units 56, respectively.₁~ 56_NBuffered.
[0036]
The switch unit 52 includes a 0-system switch unit 58₀And the 1-system switch section 58₁And a dual configuration. 0-system and 1-system switch unit 58₀, 58₁Then, each input IF unit 56₁~ 56_NPacket data 57₁~ 57_NEach time is input, a route request signal is received. Then, assignment of output ports specified by these route request signals and connection scheduling are performed. An ACK signal is returned to the input IF unit that has been switched to the requested output port. The route request signal for which switching to the requested output port is disabled is buffered in the switch unit. Each switch section 58₀, 58₁Switches the packet data input from the input IF unit in response to the ACK signal to the output port specified by the route request signal.
[0037]
The output IF unit 51 includes first to N-th output IF units 59 corresponding to N output ports (not shown).₁~ 59_NIt has. 0-system and 1-system switch units 58 of the switch unit 52₀, 58₁The packet data switched by the first to Nth output IF units 59 corresponding to the destination output port₁~ 59_NIs input to any of First to Nth output IF units 59₁~ 59_NSelects packet data input from one of the switch units according to the switching control signal 55, and outputs the output packet data 60₁~ 60_NIs output as
[0038]
System switching of the packet switch device having such a configuration is controlled by the common control unit 54. When the switching instruction signal 53 is input, the common control unit 54 switches the route request signal buffered in the active switching unit at that time, and then switches to the standby switching unit. The switching control signal 55 is output so as to perform The standby switch unit that has received the switching control signal 55 clears the buffer of the standby route request signal, and performs all processing on the route request signal after receiving the switching control signal on the standby system side. I have.
[0039]
Next, in order to describe the packet switch device in the first embodiment in detail, a main part of the packet switch device will be described below.
[0040]
FIG. 2 is a diagram illustrating relevant components of the packet switch device according to the first embodiment, focusing on packet data transmitted and received among the input IF unit 50, the switch unit 52, and the output IF unit 51. . However, the same parts as those of the packet switch device shown in FIG.
[0041]
First input IF unit 56₁Is a packet data buffer 61 for buffering packet data input through an input port (not shown).₁And the packet data buffer 61₁SEL unit 62 for selecting an ACK signal from the active switch unit₁And the packet data 57₁Route request transmitting unit 63 for transmitting a route request signal to the switch unit every time a command is input₁And
[0042]
Packet data buffer 61₁Is constituted by a first-in first-out (First In First Out: hereinafter abbreviated as FIFO) memory. Here, when the buffering capacity of the route request in the switch unit is “M packets” and the number of input ports is “N”, the packet data buffer 61₁Is the capacity of “N × M packets”.
[0043]
SEL section 62₁Is connected to a 0-system switch unit 58 by a switching control signal (not shown).₀ACK signal 64 from₁And 1-system switch unit 58₁ACK signal 65 from₁ACK signal 66₁Is output as Select ACK signal 66₁Is the packet data buffer 61₁Is entered. Select ACK signal 66₁Packet data buffer 61 that has received₁Reads out only one packet, and switches the 0-system and 1-system switch units 58₀, 58₁Output to On the other hand, the selection ACK signal 66₁When transmission is impossible, the packet data is buffered as it is.
[0044]
Route request transmission unit 63₁Is the input packet data 57₁Is monitored, and an output port to be output is specified from the outgoing route information arranged as the header information.₁0-system and 1-system switch unit 58₀, 58₁Notify to
[0045]
The second to N-th input IF units 56₂~ 56_NThe configuration and operation of the first input IF unit 56₁Therefore, the description is omitted.
[0046]
0 system switch section 58₀Are the first to N-th input IF units 56₁~ 56_NRoute request signal 67 sent by₁~ 67_N0-system scheduler unit 68 that allocates each packet data to an output port from, and performs connection scheduling when allocation is duplicated.₀And the input packet data to the 0-system scheduler 68₀Switching data path unit 69 for switching to the output port assigned by₀And
[0047]
System 0 scheduler 68₀Are the first to N-th input IF units 56₁~ 56_NRoute request signal 67 notified from₁~ 67_NIs assigned to the input port to which the corresponding packet data is input. If the destination output port does not overlap, an ACK signal is sent to the input IF unit that sent each route request. If the destination output port is duplicated, an ACK signal is sent to one input IF unit selected by performing scheduling. As a result of this scheduling, route requests from the remaining input IF units that have not been selected are buffered. Therefore, the 0-system scheduler unit 68₀Are the first to N-th input IF units 56₁~ 56_NCorresponding to the route request signal 67₁~ 67_NRequest buffer 70 that buffers M packets for each₁~ 70_Nhave.
[0048]
Switching data path unit 69₀Is a 0-system scheduler unit 68 for each output port.₀Line switching so that packet data from the input port assigned by the server is transmitted.
[0049]
1-system scheduler section 68₁Are the first to N-th input IF units 56₁~ 56_NCorresponding to the route request signal 67₁~ 67_NRequest buffer 71 that buffers M packets for each₁~ 71_NThe operation is performed by the above-described 0-system scheduler 68.₀Therefore, the description is omitted.
[0050]
First output IF unit 59₁Is a SEL unit 72 which is a two-input one-output selector.₁have. SEL section 72₁Is a first output IF unit 59₁0 and 1 system switch unit 58 with the output port corresponding to₀, 58₁Packet data 73 respectively switched by₁, 74₁Is entered. SEL section 72₁Converts the packet data output from the active switch unit by a switching control signal (not shown) into output packet data 60.₁Selective output.
[0051]
The second to N-th output IF units 59₂~ 59_NThe configuration and operation of the first output IF unit 59₁Therefore, the description is omitted.
[0052]
Next, a scheduler unit that transmits and receives the above-described route request signal and ACK signal will be described in detail.
[0053]
FIG. 3 is a diagram illustrating the 0-system and 1-system scheduler unit 68 shown in FIG.₀, 68₁Is a diagram showing the relevant components of the configuration, paying attention to the route request signal and the ACK signal input and output. However, the same reference numerals are given to the same parts in the packet switch device and each scheduler unit shown in FIGS. 1 and 2, and the description is omitted. System 0 scheduler 68₀The configuration and operation of the first system scheduler unit 68₁In the following, the 0-system scheduler unit 68₀Will be described only.
[0054]
System 0 scheduler 68₀Are the first to N-th input IF units 56₁~ 56_NRoute request signal 67 corresponding to₁~ 67_NRequest buffer 71 that buffers M packets for each₁~ 71_NRoute request buffering unit 75 having₀And the route request signal 67₁~ 67_NScheduling section 76 for allocating input ports and output ports required by₀And the scheduling unit 76₀1st to Nth input IF units 56 according to the allocation result by₁~ 56_NACK signal 64₁~ 64_NACK signal generation unit 77 that generates₀And Further, the 0-system scheduler unit 68₀Is a switching instruction receiving unit 78 to which a switching instruction signal 53 from a higher-level device is input.₀And a buffer reset unit 79 to which the switching control signal 55 from the common control unit 54 is input.₀And
[0055]
Route request buffering unit 75₀Are, as described above, the first to N-th input IF sections 56 corresponding to the respective input ports.₁~ 56_NAre buffered for M packets corresponding to M packets. Scheduling unit 76₀Performs scheduling of a switching operation in accordance with a route request from each input IF unit, and transmits an ACK signal as transmission permission if the output port cannot be allocated to the input IF unit as requested as a result of the scheduling. The received route request signal is sequentially buffered in these route request buffers. ACK signal generation unit 77₀Is a scheduling unit 76₀As a result of the scheduling, if the output port can be assigned to the input IF unit as requested, an ACK signal as transmission permission is transmitted to the corresponding input IF unit. Switching instruction receiving unit 78₀Receives the switching instruction signal from the host device. At that time, if the own system is the active system, the ACK signal generation unit 77₀To start the current route request buffering unit 75₀Is performed for all route request signals buffered in the ACK signal, and an ACK signal is responded. On the other hand, the switching instruction receiving unit 78₀If the own system is a standby system at the time of receiving the switching instruction signal, the buffer reset unit 79₀Receiving the switching control signal 55 received by the route request buffering unit 75₀Reset.
[0056]
Next, a switching control signal that causes such a scheduler to respond to an ACK signal or reset the route request buffer will be described.
[0057]
FIG. 4 is a diagram showing the relevant components of the switching control signal transmitted and received by the packet switching device according to the first embodiment. However, the same reference numerals are given to the same portions in the packet switch device and each scheduler unit shown in FIGS. 1 to 3, and the description is omitted. The common control unit 54 monitors the reception of the switching instruction signal 53 from a higher-level device (not shown), and counts “N × M packet time” when the reception is detected by the switching instruction receiving unit 80. It has a timer counting unit 81 and a switching control unit 82 that generates a switching control signal 55 that distributes a switching instruction signal notified by the timer counting unit 81 after “N × M packet time” has elapsed to each unit. The switching control signal 55 generated by the switching control unit 82 is connected to the first to Nth input IF units 56₁~ 56_NSEL section 62₁~ 62_N, The first to N-th output IF units 59₁~ 59_NSEL section 72₁~ 72_NThe 0-system and 1-system switch units 58₀, 58₁Buffer reset unit 79₀, 79₁Is output to
[0058]
Next, the operation of the packet switch device in the first embodiment having the above-described configuration will be described. Hereinafter, a description will be given assuming that the active system is system 0 and the standby system is system 1.
[0059]
First to Nth input IF units 56₁~ 56_NThen, as shown in FIG. 2, the route request transmitting unit 63₁~ 63_NThus, packet data 57 input through N input ports (not shown)₁~ 57_N, The destination output port is specified from the respective header information, and the route request signal 67₁~ 67_NAnd the 0-system and 1-system switch units 58, respectively.₀, 58₁0-system and 1-system scheduler unit 68₀, 68₁Send to
[0060]
Route request signal 67₁~ 67_N0 and 1 system scheduler unit 68₀, 68₁Correspond to the scheduling units 76 as shown in FIG.₀, 76₁, A destination output port required for each route request is allocated. As a result, when output ports serving as destinations for a plurality of route requests do not overlap, the ACK signal generation unit 77₀, 77₁Responds with an ACK signal. On the other hand, when an output port serving as a destination for a plurality of route requests overlaps, scheduling is performed, an output port is assigned to only one of the route requests, and the ACK signal generation unit 77₀, 77₁The ACK signal is returned to the input IF unit that has transmitted the assigned route request. As a result of scheduling because the output ports are duplicated and the output port is not assigned, the route request buffering unit 75₀, 75₁To buffer. The packet data that has not been responded by the ACK signal is stored in the packet data buffer 61 of the input IF unit corresponding to the input port.₁~ 61_NIs stored in
[0061]
0-system and 1-system scheduler unit 68₀, 68₁ACK signal generation unit 77₀, 77₁The ACK signal transmitted from is input to the SEL unit of each input IF unit as shown in FIG. Each SEL section 62₁~ 62_NIs an ACK signal 64 of the 0 system which is an active system alternatively by the switching control signal 55.₁~ 64_NSelect The selected ACK signals are selected ACK signals 66, respectively.₁~ 66_NIs output as In each input IF unit, when the selection ACK signal is active indicating transmission permission, the corresponding packet data is transmitted to the 0-system and 1-system switch units 58 as shown in FIG.₀, 58₁Switching data path section 69₀, 69₁Send to
[0062]
Switching data path unit 69₀, 69₁Are the system 0 and system 1 scheduler sections 68, respectively.₀, 68₁Thus, packet data from each input IF unit is switched according to routing information as a result of assignment of each output port. Switched packet data 73₁~ 73_N, 74₁~ 74_NAre the first to N-th output IF units 59 corresponding to the output port serving as the destination.₁~ 59_NIs output to
[0063]
First to Nth output IF units 59₁~ 59_NPacket data 73 output to₁~ 73_N, 74₁~ 74_NIs the SEL unit 72₁~ 72_NIs entered. Each SEL section 72₁~ 72_NIs switched by the switching control signal 55, and alternatively, the 0-system packet data 73 which is the active system is₁~ 73_NSelect The selected packet data is output packet data 60 respectively.₁~ 60_NIs output as
[0064]
Here, when the switching instruction receiving unit 80 of the common control unit 54 detects the reception of the switching instruction signal 53 from a higher-level device (not shown), the timer counting unit 81 delays the switching instruction signal 53 by “N × M packet time” and performs switching control. This is notified to the unit 82. That is, the switching instruction signal 53 and the switching control signal 55 have a time difference of “N × M packet time”.
[0065]
The switching instruction signal 53 is transmitted to the 0-system and 1-system scheduler unit 68₀, 68₁Is also entered. The switching instruction signal 53 is transmitted to the switching instruction receiving unit 78.₀, 78₁Is detected by Switching instruction receiving section 78 of active system 0₀Is an ACK signal generation unit 77₀Is started, and at that time the route request buffering unit 75₀Route request buffer 70₁~ 70_NThe scheduling unit 76 for the route request signal buffered by a maximum of M₀After the assignment of the output port, the response by the ACK signal is sequentially performed. The switching data path unit 69 of the active system 0₀Receives the corresponding packet data buffered in the packet data buffer from each input IF unit that has received the ACK signal, and outputs it to the corresponding output IF unit after the switching operation.
[0066]
As described above, by making the ACK signal response only to the route request signal buffered at the time of receiving the switching instruction signal, the active system responds to the route request requested after receiving the switching instruction signal. The scheduling is not performed. The packet data input after receiving the switching instruction signal is buffered in the packet data buffer of the input IF unit. Here, since only M route request buffers are buffered, the time during which all packet data buffered at the time of receiving the switching instruction signal is switched by the response of the ACK signal is a maximum of “N × "M packet time" is required. Therefore, in each input IF unit, it is necessary to buffer the packet data input during that time.₁~ 61_NRequires a buffer of an amount corresponding to “N × M packets”.
[0067]
The timer count unit 81 of the common control unit 54 measures “N × M packet time” as a time during which all the packet data buffered at the time of receiving the switching instruction signal 53 is switched in response to the ACK signal. Then, after this time has elapsed, the switching control is executed by distributing the switching control signal 55 to each unit. That is, after switching all the packet data buffered at the time of receiving the switching instruction signal, the first to N-th input IF units 56₁~ 56_NSEL section 62₁~ 62_NAnd the first to N-th output IF units 59₁~ 59_NSEL section 72₁~ 72_NAre simultaneously switched to system 1 by the switching control signal 55. At the same time, as shown in FIG.₁1 system scheduler section 68₁Buffer reset unit 79 in₁The route request buffering unit 75₁All route request buffers 71₁~ 71_NReset.
[0068]
After the simultaneous system switching by the switching control signal 55, the first to N-th input IF units 56 are received from the time when the switching instruction signal 53 is received to the time when the system switching is performed by the switching control signal 55.₁~ 56_NThen, the scheduling operation is started again for the packet data buffered in the above and the packet data input thereafter.
[0069]
As described above, the packet switch device according to the first embodiment includes the first to N-th input IF units 56 provided corresponding to the N input ports.₁~ 56_NWhen packet data is input to the system, switching is performed in response to an ACK signal in response to a route request requesting a destination output port. When buffering a maximum of M packet data for each input port for packet data not to be processed, the first to Nth input IF units 56₁~ 56_NA timer count unit for providing a packet data buffer for buffering input packet data by an amount corresponding to “N × M packet” and counting “N × M packet time” from the time when a switching instruction signal is received from a higher-level device Is provided. Then, after performing the response processing of the ACK signal to all the route requests buffered at the time of receiving the switching instruction signal, the system switching is performed simultaneously by the switching control signal delayed by the timer count unit. Further, the standby route request buffer is reset by the switching control signal. Accordingly, even when the buffering state of the route request is different between the active system and the standby system at the time of the switching instruction from the higher-level device, the route request received by the active system before receiving the switching instruction signal is received. For the signal, the switching operation is completed in the active system before the switching is executed, so that the packet data is not lost due to the switching, so that the apparatus becomes complicated and the processing time is unnecessarily delayed. The system switching can be performed without an instantaneous interruption without inducing. In addition, it is possible to avoid an unnecessary response of the ACK signal after executing the switching for the route request signal buffered in the standby system before receiving the switching control signal.
[0070]
Second embodiment
[0071]
In the packet switching device according to the first embodiment, when the switching instruction signal is received, the system switching is performed simultaneously after waiting for a preset worst case “N × M packet time”. . However, the packet switch device in the second embodiment uses the common control unit in the 0-system and 1-system scheduler units to terminate the response of the ACK signal to the route request buffered at the time when the switching instruction signal is received. , So that it is not necessary to wait for “N × M packet time” assuming the worst case every time the system is switched.
[0072]
In the following, only the portions of the packet switch device according to the second embodiment that differ from the packet switch device according to the first embodiment described above will be described.
[0073]
FIG. 5 is a diagram showing the relevant components of the second embodiment, focusing on the route request signal and the ACK signal input / output in the 0-system and 1-system schedulers. However, the same parts as those of the packet switch device in the first embodiment shown in FIG. Since the configuration and operation of the 0-system scheduler are the same as those of the 1-system scheduler, only the 0-system scheduler will be described below.
[0074]
System 0 scheduler 90₀Are the first to N-th input IF units 56₁~ 56_NRoute request signal 67 corresponding to₁~ 67_NRequest buffer 71 that buffers M packets for each₁~ 71_NRoute request buffering unit 75 having₀And the route request signal 67₁~ 67_NScheduling unit 91 for allocating input ports and output ports required by₀And the scheduling unit 91₀1st to Nth input IF units 56 according to the allocation result by₁~ 56_NACK signal 64₁~ 64_NACK signal generation unit 77 that generates₀And Further, the 0-system scheduler unit 90₀Is a switching instruction receiving unit 78 to which a switching instruction signal 53 from a higher-level device is input.₀And a buffer reset unit 79 to which the switching control signal 55 from the common control unit is input.₀And The 0-system scheduler 90₀Is the ACK end display section 93₀When the response of the ACK signal to all the route request signals buffered corresponding to all the input ports at the time when the switching instruction signal 53 is received, the AKC end indication signal 94₀Is sent out.
[0075]
As described above, the first-system scheduler unit 90₁Is composed of a 0-system scheduler unit 90₀Is the same as
[0076]
ACK end display section 93₀, 93₁ACK end indication signal 94 output from₀, 94₁Is input to the common control unit 95. The common control unit 95 monitors the reception of the switching instruction signal 53 from a higher-level device (not shown), and the switching instruction signal as the switching control signal 92 when the reception is detected by the switching instruction receiving unit 80. And a switching control unit 96 for distributing to each unit.
[0077]
The packet switch device according to the second embodiment having such a configuration, when receiving the switching instruction signal, indicates the end of the response of the ACK signal to the route request buffered by the ACK end display unit 93.₀, 93₁, And the common control unit 95 is notified, so that the switching operation is completed in the active system before the switching is executed, and then the system switching can be performed simultaneously by the switching control signal 92 immediately. Therefore, it is not necessary to wait for “N × M packet time” assuming the worst case every time system switching is performed. Furthermore, since the time from the reception of the switching instruction signal to the simultaneous switching by the switching control signal can be reduced, the amount of packet data to be buffered in the input IF unit before the switching is performed can be reduced. And the load on the scheduling operation of the switch after switching can be reduced.
[0078]
【The invention's effect】
As explained aboveClaim 1According to the invention described above, even when the buffering state of the route request is different between the active system and the standby system at the time when the switching instruction is issued from the higher-level device, the route request is received by the active system before receiving the switching instruction signal. Since the switching operation is completed in the active system before the switching is performed for the route request signal, the loss of the packet data due to the switching is avoided, and the apparatus becomes complicated and the processing time is reduced. System switching can be performed without an instantaneous interruption without causing unnecessary delay.
[0079]
AlsoClaim 2According to the described invention,Claim 1In addition to the effects of the invention described above, system switching can be performed quickly without waiting for a predetermined time as a time until switching is completed for all route request signals stored in the route request storage unit. Further, since the time from the reception of the switching instruction signal to the simultaneous switching can be reduced, the load of the scheduling operation of the switch after the switching can be reduced.
[0080]
furtherClaim 3According to the described invention, it is possible to reduce extra processing time such as requesting retransmission of previously input packet data in order to avoid loss of packet data, and to quickly start switching operation after execution of system switching. Can be.
[0081]
furtherClaim 4According to the invention described above, the buffer of the route request of the standby system is initialized together with the execution of the system switching, so that the route request signal buffered in the standby system before the execution of the system switching is executed after the execution of the switching. It is not necessary to perform unnecessary response processing, and the speed of the system switching processing can be increased.
[Brief description of the drawings]
FIG. 1 is a schematic configuration diagram illustrating a schematic configuration of a packet switch device according to a first embodiment of the present invention.
FIG. 2 is a block diagram illustrating relevant components focusing on packet data transmitted and received between an input IF unit, a switch unit, and an output IF unit of the packet switch device according to the first embodiment.
FIG. 3 is a block diagram showing a main part related to the route request signal and the ACK signal input and output in the 0-system and 1-system schedulers of the packet switch device in the first embodiment.
FIG. 4 is a block diagram showing a relevant main part of the switching control signal transmitted and received in the packet switching device according to the first embodiment, focusing on the switching control signal;
FIG. 5 is a block diagram showing a main part related to the route request signal and the ACK signal input and output in the 0-system and 1-system schedulers in the second embodiment.
FIG. 6 is a block diagram illustrating an outline of a configuration of a packet switching device according to a first conventionally proposed example.
FIG. 7 is a block diagram showing an outline of a configuration of a packet switch device in a second conventionally proposed example.
[Explanation of symbols]
50 Input IF section
51 Output IF section
52 Switch section
53 Switching instruction signal
54,95 Common control unit
55, 92 Switching control signal
56₁~ 56_N  First to Nth input IF units
57₁~ 57_N, 73₁~ 73_N, 74₁~ 74_N  Packet data
58₀  0 system switch
58₁  1 system switch
59₁~ 59_N  First to Nth output IF units
60₁~ 60_N  Output packet data
61₁~ 61_N  Packet data buffer
62₁~ 62_N, 72₁~ 72_N  SEL section
63₁~ 63_N  Route request transmission section
64₁~ 64_N, 65₁~ 65_N  ACK signal
66₁~ 66_N  Select ACK signal
67₁~ 67_N  Route request signal
68₀, 90₀  System 0 scheduler part
68₁, 90₁  1st scheduler section
69₀, 69₁  Switching data path section
70₁~ 70_N, 71₁~ 71_N  Route request buffer
75₀, 75₁  Route request buffering unit
76₀, 76₁, 91₀, 91₁  Scheduling unit
77₀, 77₁  ACK signal generator
78₀, 78₁, 80 Switching instruction receiving unit
79₀, 79₁  Buffer reset section
81 Timer count section
82, 96 switching control unit
93₀, 93₁  ACK end display section
94₀, 94₁  ACK end indication signal

Claims (4)

Route request sending means for sending a route request signal indicating a destination output port of packet data input corresponding to each of the plurality of input ports ;
An input packet data storage means for sequentially storing the packet data corresponding to the route request signal sent by these routes the request sending means corresponding to said input port when a predetermined acknowledge signal is not answered,
Output port assigning means for assigning an output port based on the request signal sent by the route request sending means;
Response means for responding to the source of the route request signal to which the output port has been assigned by the output port allocating means, and a route request storage for storing a route request signal to which no output port has been allocated by the output port allocating means Means, and connection switching means for switching the packet data read from the input packet data storage means to the output port allocated by the output port allocating means in response to the acknowledgment signal returned by the response means. First and second switch means configured in duplicate,
Data transmitting means for transmitting packet data corresponding to the active signal among the first and second acknowledgment signals responded by the response means of the first and second switch means,
Data selection means for selecting and outputting active packet data from among the packet data switched by the connection switching means of the first and second switch means;
Switching instruction receiving means for detecting reception of a predetermined switching instruction signal,
When the switch instruction signal is received by the switch instruction receiving means, the response processing for all the route requests stored in the active route request storage means in the active response means of the first and second switch means. Processing instruction means for instructing
Timer means for measuring the maximum time required for response processing to all route requests stored in the predetermined route request storage means when the switching instruction signal is received,
A packet switching device comprising: a system switching execution unit that performs system switching of the first and second switch units when the maximum time is measured by the timer unit . Route request sending means for sending a route request signal indicating a destination output port of packet data input corresponding to each of the plurality of input ports ;
An input packet data storage means for sequentially storing the packet data corresponding to the route request signal sent by these routes the request sending means corresponding to said input port when a predetermined acknowledge signal is not answered,
An output port allocating means for allocating an output port based on the request signal transmitted by the route request transmitting means, and a response for responding an acknowledgment signal to a source of the route request signal to which the output port is allocated by the output port allocating means Means, a route request accumulating means for accumulating a route request signal to which an output port has not been assigned by the output port assigning means, and reading from the input packet data accumulating means in response to the acknowledgment signal responded by the responding means. First and second switch means having a duplex configuration, comprising: connection switching means for switching the output packet data to the output port allocated by the output port allocation means;
Data sending means for sending packet data corresponding to the active approval signal among the first and second approval signals responded by the first and second switch means,
Data selection means for selecting and outputting an active packet data among the packet data switched by the first and second switch means;
Switching instruction receiving means for detecting reception of a predetermined switching instruction signal,
When the switch instruction signal is received by the switch instruction receiving means, the response processing for all the route requests stored in the active route request storage means in the active response means of the first and second switch means. Processing instruction means for instructing
Response processing end monitoring means for monitoring the end of the response processing instructed by the processing instruction means;
A packet switching device comprising: a system switching executing unit that performs system switching of the first and second switch units when the end of the response process is detected by the response process end monitoring unit . The input packet data storage means has a storage capacity for storing packet data input from the time when the switching instruction signal is received by the switching instruction receiving means to the time when system switching is performed by the system switching performing means. The packet switch device according to claim 1 or 2, wherein the packet switch device has: When the system switching is performed by the system switching performing unit, the storage contents of the route request storage unit of the switch unit of the first and second switch units that was the standby system before the reception of the switching instruction signal is cleared. 4. The packet switch device according to claim 1, further comprising a route request initialization unit.

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