JPH05107281A - Frequency measuring circuit - Google Patents

Abstract

PURPOSE:To detect a frequency change outside a frequency range set at a high speed by measuring a wide range of frequency. CONSTITUTION:A conventional reciprocal frequency measuring circuit is provided with a time counter circuit 1, a wave number counter circuit 2, a circuit 4 for converting measurement results to a floating point form, an arithmetic circuit to execute a computation of fIN=nXf0/m, a comparison reference data register 8 and a comparison circuit 9 which compares computation results with a reference data set on the register 8 in the floating point form. In addition, a counter control circuit 3 is provided with a function for performing a continuous measurement by a conversion end signal 15 and the subsequent measurement is performed in parallel with a processing with the arithmetic circuit 5 thereby achieving a fast detection. Moreover, a time out counter circuit 10 is provided to detect than an input signal disappears.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency measuring circuit used in a low frequency measuring device or the like for performing an automatic frequency tuning function such as distortion factor measurement in an audio signal measuring device or the like.

[0002]

2. Description of the Related Art FIG. 7 shows an example of a conventional frequency measuring circuit. In FIG. 7, 71 is a time counter circuit that operates with a reference clock, 72 is a wave number counter circuit that counts the wave number with an input signal as a clock, and 73 is a time counter circuit 71 and a wave number counter circuit 72 that are synchronized with the input signal. A counter control circuit for starting and stopping, and a control processor 74 for controlling the counter control circuit 73 to perform data calculation.

The control processor 7 is provided in the counter control circuit 73.
When there is a measurement start instruction from the counter 4, the counter control circuit 73
Is the time counter 7 depending on the rising edge of the input signal.
When the 1 and wave number counter circuit 72 is activated and the time counter circuit 71 counts above a certain level, a prescribed count end signal is generated. After the specified count end signal is generated,
In synchronization with the next rising edge of the input signal, the counter control circuit 73 stops the measurement start / stop signal and stops the counting of the time counter circuit 71 and the wave number counter circuit 72.

As a result, the input frequency f _IN is obtained by f _IN = n × reference clock frequency / m. Here, n is the count value of the wave number counter circuit 72, and m is the count value of the counter of the time counter circuit 71. In this method, when the frequency is low, n = 1
In the case where the frequency is high, the n counter counts many cycles in the time when the wave number counter circuit 72 counts m when the frequency is high. Therefore, it is possible to measure over a wide frequency range. In addition, the control processor 74
Can obtain the frequency by using each counter circuit.

As described above, even the conventional frequency measuring circuit described above can operate in a wide frequency range and detect frequency fluctuations outside the set frequency range.

[0006]

However, although the above-mentioned conventional frequency measuring circuit is suitable for frequency measurement, in order to confirm frequency stability, in order to confirm frequency stability, data is collected in each counter circuit each time frequency measurement is completed. It was necessary to read it from the computer, perform the operation by software, and judge the result. For this reason, if the number of measurements is large, it is necessary to perform this arithmetic processing frequently, and depending on the processing of the processor, it may not be accepted and the actual frequency fluctuation may occur until it is detected. There is a problem that it takes extra time and the response becomes slow.

Further, in the conventional frequency measuring circuit, when there is no input or when there is no input during measurement,
There is a problem that the counter circuit remains stopped and the frequency measurement is not completed.

The present invention solves such a conventional problem, and an object of the present invention is to provide an excellent frequency measuring circuit capable of quickly detecting frequency fluctuations.

Another object of the present invention is to provide an excellent frequency measuring circuit capable of detecting the no-input state when there is no input or when there is no input during measurement. ..

[0010]

In order to achieve the above object, the present invention provides a time counter circuit for counting with a constant clock in synchronization with an input signal, a wave number counter circuit for counting the wave number of the input signal, A counter control circuit that controls the operations of the time counter circuit and the wave number counter circuit, a conversion circuit that converts the count value of each counter circuit into a floating point format, and an operation circuit that performs the operation of the data converted by the conversion circuit in the floating point format. By comparing the result register data and the comparison reference data register data with the result register that saves the result of the arithmetic circuit in the floating point format, the comparison reference data register that can set the comparison reference data in the floating point format, And a comparator circuit for detecting a variation exceeding the set frequency range.

According to the present invention, the counter control circuit has a continuous measurement function, and the next frequency measurement is performed in parallel with the processing in the arithmetic circuit to shorten the measurement time and speed up the detection. Is.

The present invention is further provided with a time-out counter circuit so that it can detect that the input signal has disappeared for a certain time or longer.

[0013]

Therefore, according to the present invention, by converting the counter result of the conventional frequency measuring circuit into the floating point format, a wide frequency band can be represented by a small number of bits, and the floating point format data can be calculated. By f
_IN = n × reference clock frequency / m is calculated, and the calculation result is compared with the comparison reference data register in the frequency range set in the floating-point format to easily detect the frequency fluctuation with few bit comparisons. It has the effect of being able to.

Further, according to the present invention, by utilizing the fact that it is not necessary to hold the counter data after the processing in the floating point format conversion circuit is completed, the next measurement is started by the conversion end signal, and the calculation is performed. Since the processing and the measurement processing are performed in parallel, there is an effect that the variation can be detected earlier.

Furthermore, according to the present invention, since the timeout counter circuit operates independently of the input signal from the start of measurement, there is no input signal for a certain period of time, and the measurement counter does not start the counter operation. This has the effect of detecting a no-input state.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the configuration of a frequency measuring circuit according to an embodiment of the present invention. In FIG. 1, 1 is a time counter circuit that operates with a reference clock, 2 is a wave number counter circuit that counts the wave number using an input signal as a clock, and 3 is each counter circuit 1 and 2 in synchronization with the rising edge of the input signal. Counter control circuit for starting and stopping, 4
Is a conversion circuit for converting the counter results of the counter circuits 1 and 2 into a floating point format, 5 is an operation circuit for performing an operation of fIN = n × reference clock frequency / m, and 6 is a result register for leaving the operation result of the operation circuit 5. , 7 is a reference clock data register for setting the reference clock frequency in the floating point format for the arithmetic circuit, 8 is a comparison reference data register in which the comparison reference data can be set in the floating point format, and 9 is the data in the result register 6 and the comparison reference data. A comparison circuit for comparing the data in the register 8 with a time-out counter circuit 10
11 is an arithmetic comparison control circuit for controlling the entire arithmetic comparison circuit,
A data interface unit 12 is connected to the overall control processor. A reference clock 13 is connected to the time counter circuit 1 and the timeout counter circuit 10. 14 is an input signal, 15 is a conversion end signal, 16
Is a specified count end signal, 17 is a measurement start / stop signal,
Reference numeral 18 is a count end signal, 19 is a timeout occurrence signal, and 20 is a fluctuation detection signal.

Next, the operation of the above embodiment will be described.
For normal frequency measurement, the data interface unit 12
A measurement start instruction is transmitted to the counter control circuit 3 through the counter control circuit 3, and the counter control circuit 3 starts the measurement start / stop signal 17 in synchronization with the rising edge of the input signal 14, and the counter circuits 1 and 2 start counting. To do. For the end of counting, after the specified count end signal 16 is output from the time counter circuit 1, the measurement start / stop signal 17 from the count control circuit 3 is stopped by the next rising edge of the input signal 14, and the measurement ends.

FIG. 2 shows a block diagram of the time counter circuit 1. In FIG. 2, reference numeral 21 is a time measuring counter, which is composed of a 24-bit up counter in this embodiment. Reference numeral 22 denotes a signal selection circuit, and when the output of the upper 10 bits of the time measurement counter 21 is connected to the signal selection circuit 22, when the bit of the time measurement counter 21 selected by the signal selection circuit 22 becomes 1. Can be selected as the specified count end signal 16. Since the time measurement counter 21 is a counter that counts up with the reference clock 13, if the higher order bit of the time measurement counter 21 is selected, the measurement time until the generation of the specified count end signal 16 becomes longer, but the time measurement counter 21 The measurement accuracy is improved by increasing the data of. Conversely, if the lower bit of the time measurement counter 21 is selected, the measurement time is shortened, but the count data becomes small and the measurement accuracy becomes low. As described above, the measurement accuracy and the measurement time can be selected by setting the signal selection circuit 22.

Returning to FIG. 1, the counter control circuit 3 which has detected the measurement end timing stops the counters of the time counter circuit 1 and the wave number counter circuit 2, and transmits the count end signal 18 to the arithmetic comparison control circuit 11. The arithmetic comparison control circuit 11 is started by the count end signal 18, the conversion circuit 4 sequentially converts the data of the counter circuits 1 and 2 into a floating point format, and the arithmetic circuit 5 uses the reference clock data register 7 to make a floating point. The calculation is executed and the calculation result is output to the result register 6. This calculation result is the measurement frequency, and normal frequency measurement can be performed.

On the other hand, the data of the result register 6 can be directly set in the comparison reference data register 8 or immediate data can be set through the data interface unit 13. When performing the variation check, the measured value or data is directly set in the comparison reference data register 8 as described above. When the measurement result becomes the set value as the reference frequency of the BEF (band removal filter) in the distortion rate measurement circuit described later, by setting the result register 6 directly in the comparison reference data register 8, the set frequency of the BEF is changed. Can be detected.

In the fluctuation check measurement, the counter circuits 1 and 2 are operated by the counter control circuit 3 in the same manner as in the above case. That is, the conversion comparison control circuit 11 transmits the conversion end signal 15 to the counter control circuit 3, and the counter circuits 1 and 2 which do not need to hold the data after the conversion is completed are used to perform the counter in parallel with the arithmetic processing. The control circuit 3 can start measuring the measurement start / stop signal 17 and start the next measurement. As a result, the measurement and the arithmetic processing can be continuously performed in parallel, and the fluctuation can be detected quickly.

The result after calculation in the calculation circuit 5 is set in the result register 6 and compared with the data in the comparison reference data register 8 in the floating point format by the comparison circuit 9. Since the result register 6 and the comparison reference data register 8 are both configured in the floating point format, the exponent part and the mantissa part of both registers are determined to be coincident with each other from the upper bits, so that the frequency fluctuation can be easily determined by a small number of bit comparisons. You can

FIG. 3 shows a block diagram of the comparison circuit 9. In FIG. 3, 31 is a comparison effective range selection circuit, 32
Is a comparison circuit for each bit, and 33 is a comparison signal validity determination gate for each bit. In the case of the present embodiment, both the comparison circuit 32 and the comparison signal validity determination gate 33 are provided with circuits for 20 bits in the same format. There is. Reference numeral 34 is a comparison signal synthesizing circuit that logically synthesizes the comparison result signals. By setting the comparison bit in the comparison effective range selection circuit 31, the comparison signal validity determination gate 33 determines whether the comparison result of each bit is valid, and only the data in the effective range is synthesized by the comparison signal synthesis circuit 34, and the fluctuation occurs. It is generated as a detection signal 20. In the floating-point format, since the weight of the data increases in the order of the sign, the exponent part, and the mantissa part and from the upper part of each part, the comparison effective range selection circuit 31 compares the comparison data of bits whose weight is smaller than the designated bit. It is configured to automatically validate the decision. As one condition of the embodiment, if the comparison bits are set to the sign bit, all bits of the exponent part, and the upper 7 bits of the mantissa part, the lower mantissa part 1
Since the comparison result of 6 bits is ignored by the comparison signal validity judgment gate 33, it is not detected as a change in the data change in the lower 16 bits of the mantissa, and changes when there is a change in the exponent part or the upper 7 bits of the mantissa. Then detected. By changing the comparison bit in the comparison bit above,
The range of comparison data can be changed.

Next, the operation for detecting the condition that there is no input will be described. FIG. 4 shows a block diagram of the timeout counter circuit. In FIG. 4, reference numeral 41 is a data register for time-out data, and 42 is a time-out counter configured by a down counter for loading the data in the data register 41 and down-counting with the reference clock 13. An edge detection circuit 43 detects the rising and falling edges of the input signal 14, and the detection signal is connected to the timeout counter 42. Data interface unit 1 in counter control circuit 3
When the counter operable state is set through 2, the timeout counter circuit 10 also becomes operable at the same time. The time-out counter 42 loads the data in the data register 41 regardless of the input signal 14 and starts counting down. When the input signal 14 is present, the rising edge or the falling edge of the input signal is detected by the edge detection circuit 43, and the time-out counter 42 reloads the data of the data register 41 by the detection signal and starts down counting from the beginning. If there is no input signal 14, the edge detection circuit 43 does not perform detection, so the timeout counter 42 finishes counting and generates the timeout generation signal 19. This makes it possible to detect the non-input state of the input signal. By setting appropriate data in the data register 41 according to the measurement frequency, the time-out detection signal 19 is generated when the input signal 14 disappears, which is the counter control circuit 3.
And the counter measurement is forcibly terminated. The time-out occurrence signal 19 is also connected to the result register 6 and brings the sign bit of the result register 6 into a negative state. Since the comparison circuit 9 performs comparison including the sign bit,
When the sign bit becomes negative, it is detected as a fluctuation, and the overall control processor connected to the data interface unit 12 receives the fluctuation detection signal 20 and then reads the data. Therefore, the time-out state can be detected by the same fluctuation check. Also, the wave number counter circuit 2
Also, the time counter circuit 1 outputs the overflow signals of the counters 1 and 2, and this signal is also connected to the result register 6 similarly to the time-out occurrence signal, and the sign bit of the result register 6 is in the negative state. By doing so, an input signal outside the measurement range can be detected.

FIG. 5 shows a BE using the above frequency measuring circuit.
1 shows the configuration of an F (band removal filter) automatic frequency tracking type distortion factor measuring circuit. In FIG. 5, 51
Is an input amplifier to which the signal under measurement is input.
52 is a BEF, which has a function of removing the set frequency. Reference numeral 53 is a detection circuit, which detects the remaining voltage removed by the BEF 52 and the input voltage from the input amplifier 51, respectively. Reference numeral 54 is a reference clock generation circuit for generating a reference clock. Reference numeral 55 denotes the frequency measuring circuit according to the above embodiment, which is integrated and compacted in this configuration. Reference numeral 56 denotes an overall control processor for controlling the entire circuit, which performs arithmetic processing of a result detected by the detection circuit 53, frequency setting of the BEF 52, initialization of the frequency measuring circuit 55, and operation control.

Next, the operation of the distortion rate measuring circuit will be described. The measurement signal is input to the input amplifier 51, where the TTL level is converted to an appropriate level. The output signal of the input amplifier 51 is input to the frequency measurement circuit 55, the frequency is measured by general measurement, the BEF 52 is set by the overall control processor 56 according to the measurement result, and the basic frequency of the input signal is removed by the BEF 52. The overall control processor 56 detects the output signal of the input amplifier 51 and the output signal of the BEF 52 by the detection circuit 53, and divides the output signal data of the BEF 52 by the detection data of the output signal of the input amplifier 51 to obtain the distortion rate of the input signal. To measure.

FIG. 6 is a characteristic diagram of the BEF 52. The reference frequency f0 is removed and the harmonics f1 to f of the reference frequency f0 are removed.
5 shows the characteristic of passing 5 as it is. The distortion rate is obtained by the ratio between the level of the entire input signal and the remaining signal level excluding the reference frequency.

In the circuit shown in FIG. 5, the frequency of the input signal is measured by the frequency measuring circuit 55, and the fluctuation detection signal detected by the frequency measuring circuit 55 when the frequency changes causes the overall control processor 56 to control the BEF 52 appropriately. By resetting to a different frequency position, the distortion rate can be measured following the frequency. In addition, BEF52
Has an analog tuning circuit, and can automatically follow the measurement even if the input frequency fluctuates by about ± 1% with respect to the set reference frequency. On the other hand, since it is an analog tuning method, if different reference values are set within ± 1%, it takes time for the circuit to stabilize and the tuning tends to slow down. Therefore, the measurement can be performed at high speed and safely by not making the setting for the variation within the tuning range but making the setting only when the variation is exceeded.

When the fluctuation range is set in the frequency measuring circuit 55 and the measurement is performed, the frequency measuring circuit 55 sequentially performs the measurement and outputs nothing while the comparison condition is satisfied.
The overall control processor 56 can perform other processing. If the frequency fluctuates and exceeds the setting range, the frequency measurement circuit 55
Outputs a fluctuation detection signal to the overall control processor 56.

Since the frequency calculation time is about 40 μsec when the clock is 20 MHz, the fluctuation can be transmitted quickly.

Further, even if there is no input during the measurement, by setting the timeout condition to a value lower than the current measurement frequency, the fluctuation detection signal from the frequency measuring circuit 55 is entirely controlled by the occurrence of the timeout condition. The no-input state is transmitted to the processor 56, and the no-input state is measured by the frequency measuring circuit 55.
You can know it by reading from.

In the embodiment shown in FIG. 1, the frequency is set in advance in the comparison reference data register 8 through the data interface section 12, so that the frequency can be detected within the set range. Can also utilize the present invention.

[0033]

As is apparent from the above embodiment, the present invention compares the measurement function such as the frequency automatic tracking function and the specific frequency detection function with the reference data in the floating point format to thereby obtain a wide frequency range. The effect is that the frequency fluctuation can be detected with a specified range width.

Further, according to the present invention, since the next measurement can be started in parallel with the arithmetic processing, there is an effect that the fluctuation can be detected at high speed.

Further, according to the present invention, the non-input state of the input signal can be detected by the time-out by the digital circuit without having a special analog detection circuit.
This has the effect of providing a circuit that is easy to integrate, compact, and inexpensive.

[Brief description of drawings]

FIG. 1 is a block diagram of a frequency measuring circuit according to an embodiment of the present invention.

FIG. 2 is a block diagram of a time counter circuit in the frequency measurement circuit.

FIG. 3 is a block diagram of a comparison circuit in the frequency measurement circuit.

FIG. 4 is a block diagram of a timeout counter circuit in the frequency measurement circuit.

FIG. 5 is a block diagram of a distortion factor measurement circuit using the same frequency measurement circuit.

FIG. 6 is a characteristic diagram of a BEF (band elimination filter) in the same distortion factor measuring circuit.

FIG. 7 is a block diagram showing an example of a conventional frequency measurement circuit.

[Explanation of symbols]

 1 hour counter circuit 2 wave number counter circuit 3 counter control circuit 4 conversion circuit 5 arithmetic circuit 6 result register 7 reference clock data register 8 comparison reference data register 9 comparison circuit 10 timeout counter circuit 11 arithmetic comparison control circuit 12 data interface unit 13 reference clock Signal 14 Input signal 15 Conversion end signal 16 Specified count end signal 17 Measurement start / stop signal 18 Count end signal 19 Timeout occurrence signal 20 Fluctuation detection signal 21 Time measurement counter 22 Signal selection circuit 31 Comparison effective range selection circuit 32-bit comparison circuit 33 Comparison signal validity judgment gate 34 Comparison signal synthesizing circuit 41 Data register 42 Timeout counter 43 Edge detection circuit 51 Input amplifier 52 BEF (Band removal filter) 53 Detection circuit 54 Reference clock generation circuit 55 Frequency measurement circuit 56 Overall control processor

Claims (3)

[Claims] 1. A time counter circuit that counts with a constant clock in synchronization with an input signal, a wave number counter circuit that counts the wave number of an input signal, and a counter control circuit that controls the operations of the time counter circuit and the wave number counter circuit. A conversion circuit for converting the count value of each counter circuit into a floating point format; an operation circuit for operating the data converted by the conversion circuit in a floating point format; and a result of the operation circuit stored in a floating point format. By comparing the data of the result register with the data of the comparison reference data register and the comparison reference data register capable of setting the comparison reference data in the floating point format, the variation exceeding the set frequency range is detected. A frequency measurement circuit including a comparison circuit. 2. The frequency measurement circuit according to claim 1, wherein the counter control circuit has a continuous measurement function of starting measurement by a conversion end signal of the conversion circuit and performing the next frequency measurement in parallel with the arithmetic processing. 3. A time-out circuit for monitoring that the input signal has disappeared for a certain period of time or more.
The described frequency measurement circuit.