JPH0510710B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to an area measuring device for extracting characteristic parts of an object from image data and performing judgment and discrimination.

BACKGROUND ART Conventionally, as a method for measuring the area of a detected object on an image, image data once stored in an image memory is used to measure the area of a detected object on an image.
A method in which the CPU (Central Processing Unit) reads out image data in a predetermined measurement area and measures it, or a method in which a counter is operated only when image data in a measurement area set in hardware is sent from a camera to measure white spots. There is now a way to count.

In the first prior art, the area to be measured can be set relatively freely, but it takes time to process the image because it is counted individually after the image data is loaded into the memory. Also, since image memory is required,
The problem was that the configuration was complicated and the cost was high. Further, in the second prior art, reading and counting of image data are performed at the same time, so although it is fast, it is only possible to set a measurement area with a relatively simple shape. Further, although an image memory is no longer required, a comparator for address discrimination and an area counter are required depending on the number of measurement areas, which makes the configuration complicated and increases the cost.

Purpose The purpose of the present invention is to solve the above-mentioned technical problems, and to provide an image that can perform area measurement within a measurement area with a complex shape, thereby speeding up data processing. The purpose of the present invention is to provide a measuring device.

Structure of the Invention The present invention is configured by having a large number of store cells arranged in rows and columns in the X and Y directions, on which an image of an object to be inspected is formed, and where the store cells have a level corresponding to the amount of light received. an optical random access memory 34 for individually addressing and reading these store cells;
, a Y address latch circuit 20 that latches the Y address of the scan start point of the optical random access memory 34, and an X address counter 21 that counts the X address of the scan start point of the optical random access memory 34.
, a data latch circuit 22 that latches the last horizontal line of the measurement area, a horizontal line length counter 23 that counts the length of each horizontal line, a Y address output from the Y address latch circuit 20, and an output from the X address counter 21. In response to the X address output, the data latch is scanned in the optical random access memory 34 in the X direction and shifted in the Y direction by the length of each horizontal line output from the horizontal line length counter 23. driving means 6, 7, 35 for driving the optical random access memory to read and output up to the last horizontal line outputted from the circuit 22; This is an area measuring device characterized in that it includes an area counter 4 for counting the number of store cells whose outputs read from the storage cells are equal to or higher than a predetermined level.

Embodiment FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a timing chart for explaining its operating state. A start signal from the CPU (central processing unit) is applied to the input terminal of the RS flip-flop 2 via line 1 and to the input terminal of area counter 4 via line 3. By this start signal, RS
Flip-flop 2 is set and area counter 4 is cleared. The output terminal of the RS flip-flop 2 is connected to a first pulse generating circuit 6 and a second pulse generating circuit 7 via lines 5 and 5a, respectively. The first pulse generating circuit 6 derives the clock signal CK shown in FIG. 2 onto the line 8 when the RS flip-flop 2 is set. The clock signal CK from the first pulse generation circuit 6 is
It is applied from line 8 to address counter 9.
In synchronization with the clock signal CK, the address counter 9 receives a counter for each scanning point as shown in FIG.
and the counter output is line 1
0 and 11, respectively, to a table memory 12 having a storage capacity of 8 bits x 4K and a decoder 13. Table memory 12 stores horizontal scan parameters based on data from the CPU via line 14, and stores horizontal scan parameters in response to counter output from address counter 9.
The horizontal scanning parameters shown in are derived on line 15. This horizontal scanning parameter consists of four sets of data Li, Di, Xi, Yi (i = 1 to n), and an address is determined for each of these data Li to Yi. These 4
Each set of data is stored in the table memory 12. Such data Li-Yi are applied via lines 15 to 16-19 to a Y address latch circuit 20, an X address counter 21, a data latch circuit 22, and a horizontal line length counter 23, respectively. The Y address latch circuit 20 is
The Y address _Y0 of the scanning start point shown in FIG. The X address counter 21 receives the scan start point X address _X0 shown in FIG.
The last horizontal line of the measurement area is latched in the data latch circuit 22 leading out to line 28, which detects the last horizontal line and outputs the scan end signal shown in FIG. 2 to line 28. Further, the horizontal line length counter 23 is given the length Li of each line in advance, detects the end of horizontal line scanning, and outputs a borrow signal B indicating the end of scanning to the line 39. Such Y address latch circuit 2
0,X address counter 21, data latch circuit 22 and horizontal line length counter 23 are connected to decoder 13 via common line 24. The decoder 13 receives the lower two bits of the counter output from the address counter 9, [0,0], [0,1],
[1,0], [1,1] are decoded and the horizontal scanning parameters from the table memory 12 are sent to the Y address latch circuit 20, the X address counter 21, the data latch circuit 22 and the horizontal line length counter 2.
It works to set it to 3. The output of decoder 13 is connected via line 30 to RS flip-flop 3.
1 input terminal. The output terminal of this RS flip-flop 31 is connected to the second pulse generating circuit 7 via a line 32. The second pulse generating circuit 7 is activated after the horizontal scanning parameters are set in the Y address latch circuit 20, the X address counter 21, the data latch circuit 22, and the horizontal line length counter 23, respectively, and the clock pulse shown in FIG. 2 is activated. The signal CK is sent to the optic RAM (Random Access Memory) via line 33.
34 to a drive circuit 35 for high-speed scanning, and also to an X address counter 21 and a horizontal line length counter 23 via lines 36 and 37. The drive circuit 35 performs high-speed scanning of the optic RAM 34 based on the row address signal RAS, column address signal CAS, and write signal WRT stored in the table memory 12 in advance to read image data. Image data from optic RAM 34 is input to area counter 4 via line 50. Area counter 4 has
Also, a write signal WRT from the drive circuit 35 is input via the line 51. area counter 4
counts the white dots (bright dots) within the measurement area set by the scanning address from the optic RAM 34, and inputs the counter output shown in FIG. 2 to the CPU via line 38. Borrow signal B from horizontal line length counter 23 is ANDed from lines 39 and 40 via NOT gate 42.
It is applied to one input terminal of gate 43.
The other input terminal of AND gate 43 is provided via line 44 with the output via line 30 from decoder 13 . The output from AND gate 43 is provided to first pulse generating circuit 6 via line 45. Borrow signal B of horizontal line length counter 23 is also applied via line 40 to input terminal a of AND gate 46. The write signal WRT from the drive circuit 35 is applied to the input terminal b of the AND gate 46 via lines 51 and 52, and the data latch circuit 2 is applied to the input terminal c of the AND gate 46.
A signal indicating the completion of the last horizontal line scan from line 28 is provided on line 28. AND
The end of scan signal shown in FIG. 13 from gate 46 is provided to RS flip-flop 2 and CPU via lines 47 and 48, respectively. The borrow signal B from the horizontal line length counter 23 is also sent to the RS flip-flop 3 via line 41.
1 input terminal.

To measure the area of the image stored in the optic RAM 34, first store the horizontal scanning parameters in the table memory 12 based on the data of the CPU, then use the start signal to measure the area of the image.
The RS flip-flop 2 is set and the first pulse generating circuit 6 is activated. In response to the output from the address counter 9 and the output from the decoder 13, the four data Li, Di, Xi, Yi of the horizontal scanning parameters are transferred from the table memory 12 to the Y address latch circuit 2.
0 and X address counter 21, data latch circuit 22, and horizontal line length counter 23, respectively. Thereafter, the second pulse generation circuit 7 is activated in response to the set end signal from the decoder 13, and the drive circuit 35 generates the row address designation signal.
Optic RAM 34 is scanned at high speed based on RAS, column addressing signal CAS and write signal WRT. The scanning parameters from the table memory 12 are transferred to the optic as shown in FIG.
The address (X ₁ , Y ₁ ) of the starting point of each horizontal line segment when the area measurement area 70 set on the image indicated by reference mark A in the RAM 34 is decomposed into horizontal lines l ₁ to _{l 2} n,
(X ₁ , Y ₂ ),..., (X ₁ , Y ₂ n), indicating the lengths L ₁ , L ₂ of the horizontal lines l ₁ to l ₂ n and whether the line segment is the final horizontal line l ₂ n Scan end flag (X ₂ m, Y ₂ n)
The image data in the measurement area 70 read from the optic RAM 34 based on the horizontal scanning parameters is given to the area counter 4, and the white point of the image data is measured. is input to the CPU,
Thereby, the area of the bright portion of the image within the measurement area 70 can be measured.

By determining the area on the image within the measurement air in this way, data processing speeds up and it is also possible to set an area measurement area with a complex shape. Further, since an image memory and a large number of counters are not required, cost reduction is realized. Furthermore, since only the data on the required measurement area is scanned at high speed, it is possible to significantly shorten the data processing time.

The optical RAM 34 described above is composed of a large number of store cells arranged in rows and columns in the X and Y directions, and an image of the object to be inspected is formed on the store cells, and the store cells set a level corresponding to the amount of light received. Optical random access memory for individually addressing and reading out these store cells. area counter 4
When the output of each store cell read from the optical RAM 34 is equal to or higher than a predetermined level, the number of store cells is counted as described above, and the white dots of the image data are counted.

Effects As described above, according to the present invention, the area in which the object to be inspected of the optical random access memory 34 is imaged is separated by the Y address latch circuit 20, the X address counter 21, the data latch circuit 22, and the horizontal line. This can be set using the long counter 23, making it easy to calculate the area.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG.
The figure is a timing chart for explaining the operation, and FIG. 3 is a diagram for explaining addressing of the measurement area 70. 4...Area counter, 5, 6...Pulse generation circuit, 12...Table memory, 13...Decoder, 20...Y address latch circuit, 21...X
Address counter, 22...data latch circuit,
23...Horizontal line length counter, 34...Opt RAM.

Claims (1)

[Claims] 1. A large number of store cells are arranged in rows and columns in the X and Y directions, and an image of the object to be inspected is formed on the store cells, and the store cells have a level corresponding to the amount of received light. an optical random access memory 34 for individually addressing and reading out these store cells; and a Y address latch circuit 20 for latching the Y address of the scan start point of the optical random access memory 34. and an X address counter 21 that counts the X address of the scanning start point of the optical random access memory 34.
, a data latch circuit 22 that latches the last horizontal line of the measurement area, a horizontal line length counter 23 that counts the length of each horizontal line, a Y address output from the Y address latch circuit 20, and an output from the X address counter 21. In response to the X address output, the data latch is scanned in the optical random access memory 34 in the X direction and shifted in the Y direction by the length of each horizontal line output from the horizontal line length counter 23. driving means 6, 7, 35 for driving the optical random access memory to read and output up to the last horizontal line outputted from the circuit 22; An area measuring device comprising an area counter 4 for counting the number of store cells whose outputs read from the storage cell are equal to or higher than a predetermined level.