JPH0498329A - Fault recovery system - Google Patents

Abstract

PURPOSE:To eliminate the destruction of fault information and an adverse influence on the other units by providing a field storing information obtained by means of encoding a suspected unit for a part of the field of a microinstruction. CONSTITUTION:The suspected units 1-2 to 1-4 can be specified to a certain degree in correspondence with the content of a microprogram in the suspected field 2-5 of the microinstruction. Thus, data is transferred between the diagnosed units 1-2 to 1-4. In the case of the microprogram in the diagnosed unit 1-2, the codes for indicating the diagnosed unit 1-3 as the first suspected unit and the diagnosed unit 1-2 as the second suspected unit can be described at the time of design in the suspected unit code field 2-5 of respective steps in a processing routine executing the processing based on data received from the diagnosed unit 1-3. Thus, the destruction of information to be extracted and the adverse influence on the other units which normally operate can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a fault handling method applied to information processing devices and the like.

[Conventional technology]

Conventionally, in this type of fault handling method, when a fault is detected in the unit to be diagnosed, a flip-flop is set to indicate that a fault has occurred, the execution of the microprogram is stopped, and the diagnostic control unit sets the flip-flop to indicate that a fault has occurred. There is a method of pointing out the suspected unit causing the failure by collecting and analyzing the value and the stop address of the microprogram.

Another known method is to use a specific microprogram to hood the suspect unit and set it in a specific register when a failure occurs, and then use the diagnostic control unit to collect and analyze the flip-flop values and specific register values. There is.

[Problem to be solved by the invention]

Among the conventional fault handling methods mentioned above, the method that analyzes the value of the faulty flip-flop and the stop address of the microprogram generally results in the address of the microprogram being changed when the microprogram is changed. Therefore, there is a drawback that the fault analysis program of the diagnostic control unit must be changed accordingly.

In addition, in the method of analysis based on the value of the faulty flip-flop and the value of a specific register, the microprogram of the unit that detected the fault encodes the suspect unit and takes several steps to set this information in a specific register. Because normal operation is not guaranteed, especially if the unit that detected the fault is the cause of the fault, not only will the reliability of the contents set in a specific register become low, but also the The drawback is that the retribution you want to collect may also be destroyed. Furthermore, in the worst case, there is a possibility that other normally operating units may also be adversely affected.

[Means to solve the problem]

The system of the present invention uses a plurality of units to be diagnosed that operate under the control of a horizontal microprogram, and collects and analyzes failure information when a failure is detected by the units to be diagnosed, thereby identifying a suspect unit that is the cause of the failure. In a fault handling method for an information processing system comprising a diagnostic control unit, the unit to be diagnosed is provided with means for retaining steps of a microprogram being executed at the time of detection of a fault, and a part of a field of a horizontal microinstruction includes: The diagnostic control unit has a field for storing coded information of the suspected unit 7), and the diagnostic control unit is provided with means for collecting the field of the microprogram step at the time of detecting the fault in the diagnosed unit, At the time of analysis, the suspect unit causing the failure is pointed out by analyzing the contents of the field.

〔Example〕

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 2 is a system configuration diagram to which the present invention is applied.

In FIG. 2, 1-1 is a diagnostic control unit, 1-2 to
4 is a unit to be diagnosed that operates under the control of a horizontal microprogram, 1-5 is a main memory unit, and the units to be diagnosed 1-2 to 1-4 and the main memory unit 1-5 are connected to each other by a system bus 1-6. They are connected to each other and exchange data between the units to be diagnosed 1-2 to 1-4, the main memory unit 1-5, and the units to be diagnosed 1-2 to 1-4. Further, 1-7 is a diagnostic bus, and the diagnostic control unit 1-1. Diagnosis control unit when a failure occurs when the units to be diagnosed 1-2 to 1-4 and the main memory unit 1-5 are connected
1 Used to collect failure information by 1.

FIG. 1 is an example of the format of horizontal microinstructions in any of the units to be diagnosed 1-2 to 1-4. One step of microinstruction consists of 36 bits, 2-1 to 3 are control fields that individually control multiple subunits in the unit to be diagnosed 7) 12 to 1-4, and 2-4 is the next microinstruction address field indicating the address of the next microinstruction. Further, 2-5 is a suspected unit code field indicating the suspected unit hood, which is a feature of the present invention.

FIG. 3 shows an example of a circuit for holding microprogram steps when a fault is detected among the units to be diagnosed 1-2 to 1-4, where 3-1 is a microinstruction register;
~3-4 is an error detection signal, 3-5 to 3-7 are error registers, 3-8 is a NOR gate, 3-9 is a clock input signal, 3-10 is a NAND gate, and 3-11 is a clock signal. . Microinstruction register 3-1 and error
Registers 3-5 to 3-7 are controlled by each clock signal 3-11.

When a fault is detected in the units to be diagnosed 1-2 to 1-4,
Any of error detection signals 3-2 to 3-4 is logic “1”
Therefore, logic "1" is set in any of the error registers 3-5 to 3-7.

The outputs of error registers 3-5 to 3-7 are output to NOR gate 3.
-8, the output of the NOR gate 3-8 becomes logic "Ot+", and the output of the NAND gate 3-10, that is, the clock signal 3-11, becomes the clock input signal 3-8.
The logic becomes "1" regardless of the value of 9, the operations of the microinstruction register 3-1 and error registers 3-5 to 3-7 are stopped, and the internal values are held.

Next, the reason why a suspected unit code can be written in the suspected unit code field 2-5 in FIG. 1 will be explained with reference to a description example.

In general, when a fault is detected in the units to be diagnosed 1-2 to 1-4, if the values in the error registers 3-5 to 3-7 indicating that the fault has been detected remain, the suspected unit will be detected to some extent. It is possible to point out points 1-2 to 1-4, but for example, if the data is If a timeout error is detected during sending and receiving,
It is not possible to specify with which unit data was exchanged with which the error was detected based on the values in the error registers 3-5 to 3-7, and it is difficult to identify the suspect units 1-2 to 1-4.

In addition, there are many cases where logical contradictions are detected by the microprogram, and in this case, error registers 3-5 to
It is not practical to identify the suspect units 1-2 to 1-4 using only the value of 3-7 because the number of bits in the error registers 3-5 to 3-7 would be enormous. Therefore, in such a case,
In many cases, the suspect units 1-2 to 1-4 can be easily identified based on the details of the processing being performed by the microprogram when the failure was detected.

Therefore, in FIG. 1, the suspected unit code field 2-5 of the microinstruction contains the suspect units 1-2 to 1-1 to some extent depending on the content of the microprogram processing.
It is possible to specify For example, the processing routine of a microprogram that exchanges data between the units to be diagnosed 1-2 to 1-4 in FIG. In the suspected unit code field 2-5 of each step, if it is a microprogram in the diagnosed unit 1-2, the first
It is possible to write a code at the time of design to point out the diagnosed unit 1-3 as the suspected unit and the diagnosed unit 1-2 as the second suspected unit.

Although any suitable method may be used to encode the suspect unit code field, in this embodiment, the encoding is performed according to the correspondence table shown in FIG.

Next, referring to FIGS. 1 to 3, the diagnostic control unit 1-1 when a fault is detected in the diagnosed unit 1-3.
The failure handling method will be explained below.

When the diagnostic control unit 1-1 recognizes that a fault has been detected in the unit to be diagnosed 1-3, it collects fault information for the unit to be diagnosed 1-3 via the diagnostic bus 1-7. It is assumed that this fault information also includes the values of error registers 3-5 to 3-7 and microinstruction register 3-1 shown in FIG.

The diagnostic control unit 1-1 that has collected the fault information refers to the values in the error registers 3-5 to 3-7, and if the suspect unit can be pointed out based on the values, it points out the suspect unit. If the suspected unit (y) cannot be identified using only the values of error registers 3-5 to 3-7, refer to the suspect unit code field 2-5 of the microinstruction register 3-1. For example, if the value is "OIH", In accordance with Table 1, identify the units to be diagnosed as suspect units in the order of 7) 1 2. 1 3.

〔Effect of the invention〕

As explained above, in the fault handling method of the present invention, even if a change occurs in the microprogram, by providing a field for storing information encoding the suspect unit as part of the field of the microinstruction, There is no need to change the fault handling program in the diagnostic control unit, and there is no need to destroy fault information or adversely affect other units due to the operation of the fault-causing unit when a fault is detected. There is.

Evening, 3-2 to 3-4...Error detection signal, 3-5 to 3
-7...Error register, 3-8...NOR gate, 3-9...Clock input signal, 3-10...NA
ND gate, 3-11...clock signal.

Claims (1)

[Scope of Claims] A plurality of units to be diagnosed operate under the control of a horizontal microprogram, and by collecting and analyzing failure information when a failure is detected in the units to be diagnosed, a suspected unit causing the failure can be pointed out. In a fault handling method for an information processing system comprising a diagnostic control unit, the unit to be diagnosed is provided with means for retaining steps of a microprogram being executed at the time of detection of a fault, and a part of a field of a horizontal microinstruction includes: The diagnostic control unit has a field for storing encoded information about the suspected unit, and the diagnostic control unit is provided with means for collecting the field of the microprogram step at the time of detecting the fault in the diagnosed unit, A failure handling method characterized in that a suspected unit causing a failure is pointed out by analyzing the contents of the field.