JPH0497679A - Television signal converter - Google Patents

Abstract

PURPOSE:To allow a CRT to be operated under a same condition even in the case of a television signal of a different system by time-compressing the television signal and outputting the result onto the CRT while taking a scanning line number of a display device (CRT) into account. CONSTITUTION:A time compression means consists of a field memory 41, an oscillation circuit 42, and a gate circuit 43 and a scanning frequency conversion means includes a horizontal counter 44, a vertical counter 45 and a synchronizing signal generator 11. The time compression means and the scanning frequency conversion means are used to time-compress a television signal and the result is subjected to scanning line conversion and fed to a CRT 14. Thus, a video image by a television signal of a different system is displayed on the display device without selection of a deflection circuit of the CRT 14.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention performs signal conversion of a television signal in order to display an image based on a television signal of another system on a display device compatible with a predetermined system. The present invention relates to a television signal conversion device.

[Conventional technology]

FIG. 4 is a block diagram showing a conventional television signal converter (hereinafter referred to as a signal converter) along with its surroundings. In the figure, 1 is an input terminal for a television signal (NTSC signal in this case), 2 is an AD converter that converts the NTSC signal to a digital signal, and 3 is an AD converter that converts the NTSC signal to a line sequential signal (non-interlaced signal). 5 is an IDTV decoder that outputs an IDTV signal; 5 is a timing pulse generator that outputs a write clock signal and a write reset pulse for the asynchronous read/write memory 40;
1 is a synchronizing signal generator that creates a synchronizing signal to be applied to the deflection circuit 15; 13 is a video circuit that creates a signal to be applied to the CRT 14 based on the signal output from the signal converter 16;
4 is a CRT that has a wide aspect ratio and displays images;
15 is a deflection circuit that deflects the electron beam, and 16 is a signal converter. Here, the display device is a video circuit 13, a CRT
14 and a deflection circuit 15.

In the signal conversion device 16, 40 is an asynchronous read/write memory into which an IDTV signal is written, 44 is a horizontal counter that creates a read enable signal, and 46 is a converter that converts the signal read from the asynchronous read/write memory 40 into an analog signal. The DA converter 47 is a frequency synthesizer that creates a lead crotter signal using a PLL or the like.

Next, the operation will be explained. N input to input terminal l
The TSC signal is converted into a digital signal by the A-D converter 2, and then sent to the scanning line 1050 by the IDTV decoder 3.
The signal is converted into a line sequential signal and output as an IDTV signal. This IDTV signal has a frequency of 28.64 MHz (number of samplings per scanning line: 910, horizontal scanning frequency: 31.47 kHz) output from the timing pulse generator 5.
The data is written to the asynchronous read/write memory 40 according to the write clock signal and write reset pulse (at the time of z).

The video signal of this IDTV signal has an aspect ratio (horizontal:vertical)
This is a signal compatible with 4:3. Therefore, the aspect ratio is 1
In order to display images on a CRT 14 with a wide aspect ratio of 6:9, the image signal is time-compressed and then
It is necessary to blank both the left and right sides of T14. Video signals are generally time compressed to 7/9. To perform time compression, the frequency synthesizer 47 has 910X
Generates a signal of 31.47X (9/7) = 36.82MHz. This signal is then supplied to the asynchronous read/write memory 40 as a read clock signal. The 36.82 MHz signal is also supplied to the horizontal counter 44, which creates a predetermined glue enable signal and uses this signal so that images are displayed at symmetrical positions on the screen of the CRT 14. is supplied to the asynchronous read/write memory 40. As a result, a time-compressed signal is read from the asynchronous read/write memory 40. This signal is then sent to the D-A converter 46
After being converted into an analog signal, it is output to the video circuit 13. The video circuit 13 amplifies the video signal and transmits it to the CRT 14.
supply to.

On the other hand, the synchronization signal generator 11 creates a synchronization signal from the output signal of the timing pulse generator 5 and provides the synchronization signal to the deflection circuit 15. The frequency of the horizontal synchronization signal output from the synchronization signal generator 11 is 31.47kHz. In this way, when it is desired to display an image based on the IDT ■ signal on the CRT 14, a time-compressed signal is created, and the deflection circuit 15 displays the image on the CRT 14 using a horizontal scanning signal of 31.47 kHz.
is driving.

Note that, like high-definition television signals, there are 1125 scanning lines and a horizontal scanning frequency of 33.75k.
When displaying an image based on a Hz signal on the CRT 14, the input side of the image circuit 13 is connected to the output side of the signal, and the deflection circuit 15 changes the horizontal scanning frequency to 33.
The frequency will be switched to 75kHz to drive the CRT 14 (however, the switching circuit is not shown in Figure 4).
).

Further, when a digital convergence circuit (not shown) is used, when the television signal is switched, the correction data must also be switched.

[Problem to be solved by the invention]

Since the conventional signal conversion device is configured as described above, when displaying an image based on an IDTV signal or the like on a high-definition CRT 14, it is necessary to change the horizontal scanning frequency of the deflection circuit 15 significantly. Therefore, it became necessary to switch the horizontal linearity and convergence circuits, etc., resulting in problems such as an increase in the circuit scale of the deflection circuit 15 and an increase in the number of adjustment points.

This invention was made to solve the above-mentioned problems, and provides a signal conversion device that can process television signals of different formats at almost the same horizontal scanning frequency on the display device side. The purpose is to

[Means to solve the problem]

The signal conversion device according to the present invention provides for a display device having a predetermined first number of scanning lines and a wide aspect ratio.
In a device that supplies a television signal corresponding to a second number of scanning lines and an aspect ratio different from the first number of scanning lines and a wide aspect ratio, the aspect ratio of the television signal is stored in a manner adapted to the display device. In order to supply the television signal to the display device at a speed corresponding to the first number of scanning lines, a time compression means for time compressing the television signal and a horizontal scanning frequency according to the first number of scanning lines are provided. It is equipped with a scanning frequency conversion means for converting the frequency into a scanning frequency.

[For production]

The signal conversion device according to the present invention takes into account the number of scanning lines on the display device side, compresses the time of the television signal, and outputs it to the display device, thereby creating a blanking period in the vertical direction of the screen. To enable a display device to operate under the same conditions even if the television signal is the same.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, 4 is a signal converter, 41 is a field memory that can store video signals for two fields, 42 is an oscillation circuit that generates a read pulse signal, and 43 is a gate that supplies a read clock signal to the field memory 41. circuit,
44 is a horizontal counter, and 45 is a vertical counter. Other parts are the same as those shown in FIG. 4 with the same reference numerals. Note that the field memory 41 can be replaced with a plurality of line memories.

Further, the time compression means includes a field memory 41, an oscillation circuit 42, and a gate circuit 43, and the scanning frequency conversion means includes a horizontal counter 44, a vertical counter 45, and a synchronization signal generator 11.

Next, the operation will be explained. Here, a high-definition system (number of scanning lines = 112
5 lines, aspect ratio 16:9, vertical scanning frequency -60,
An example of a high-definition television signal (high-definition signal) and IDTV will be explained using the example of displaying on a CRT 14 compatible with 00Hz, interlaced scanning).
Table 1 shows the differences from the signals.

(Table 1) The IDTV signal input to the signal conversion device 4 is created in the same manner as in the conventional case. That is, the NTSC signal input to the input terminal 1 is converted into a digital signal by the AD converter 2, and then converted by the IDTV decoder 3 into a 1DTV signal with 910 samplings per scanning line. This IDTV signal is written into the field memory 41 by a 28.64 MHz write clock signal and a write reset pulse output from the timing pulse generator 5. And CRT14 compatible with high-definition system
In order to display images based on IDTV signals,
Time compresses the TV signal and reduces the number of scanning lines to 1125
Consider making it a book (but without increasing the number of effective scanning lines). Therefore, the video signal is time-compressed at a compression rate commensurate with the aspect ratio and number of scanning lines (the horizontal scanning period rate and the vertical scanning period rate are also taken into account) shown in Table 1. That is, the signal is read out from the field memory 41 using a frequency scaled clock signal that achieves the compression ratio.

FIG. 2 shows how an image is displayed on a CRT 14 compatible with Hi-Vigilan using a video signal of a time-compressed IDTV signal. The effective number of scanning lines is 517 (per field) for high-definition signals, ID
For TV signals, there are 488 lines. Therefore, on the display device side,
In order to process the video signal of the DTV signal in the same way as the video signal of the high-definition signal, it is necessary to provide a blanking period at the top and bottom of the screen as well. Therefore, the aspect ratio was changed to 4.
:3, and to provide a blanking period at the top and bottom of the screen, the time compression rate is as follows: Time compression rate = 8°1゛8°' = 0.74r-m・C,
d, and in this case, the number of samples should be 9
Since it is set to 10, it is easier to process if the value of (910/compression ratio) is an integer, for example, 13/17 near 0.74.
will be adopted.

Therefore, the oscillation circuit 42 is set to output a signal with a frequency f expressed by the following formula.

f C=910X (17/13) X (1/2)
X 1125X59.94=40.12 MHz This signal is supplied to the gate circuit 43 and horizontal counter 44. The horizontal counter 44 indicates that the position of the image is
The gate pulse (H) shown in FIG.

The gate circuit 43 uses this gate pulse (H) to
Signal output by the oscillation circuit 42 (shown in FIG. 3(b))
Finally, the read crotter signal shown in FIG. 3(d) is given to the field memory 41. Also, in order to display the image at the center of the CRT 14 in the vertical direction, the vertical counter 45 generates a gate pulse (V) shown in FIG. 43. The gate circuit 43 passes the signal output from the oscillation circuit 42 by this gate pulse (V), and eventually passes the signal output from the oscillation circuit 42 to each horizontal scanning line shown in FIG. 3(e) (in FIG. 3(e), the horizontal synchronizing signal (H -sync)), signals can be read out from the field memory 41 only for horizontal scanning lines when the gate pulse (V) is at a high level. In other words, the gate circuit 43 uses a composite signal obtained by ANDing the gate pulse (H) and the gate pulse (V) as a gate signal (shown in FIG. 3(g)), and outputs the output signal of the oscillation circuit 42. Let it pass;
It is applied to the field memory 41 as a read clock signal. Note that the gate pulse (V) is the field memory 4
1 and serves as a reset pulse for the field memory 41. The signal read from the field memory 41 is converted into an analog signal by the DA converter 46 and then supplied to the video circuit 13.

Furthermore, the synchronization signal generator 11 generates a synchronization signal to be applied to the deflection circuit 15 by introducing the outputs of the horizontal counter 44 and the vertical counter 45. In this case, the positions of the vertical synchronizing signals are determined so as to perform sequential scanning. The frequency of the horizontal synchronizing signal given to the deflection circuit 15 is 33.
72kHz, the frequency of the vertical synchronization signal is 59.94Hz, and the horizontal scanning frequency of the deflection circuit 15 is 33.72kHz.
The CRT 14 is driven at a vertical scanning frequency of 59.94 Hz.

In addition, in the above example, the value near 0.74 is 13/
17 was adopted, but this value may be any other value, for example 3.
5/47.7/9 etc. may also be used.

〔Effect of the invention〕

As described above, according to the present invention, the signal conversion device is configured to time-compress the television signal, convert the scanning line, and supply the signal to the display device. It is now possible to display images based on television signals of different systems on a display device, and the number of components in the deflection circuit can be reduced, and the number of adjustment parts can also be reduced.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram showing a signal conversion device according to an embodiment of the present invention together with its surroundings, FIG. 2 is an explanatory diagram showing the position of an image on a CRT, and FIG. 3 is a timing diagram showing the operation of each part of the signal conversion device. 4 are block diagrams showing a conventional signal conversion device along with its surroundings. 3 is an IDTV decoder, 4 is a signal converter, 5 is a timing pulse generator, 11 is a synchronization signal generator, 13 is a video circuit, 14 is a CRT, 15 is a deflection circuit, 41 is a field memory, 42 is an oscillation circuit, 43 is a gate circuit, 44
is a horizontal counter, and 45 is a vertical counter. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Fig. Ur-j″ Harz, (t1)

Claims (1)

[Claims] A television signal corresponding to a second number of scanning lines different from the first number of scanning lines and having a predetermined first number of scanning lines and a wide aspect ratio, which is applied to a display device having a predetermined first number of scanning lines and a wide aspect ratio. In the television signal conversion device that supplies a television signal corresponding to an aspect ratio in a manner adapted to the display device, the television signal converter converts the television signal at a speed corresponding to the first number of scanning lines while preserving the aspect ratio of the television signal. A television signal conversion device comprising: time compression means for supplying a television signal to the display device; and scanning frequency conversion means for converting a horizontal scanning frequency to a frequency corresponding to the first number of scanning lines. .