JPH0484227A - Test device for information processor - Google Patents

Abstract

PURPOSE:To efficiently execute a test and evaluation without taking time for the preparation of extracting data by setting the conditions of a trace point by means of a circuit diagram displayed in a screen so as to make it to be visually and easily seen. CONSTITUTION:When the point to be traced and the trace condition are instructed from an instruction means 120, a storage control means 130 gives an instruction to a storage means 110 to store necessary information which a state detection means 100 detects by the given condition. A display control means 140 edits information stored in the storage means 110 by a system instructed by the instruction means 120 and it is displayed in a display means 150.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention is used for testing information processing devices. The present invention relates to a test device that efficiently tests and evaluates information processing devices.

〔overview〕

The present invention provides a testing device for detecting the status of each component of an information processing device composed of a plurality of components, by enabling conditions such as trace points to be set using a circuit diagram displayed on the screen, thereby making the test device visually easy to read. This reduces the time required to prepare for data collection, making testing and evaluation more efficient.

[Conventional technology]

Conventionally, this type of test equipment has applied a probe to a point at which the state of a device under test is desired to be examined, stored data manually input from the probe, and displayed the data on a display device.

[Problem to be solved by the invention]

In the conventional method described above, in order to investigate the device under test, test points are extracted by looking at the circuit diagram of the device under test.
It is necessary to find out which pin of which part of the device under test the test point corresponds to, and to attach the probe to that bin, which takes time to prepare for data collection, and makes testing and evaluation more efficient. There was a drawback that it could not be done.

The present invention solves these problems, and aims to provide an apparatus that can perform tests and evaluations efficiently without requiring time for data collection preparation.

[Means to solve the problem]

The present invention is an information processing device testing device that detects the state of each component of the device under test, in which an information processing device configured with a plurality of parts is the device under test. A state detection means for detecting all the information specified by the standard, a storage means for storing the information detected by the state detection means, a timing for storing the detected information, other conditions, and editing of the stored information. an instruction means for instructing and setting an editing method for outputting the information; and a δ self-memory control means for controlling the timing of storing information in the storage means in accordance with the timing and conditions instructed and set by the instruction means. , a display control means for editing the information stored in the storage means and the control information set by the instruction means in a manner instructed by the instruction means; and a display for displaying the information edited by the display control means. a logic circuit information storage means for storing special logic circuit information; and/or a component that instructs the state detection means to connect the components of the device under test to each other according to instructions from the instruction means. connection control means; the display control means includes means for editing the logic circuit information stored in the logic circuit information storage means; and the state detection means includes means for interconnecting the components of the device under test. The instruction means further includes:
The logic circuit information stored in the logic circuit information storage means is edited by the display control means and displayed on the display means, and the selection instruction of the information to be stored in the storage means and the information stored in the storage means are given. means for issuing a display instruction when a part of the displayed logic circuit information is pointed;
and means for setting mutual connection points between components of the device under test in response to pointing to a part of the displayed logic circuit information.

Further, the component connection control means may include additional component holding means for holding components to be added to the device under test, or logical operation information of components used in the device under test as a library, and this information may be used as a library. A component information storage means for simulating operation of a component to be added to the device under test is connected, the state/condition detection means includes means for connecting a component in the device under test and the additional component, The connection control means controls a connection between an additional component held by the additional component holding means and a component in the device under test, or a connection between an additional component held by the component information storage means and a component in the device under test. comprising means for instructing and controlling the state detecting means, the instructing means pointing to a part of the logic circuit information displayed indicating the setting of a connection point between an additional component and a component in the device under test; The method may include means for performing the following steps.

[Effect]

All information specified by the standard is detected for some or all of the device under test, and the detected information is stored according to set timing and conditions. When a test instruction is given, the stored information is read out according to the instructed method, and the test points and target parts are edited and output and displayed.

This makes it possible to set conditions such as trace points using the circuit diagram displayed on the screen, which makes it easier to see visually and reduces errors.Also, even if logical changes occur, it is possible to set conditions such as trace points etc. Testing and evaluation can be performed without modification to the system, and the efficiency of testing and evaluation can be further improved.

〔Example〕

Next, embodiments of the present invention will be described based on the drawings.

(First Embodiment) FIG. 1 is a block diagram showing the configuration of a first embodiment of the present invention.

The first embodiment of the present invention includes a state detecting means 100 for detecting all the information specified by the standard for part or all of the device under test 200, and a state detecting means 100 for storing the information detected by the state detecting means 100. a self-storage means 110; an instruction means 120 for instructing and setting timing and other conditions for storing detected information; and an editing method for editing and outputting the stored information; and an instruction means 120 for instructing and setting The storage control means 130 controls the timing of storing information in the storage means 110 according to the specified timing and conditions, and the information stored in the storage means 110 and the information set by the instruction means 120 according to the method instructed by the instruction means 120. The display control means 140 includes a display control means 140 for editing the control information that has been edited, and a display means 150 for displaying the information edited by the display control means 140.

The state detection means 100 has test pins at the pitch of through holes for the size of one printed circuit board of the device under test 200, and is capable of detecting the state of all pins of any printed circuit board. configured.

Next, the operation of the first embodiment of the present invention configured as described above will be explained.

When the point to be traced and its tracing conditions are instructed by the instruction means 120, the storage control means 130 instructs the storage means 110 to store the necessary information detected by the state detection means 100 under the given conditions. The information stored in the storage means 110 is edited by the display control means 140 in the format instructed by the instruction means 120 and displayed on the display means 150.

(Second Embodiment) FIG. 2 is a block diagram showing the configuration of a second embodiment of the present invention.

The second embodiment of the present invention is based on the display control means 140 of the first embodiment.
logic circuit information storage means 16 in which logic circuit information is stored;
0 is connected, the display control means 140 includes means for editing the logic circuit information stored in the logic circuit information storage means 160, and the instruction means 120 includes the logic circuit information storage means 16.
0 is displayed by the display control means 140, and part of the displayed logic circuit information is instructed to select the information to be stored in the storage means and to display the information stored in the storage means 110. Including means to do something by being directed.

In the third embodiment of the present invention configured as described above, the logic circuit information storage means 160 holds the logic circuit information of the device under test 200, and the information is displayed in the form of a logic circuit diagram on the display means 150 by the display control means 140. is displayed. Display means 15
When the instruction means 120 instructs the points to be traced and the conditions for tracing on the circuit diagram displayed at 0, the storage control means 130 stores the necessary information detected by the state detection means 100 under the given conditions. The storage means 110 is instructed to do so. The information stored in the storage means 110 is edited by the display control means 140 in the format instructed by the instruction means 120 and displayed on the display means 150.

(Third Embodiment) FIG. 3 is a block diagram showing the configuration of a third embodiment of the present invention.

The third embodiment of the present invention is based on the state detection means 100 of the first embodiment.
and the indicating means 120, the state detecting means 1 detects the mutual connection between the components of the device under test 2000 according to the instructions of the indicating means 120.
A component connection control means 170 that instructs and executes a component connection control means 170 for instructing the instruction means 120 to set mutual connection points of components of the device under test 200 when a part of the displayed logic circuit information is pointed to the instruction means 120. including.

In the third embodiment of the present invention configured in this manner, the point to be traced and the tracing conditions thereof are specified by the instructing means 120.
, the storage control means 130 instructs the storage means 110 to store the necessary information detected by the state detection means 100 under the given conditions. Storage means 11
The information stored in 0 is edited by the display control means 140 in the format instructed by the instruction means 120 and displayed on the display means 150.

In addition, when a logic error occurs in the device under test 200, the pattern on the printed circuit board may be cut to change the wiring on the printed circuit board, or the pins of the components mounted on the printed circuit board may be short-circuited with conductive wires to correct the logic error. This connection can be done by following simple instructions.

When a point to be connected is specified by the instruction means 120 when a logical connection is desired, the component connection control means 1
70 instructs the state detection means 100 to internally short-circuit the corresponding test pins. When the test pins are short-circuited to each other inside the state detection means 100, the circuit of the device under test 200 connected thereto is also short-circuited, and a logical connection is realized.

(Fourth Embodiment) FIG. 4 is a block diagram showing the configuration of a fourth embodiment of the present invention. In addition to each means shown in the first embodiment, the fourth embodiment of the present invention includes:
It includes the logic circuit information storage means 160 in the second embodiment and the component connection control means 170 in the third embodiment.

In the fourth embodiment configured in this manner, the circuit information storage means 160 holds logic circuit information of the device under test 200, and the information is displayed in the form of a logic circuit diagram on the display means 150 by the display control means 140. Ru. When the instruction means 120 instructs the points to be traced and the tracing conditions on the circuit diagram displayed on the display means 150, the storage control means 130 stores the necessary information detected by the state detection means 100 under the given conditions. storage means 110 to store
instruct. The information stored in the storage means 110 is sent to the display control means 14 in the format instructed by the instruction means 120.
0 and displayed on the display means 150.

In addition, when a logic error occurs in the device under test 200, the pattern on the printed circuit board may be cut to change the wiring on the printed circuit board, or the pins of the components mounted on the printed circuit board may be short-circuited with conductive wires. However, this connection work can be done with simple instructions. When it is desired to make a logical connection, the point to be connected in the logic circuit diagram displayed on the display means 150 is indicated by the instruction means 120 as described above, and the component connection control means 170 then controls the state detection means 10.
0 to internally short-circuit the corresponding test pins. When the test pins are shorted together inside the state detection means 100, the device under test 2 connected to it
The 000 circuit is also shorted and a logical connection is achieved.

(Fifth example) FIG. 5 is a block diagram showing the configuration of an embodiment of the present invention.

The fifth embodiment of the present invention is the component connection control means 1 of the fourth embodiment.
70 is connected to additional component holding means 18 (l) for holding components to be added to the device under test 200, and state detection means 10
0 includes a means for connecting a component in the device under test 200 and an additional component, and the component connection control means 170 connects the additional component held by the additional component holding means 180 and the device under test 200.
The logic circuit information includes means for instructing and controlling the connection with the components in the device under test 200 to the state detecting means 100, and the instructing means 120 displays the setting of the connection point between the additional component and the component in the device under test 200. This includes means for doing so when a part of the information is pointed to.

In the fifth embodiment configured as described above, the logic circuit information storage means 160 holds the logic circuit information of the device under test 200, and the information is displayed on the display means 15 by the display control means 140.
0 in the form of a logic circuit diagram.

When the instruction means 120 instructs the points to be traced and the tracing conditions on the circuit diagram displayed on the display means 150, the storage control means 130 stores the necessary information detected by the state detection means 100 under the given conditions. The storage means 110 is instructed to do so.

The information stored in the storage means 110 is edited by the display control means 140 in the format instructed by the instruction means 120 and displayed on the display means 150.

In addition, when a logic error occurs in the device under test 200, the pattern on the printed circuit board may be cut to change the wiring on the printed circuit board, or the pins of the components mounted on the printed circuit board may be short-circuited with conductive wires. This connection can be done by following simple instructions.

When you want to make a logical connection, display means 1 as described above.
When the point to be connected in the logic circuit diagram displayed at 50 is indicated by the indicating means 120, the component connection control means 17 (1) instructs the state detecting means 100 to internally short-circuit the corresponding test pins. When the test pins are short-circuited within the state detection means 100, the circuit of the device under test 200 connected thereto is also short-circuited, and a logical connection is realized.

Next, a case will be described in which the circuit logic is changed by adding a new component due to a logic error in the device under test 200. Now, when a request to add a new component occurs, the instruction means 120 instructs the necessary component information to the logic circuit diagram displayed on the display means 150 using a circuit diagram or other method. When the component connection control means 170 is given the instruction, the state detection means 100 determines whether the designated pin of the additional component placed in the additional component holding means 180 corresponds to the pin of the device under test 200 designated to be connected on the circuit diagram. Short-circuit the test pins. This allows the device under test 200 to operate as if a new component had been added.

(Sixth Embodiment) FIG. 6 is a block diagram showing the configuration of a sixth embodiment of the present invention.

In the sixth embodiment of the present invention, instead of the additional component holding means shown in the fifth embodiment, the logical operation information of components used in the device under test is held as a library, and the components added to the device under test are based on this information. The component information storage means 190 operates in a pseudo manner, and the component connection control means 170 stores the additional components held by the component information storage means 190 and the device under test 200.
It includes means for instructing and controlling the state detecting means 100 to connect with internal components.

In the sixth embodiment of the present invention configured as described above, the logic circuit information storage means 160 holds the logic circuit information of the device under test 200, and the information is displayed in the form of a logic circuit diagram on the display means 150 by the display control means 140. is displayed. Display means 15
When the instruction means 120 instructs the points to be traced and the tracing conditions on the circuit diagram displayed on the circuit diagram 0, the storage control means 130 outputs the state detection means 10 under the given conditions.
0 instructs the storage means 110 to store the necessary information detected. The information stored in the storage means 110 is edited by the display control means 140 in the format instructed by the instruction means 120 and displayed on the display means 150.

In addition, when a logic error occurs in the device under test 200, the pattern on the printed circuit board may be cut to change the wiring on the printed circuit board, or the pins of the components mounted on the printed circuit board may be short-circuited with conductive wires to correct the logic error. This connection can be done by following simple instructions.

When you want to make a logical connection, display means 1 as described above.
When the point to be connected in the logic circuit diagram displayed at 50 is specified by the instruction means 120, the component connection control means 1
70 instructs the state detection means 100 to internally short-circuit the corresponding test pins. Status detection means 1
When the test pins are short-circuited within the test pin 00, the circuit of the device under test 200 connected thereto is also short-circuited, and a logical connection is realized.

Next, a case will be described in which the circuit logic is changed by adding a new component due to a logic error in the device under test. The component information storage means 190 stores logical and physical information of components used in the device under test 200 as a library. Now, when a request to add a new component occurs, the instruction means 120 instructs the necessary component information to the logic circuit diagram displayed on the display means 150 using a circuit diagram or other method.

When the component connection control means 170 receives the instruction, it retrieves the required library from the component information storage means 190 and operates a circuit that performs the logical operation of the library in a pseudo manner. Further, the designated pin of the pseudo additional component and the test pin of the state detection means 100 corresponding to the pin of the device under test 200 whose connection is designated on the circuit diagram are short-circuited. By doing so, it is possible to operate the device under test 200 as if a new component had been added.

FIG. 7 is a perspective view showing the appearance of an embodiment of the present invention.

〔Effect of the invention〕

As explained above, according to the present invention, when testing and evaluating the operation of a device under test, conditions such as trace points can be set using the circuit diagram displayed on the screen, making it easy to visually see. , it is easy to set trace conditions and there are fewer mistakes, and even if logical changes occur, tests and evaluations can be performed without actually modifying the device under test. This has the effect of improving efficiency.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a first embodiment of the present invention. FIG. 2 is a block diagram showing the configuration of a second embodiment of the present invention. FIG. 3 is a block diagram showing the configuration of a third embodiment of the present invention. FIG. 4 is a block diagram showing the configuration of a fourth embodiment of the present invention. FIG. 5 is a block diagram showing the configuration of a third embodiment of the present invention. FIG. 6 is a plot diagram showing the configuration of a sixth embodiment of the present invention. FIG. 7 is a perspective view showing the appearance of an embodiment of the present invention. 100... State detection means, 110... Storage means, 1
20... Instruction means, 130... Memory control means, 14
0... Display control means, 150... Display means, 160
...Logic circuit information storage means, 170...Component connection control means, 180...Additional component holding means, 190...
Parts information storage means, 200...device under test.

Claims (1)

[Scope of Claims] 1. In an information processing device testing device that detects the state of each component of the device under test, the device under test is an information processing device constituted by a plurality of parts. a state detection means for detecting all the information specified by the standard for the part or all; a storage means for storing the information detected by the state detection means; and a storage means for storing the timing and other conditions for storing the detected information. an instruction means for instructing and setting an editing method when editing and outputting the information; and a storage control controlling the timing of storing information in the storage means according to the timing and conditions instructed and set by the instruction means. display control means for editing the information stored in the storage means and the control information set by the instruction means in a manner instructed by the instruction means; displaying the information edited by the display control means; What is claimed is: 1. A testing device for an information processing device, comprising: a display means for displaying information processing information; 2. A logic circuit information storage means for storing logic circuit information and/or a component connection control means for instructing the state detection means to connect the components of the device under test according to instructions from the instruction means, and controlling the display. The means includes means for editing the logic circuit information stored in the logic circuit information storage means; the state detection means includes means for interconnecting the components of the device under test; , the logic circuit information stored in the logic circuit information storage means is edited by the display control means and displayed on the display means, and the selection instruction of information to be stored in the storage means and the information stored in the storage means are provided. means for instructing the display of a part of the displayed logic circuit information by pointing to a part of the displayed logic circuit information; 2. The information processing apparatus testing apparatus according to claim 1, further comprising: means for testing an information processing apparatus according to claim 1. 3. In the component connection control means, an additional component holding means for retaining components to be added to the device under test or logical operation information of components used in the device under test is held as a library, and this information is used to add the components to the device under test. A component information storage means for simulating operation of a component to be added to the test device is connected, the state detection means includes means for connecting the component in the device under test and the additional component, and the component connection control means , the state detection means detects a connection between an additional component held by the additional component holding means and a component in the device under test, or a connection between an additional component held by the component information storage means and a component in the device under test. means for instructing and controlling a part of the displayed logic circuit information when the instructing means indicates a part of the displayed logic circuit information; 3. A testing device for an information processing device according to claim 2.