JPH0481127A - Phase locked loop circuit - Google Patents

Abstract

PURPOSE:To obtain an output signal at a frequency within a specified range even when an input signal inputted to an PLL circuit reaches any state by providing a diode and a resistor to the PLL circuit so as to always limit an output voltage amplitude of a low pass filter. CONSTITUTION:The PLL circuit is provided with diodes 5, 6 limiting an output voltage of a low pass filter 4, a voltage source 7 to set a limit level of the diodes 5, 6 for the output voltage and a resistor 8 limiting a current flowing to the diodes 5, 6. The output voltage level of the low pass filter 4 is limited by using the diodes 5, 6, the voltage source 7 and the resistor 8 to obtain an output of a frequency within a specified range even when no input signal (a) is inputted. When a voltage difference is produced between an output voltage of the low pass filter 4 and the voltage of the voltage source 7, a current flows to the diode 5 or 6 to limit the output voltage of the low pass filter 4.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a phase-locked loop (PLL).
-1, regarding the locked loop) circuit.

[Conventional technology]

As shown in FIG. 3, a conventional PLL circuit includes a voltage controlled oscillator 1 that outputs a signal phase-synchronized with an input signal, a frequency divider 2 that divides the output signal of the voltage controlled oscillator 1, and a frequency divider 2 that divides the output signal of the voltage controlled oscillator 1. The oscillator 2 includes a phase comparator 3 that detects the phase difference between the output signal of the oscillator 2 and the input signal a, and a low-pass filter 4 that controls the output frequency of the voltage controlled oscillator 1 based on the output of the phase comparator 3.

The phase comparator 3 constantly compares the phase difference between the input signal a and the output signal of the voltage controlled oscillator 1 which is input to the phase comparator 3 via the frequency divider 2. Then, the output voltage of the phase comparator 3 caused by the phase difference between the two signals is smoothed by the low-pass filter 4 and used as the control voltage of the voltage controlled oscillator 1, so that a signal whose phase is synchronized with the average frequency of the input signal a is generated. was obtained from the voltage controlled oscillator 1.

[Problem to be solved by the invention]

In the conventional PLL circuit described above, when an instantaneous interruption of the input signal occurs and the PLL circuit temporarily enters a free-running state,
There is a problem in that an output signal with a significantly different frequency is output compared to the case where an input signal is input.

An object of the present invention is to obtain an output signal at a frequency within a specified range no matter what state the input signal input to the PLL circuit is in, and to set the frequency range of the output signal arbitrarily. An object of the present invention is to provide a phase-locked loop circuit that can be implemented at low cost.

[Means to solve the problem]

The phase-locked loop circuit of the present invention includes a voltage-controlled oscillator that outputs a signal phase-locked to an input signal, a frequency divider that divides the output of the voltage-controlled oscillator, and an output signal of the frequency divider and the input signal. and a low-pass filter that controls the output frequency of the voltage-controlled oscillator based on the output of the phase comparator, the output voltage of the low-pass filter is a first means for limiting the amplitude value; a second means for setting a potential at which the first means limits the output voltage amplitude value; and a third means for limiting the current flowing through the first means. It is a structure provided with a means. Further, the first means is composed of at least one diode, the second means is composed of a voltage source, the third means is composed of a resistor, and the first means is composed of at least one diode, and the third means is composed of a resistor. a first diode that allows current to flow and limits the maximum value of the output voltage amplitude when the output voltage of the pass filter is higher than the second means; and an output voltage of the low pass filter that is lower than the second means. In some cases, the second diode may be provided with a second diode that allows current to flow and limits the minimum value of the output voltage amplitude.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. PLL
The circuit consists of a voltage controlled oscillator 1 that outputs a signal phase-synchronized with an input signal a, a frequency divider 2 that divides the frequency of the output signal of the voltage controlled oscillator 1, and a frequency divider 2 that divides the output signal of the frequency divider 2 and the input signal. A phase comparator 3 that detects a phase difference, a low pass filter 4 that controls the output frequency of the voltage controlled oscillator 1 based on the output of the phase comparator 3, and a diode 5 that limits the output voltage amplitude value of the low pass filter 4. and 6, and diodes 5 and 6
includes a voltage source 7 for setting a potential that limits the output voltage amplitude value, and a resistor 8 that limits the current flowing through the diodes 5 and 6.

The operation will be explained below. The input signal a is input to the phase comparator 3, and after being frequency-divided by the output signal sum frequency divider of the voltage controlled oscillator 1, the input signal a is input to the phase comparator 3. Then, the phase difference between the two signals input to the phase comparator 3 is compared and detected, and a voltage proportional to the phase difference is output. The voltage proportional to this phase difference is smoothed by a low-pass filter 4 and input to the voltage controlled oscillator 1, and serves as a control voltage for the voltage controlled oscillator 1.
performs an operation to match the phases of the output signals. When the input signal a is not input, the output of the phase comparator 3 becomes maximum or minimum, and therefore the control voltage of the voltage controlled oscillator 1 via the low-pass filter 4 also becomes maximum or minimum.
The output frequency of the voltage controlled oscillator 1 becomes maximum or minimum.

FIG. 2 is a diagram showing the characteristics of the control voltage and output frequency of the voltage controlled oscillator. Since the control range of the output frequency is widened to improve component variations and linearity, significantly different frequencies are output when the control voltage reaches the maximum or minimum. However, as shown in FIG. 2, by limiting the control voltage, the output frequency can be limited. Therefore, the output voltage amplitude value of the low-pass filter 4 is
and 6. Voltage source7. By limiting with the resistor 8, it is possible to obtain an output with a frequency within the specified range even if the input signal a is not input. When a potential difference occurs between the output voltage of the low-pass filter 4 and the voltage of the voltage source 7, a current flows through the diode 5 or 6, and the output voltage of the low-pass filter 4 is limited. Since the cathode of the diode 6 and the anode of the diode 5 are connected to the output of the low-pass filter 4 via the resistor 8, when the output voltage of the low-pass filter 4 is higher than the voltage of the voltage source 7, A current flows through the diode 5 and limits the maximum value of the output voltage amplitude of the low-pass filter 4. Conversely, when the output voltage of the low-pass filter 4 is lower than the voltage of the voltage source 7, the diode 6
A current flows through the low-pass filter 4 to limit the minimum value of the output voltage amplitude of the low-pass filter 4.

Furthermore, by adjusting the output voltage of the voltage source 7, the maximum and minimum values of the output voltage amplitude of the low-pass filter 4 can be set. The resistor 8 has the function of limiting the current flowing through the diodes 5 and 6, and also limiting the amplitude of the output voltage of the low-pass filter 4 without being affected by the output impedance of the low-pass filter 4.

〔Effect of the invention〕

As explained above, the present invention provides a diode and a resistor in the PLL circuit and constantly limits the output voltage amplitude value of the low-pass filter, thereby determining the state of the input signal input to the PLL circuit. However, it is possible to obtain an output signal at a frequency within the specified range, and by adjusting the output voltage of the voltage source, the frequency range of the output signal can be arbitrarily set. Therefore, it can be realized at low cost.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing the control voltage and output frequency characteristics of a voltage controlled oscillator, and FIG. 3 is a block diagram showing a conventional PLL circuit. 1... Voltage controlled oscillator, 2... Frequency divider, 3... Phase comparator, 4... Low pass filter, 5.6... ...Diode, 7...
...Voltage source, 8...Resistor, a...Input signal, b...Output signal.

Claims (1)

[Claims] 1. A voltage controlled oscillator that outputs a signal phase-synchronized with an input signal, a frequency divider that divides the output of the voltage controlled oscillator, and an output signal of the frequency divider and the input signal. A phase-locked loop circuit comprising a phase comparator that detects a phase difference between a first means for limiting the voltage amplitude value; a second means for setting a potential at which the first means limits the output voltage amplitude value; and a third means for limiting the current flowing through the first means. A phase-locked loop circuit characterized in that it comprises means. 2. The first means comprises at least one diode, the second means comprises a voltage source, and the third means comprises a resistor. The phase-locked loop circuit described. 3. The first means includes a first diode that flows a current and limits the maximum value of the output voltage amplitude when the output voltage of the low-pass filter is higher than the second means; 2. A second diode that allows current to flow and limits the minimum value of the output voltage amplitude when the output voltage of the filter is lower than the second means.
Or the phase-locked loop circuit according to 2.